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Commit | Line | Data |
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e616c591 RK |
1 | /* |
2 | * ARM specific SMP header, this contains our implementation | |
3 | * details. | |
4 | */ | |
5 | #ifndef __ASMARM_SMP_PLAT_H | |
6 | #define __ASMARM_SMP_PLAT_H | |
7 | ||
7f124aaf LP |
8 | #include <linux/cpumask.h> |
9 | #include <linux/err.h> | |
10 | ||
e616c591 RK |
11 | #include <asm/cputype.h> |
12 | ||
f00ec48f RK |
13 | /* |
14 | * Return true if we are running on a SMP platform | |
15 | */ | |
16 | static inline bool is_smp(void) | |
17 | { | |
18 | #ifndef CONFIG_SMP | |
19 | return false; | |
20 | #elif defined(CONFIG_SMP_ON_UP) | |
21 | extern unsigned int smp_on_up; | |
22 | return !!smp_on_up; | |
23 | #else | |
24 | return true; | |
25 | #endif | |
26 | } | |
27 | ||
e616c591 | 28 | /* all SMP configurations have the extended CPUID registers */ |
5c709e69 WD |
29 | #ifndef CONFIG_MMU |
30 | #define tlb_ops_need_broadcast() 0 | |
31 | #else | |
e616c591 RK |
32 | static inline int tlb_ops_need_broadcast(void) |
33 | { | |
7511db9d TL |
34 | if (!is_smp()) |
35 | return 0; | |
36 | ||
e616c591 RK |
37 | return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2; |
38 | } | |
5c709e69 | 39 | #endif |
e616c591 | 40 | |
85848dd7 CM |
41 | #if !defined(CONFIG_SMP) || __LINUX_ARM_ARCH__ >= 7 |
42 | #define cache_ops_need_broadcast() 0 | |
43 | #else | |
2ef7f3db RK |
44 | static inline int cache_ops_need_broadcast(void) |
45 | { | |
7511db9d TL |
46 | if (!is_smp()) |
47 | return 0; | |
48 | ||
2ef7f3db RK |
49 | return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 1; |
50 | } | |
85848dd7 | 51 | #endif |
2ef7f3db | 52 | |
eb50439b WD |
53 | /* |
54 | * Logical CPU mapping. | |
55 | */ | |
18d7f152 | 56 | extern u32 __cpu_logical_map[]; |
eb50439b | 57 | #define cpu_logical_map(cpu) __cpu_logical_map[cpu] |
7f124aaf LP |
58 | /* |
59 | * Retrieve logical cpu index corresponding to a given MPIDR[23:0] | |
60 | * - mpidr: MPIDR[23:0] to be used for the look-up | |
61 | * | |
62 | * Returns the cpu logical index or -EINVAL on look-up error | |
63 | */ | |
64 | static inline int get_logical_index(u32 mpidr) | |
65 | { | |
66 | int cpu; | |
67 | for (cpu = 0; cpu < nr_cpu_ids; cpu++) | |
68 | if (cpu_logical_map(cpu) == mpidr) | |
69 | return cpu; | |
70 | return -EINVAL; | |
71 | } | |
eb50439b | 72 | |
7604537b LP |
73 | /* |
74 | * NOTE ! Assembly code relies on the following | |
75 | * structure memory layout in order to carry out load | |
76 | * multiple from its base address. For more | |
77 | * information check arch/arm/kernel/sleep.S | |
78 | */ | |
8cf72172 | 79 | struct mpidr_hash { |
7604537b LP |
80 | u32 mask; /* used by sleep.S */ |
81 | u32 shift_aff[3]; /* used by sleep.S */ | |
8cf72172 LP |
82 | u32 bits; |
83 | }; | |
84 | ||
85 | extern struct mpidr_hash mpidr_hash; | |
86 | ||
87 | static inline u32 mpidr_hash_size(void) | |
88 | { | |
89 | return 1 << mpidr_hash.bits; | |
90 | } | |
2103f6cb SW |
91 | |
92 | extern int platform_can_cpu_hotplug(void); | |
93 | ||
e616c591 | 94 | #endif |