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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
9f97da78 DH |
2 | #ifndef __ASM_ARM_SWITCH_TO_H |
3 | #define __ASM_ARM_SWITCH_TO_H | |
4 | ||
5 | #include <linux/thread_info.h> | |
6 | ||
73a6fdc4 WD |
7 | /* |
8 | * For v7 SMP cores running a preemptible kernel we may be pre-empted | |
9 | * during a TLB maintenance operation, so execute an inner-shareable dsb | |
10 | * to ensure that the maintenance completes in case we migrate to another | |
11 | * CPU. | |
12 | */ | |
13 | #if defined(CONFIG_PREEMPT) && defined(CONFIG_SMP) && defined(CONFIG_CPU_V7) | |
7baa7aec WD |
14 | #define __complete_pending_tlbi() dsb(ish) |
15 | #else | |
16 | #define __complete_pending_tlbi() | |
73a6fdc4 WD |
17 | #endif |
18 | ||
9f97da78 DH |
19 | /* |
20 | * switch_to(prev, next) should switch from task `prev' to `next' | |
21 | * `prev' will never be the same as `next'. schedule() itself | |
22 | * contains the memory barrier to tell GCC not to cache `current'. | |
23 | */ | |
24 | extern struct task_struct *__switch_to(struct task_struct *, struct thread_info *, struct thread_info *); | |
25 | ||
26 | #define switch_to(prev,next,last) \ | |
27 | do { \ | |
7baa7aec | 28 | __complete_pending_tlbi(); \ |
9f97da78 DH |
29 | last = __switch_to(prev,task_thread_info(prev), task_thread_info(next)); \ |
30 | } while (0) | |
31 | ||
32 | #endif /* __ASM_ARM_SWITCH_TO_H */ |