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d2912cb1 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
c53c9cf6 | 2 | /* |
abbfb21e | 3 | * arch/arm/include/debug/ks8695.S |
c53c9cf6 AV |
4 | * |
5 | * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk> | |
6 | * Copyright (C) 2006 Simtec Electronics | |
7 | * | |
8 | * KS8695 - Debug macros | |
c53c9cf6 AV |
9 | */ |
10 | ||
abbfb21e DT |
11 | #define KS8695_UART_PA 0x03ffe000 |
12 | #define KS8695_UART_VA 0xf00fe000 | |
13 | #define KS8695_URTH (0x04) | |
14 | #define KS8695_URLS (0x14) | |
15 | #define URLS_URTE (1 << 6) | |
16 | #define URLS_URTHRE (1 << 5) | |
c53c9cf6 | 17 | |
639da5ee | 18 | .macro addruart, rp, rv, tmp |
0ea12930 JK |
19 | ldr \rp, =KS8695_UART_PA @ physical base address |
20 | ldr \rv, =KS8695_UART_VA @ virtual base address | |
c53c9cf6 AV |
21 | .endm |
22 | ||
23 | .macro senduart, rd, rx | |
24 | str \rd, [\rx, #KS8695_URTH] @ Write to Transmit Holding Register | |
25 | .endm | |
26 | ||
27 | .macro busyuart, rd, rx | |
28 | 1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register | |
29 | tst \rd, #URLS_URTE @ Holding & Shift registers empty? | |
30 | beq 1001b | |
31 | .endm | |
32 | ||
33 | .macro waituart, rd, rx | |
34 | 1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register | |
35 | tst \rd, #URLS_URTHRE @ Holding Register empty? | |
36 | beq 1001b | |
37 | .endm |