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9eb8f674 GL |
1 | /* |
2 | * linux/arch/arm/kernel/devtree.c | |
3 | * | |
4 | * Copyright (C) 2009 Canonical Ltd. <jeremy.kerr@canonical.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/init.h> | |
ecea4ab6 | 12 | #include <linux/export.h> |
9eb8f674 GL |
13 | #include <linux/errno.h> |
14 | #include <linux/types.h> | |
15 | #include <linux/bootmem.h> | |
16 | #include <linux/memblock.h> | |
17 | #include <linux/of.h> | |
18 | #include <linux/of_fdt.h> | |
19 | #include <linux/of_irq.h> | |
20 | #include <linux/of_platform.h> | |
6c3ff8b1 | 21 | #include <linux/smp.h> |
9eb8f674 | 22 | |
a0ae0240 | 23 | #include <asm/cputype.h> |
9eb8f674 GL |
24 | #include <asm/setup.h> |
25 | #include <asm/page.h> | |
2374b063 | 26 | #include <asm/prom.h> |
a0ae0240 | 27 | #include <asm/smp_plat.h> |
93c02ab4 GL |
28 | #include <asm/mach/arch.h> |
29 | #include <asm/mach-types.h> | |
9eb8f674 | 30 | |
9eb8f674 | 31 | |
6c3ff8b1 | 32 | #ifdef CONFIG_SMP |
9a721c41 RH |
33 | extern struct of_cpu_method __cpu_method_of_table[]; |
34 | ||
35 | static const struct of_cpu_method __cpu_method_of_table_sentinel | |
36 | __used __section(__cpu_method_of_table_end); | |
37 | ||
6c3ff8b1 SB |
38 | |
39 | static int __init set_smp_ops_by_method(struct device_node *node) | |
40 | { | |
41 | const char *method; | |
9a721c41 | 42 | struct of_cpu_method *m = __cpu_method_of_table; |
6c3ff8b1 SB |
43 | |
44 | if (of_property_read_string(node, "enable-method", &method)) | |
45 | return 0; | |
46 | ||
9a721c41 | 47 | for (; m->method; m++) |
6c3ff8b1 SB |
48 | if (!strcmp(m->method, method)) { |
49 | smp_set_ops(m->ops); | |
50 | return 1; | |
51 | } | |
52 | ||
53 | return 0; | |
54 | } | |
55 | #else | |
56 | static inline int set_smp_ops_by_method(struct device_node *node) | |
57 | { | |
58 | return 1; | |
59 | } | |
60 | #endif | |
61 | ||
62 | ||
a0ae0240 LP |
63 | /* |
64 | * arm_dt_init_cpu_maps - Function retrieves cpu nodes from the device tree | |
65 | * and builds the cpu logical map array containing MPIDR values related to | |
66 | * logical cpus | |
67 | * | |
68 | * Updates the cpu possible mask with the number of parsed cpu nodes | |
69 | */ | |
70 | void __init arm_dt_init_cpu_maps(void) | |
71 | { | |
72 | /* | |
73 | * Temp logical map is initialized with UINT_MAX values that are | |
74 | * considered invalid logical map entries since the logical map must | |
75 | * contain a list of MPIDR[23:0] values where MPIDR[31:24] must | |
76 | * read as 0. | |
77 | */ | |
78 | struct device_node *cpu, *cpus; | |
6c3ff8b1 | 79 | int found_method = 0; |
a0ae0240 LP |
80 | u32 i, j, cpuidx = 1; |
81 | u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0; | |
82 | ||
18d7f152 | 83 | u32 tmp_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID }; |
a0ae0240 LP |
84 | bool bootcpu_valid = false; |
85 | cpus = of_find_node_by_path("/cpus"); | |
86 | ||
87 | if (!cpus) | |
88 | return; | |
89 | ||
90 | for_each_child_of_node(cpus, cpu) { | |
ba6dea4f RM |
91 | const __be32 *cell; |
92 | int prop_bytes; | |
a0ae0240 LP |
93 | u32 hwid; |
94 | ||
1ba9bf0a LP |
95 | if (of_node_cmp(cpu->type, "cpu")) |
96 | continue; | |
97 | ||
a0ae0240 LP |
98 | pr_debug(" * %s...\n", cpu->full_name); |
99 | /* | |
100 | * A device tree containing CPU nodes with missing "reg" | |
101 | * properties is considered invalid to build the | |
102 | * cpu_logical_map. | |
103 | */ | |
ba6dea4f RM |
104 | cell = of_get_property(cpu, "reg", &prop_bytes); |
105 | if (!cell || prop_bytes < sizeof(*cell)) { | |
a0ae0240 LP |
106 | pr_debug(" * %s missing reg property\n", |
107 | cpu->full_name); | |
a4283e41 | 108 | of_node_put(cpu); |
a0ae0240 LP |
109 | return; |
110 | } | |
111 | ||
112 | /* | |
ba6dea4f | 113 | * Bits n:24 must be set to 0 in the DT since the reg property |
a0ae0240 LP |
114 | * defines the MPIDR[23:0]. |
115 | */ | |
ba6dea4f RM |
116 | do { |
117 | hwid = be32_to_cpu(*cell++); | |
118 | prop_bytes -= sizeof(*cell); | |
119 | } while (!hwid && prop_bytes > 0); | |
120 | ||
121 | if (prop_bytes || (hwid & ~MPIDR_HWID_BITMASK)) { | |
a4283e41 | 122 | of_node_put(cpu); |
a0ae0240 | 123 | return; |
a4283e41 | 124 | } |
a0ae0240 LP |
125 | |
126 | /* | |
127 | * Duplicate MPIDRs are a recipe for disaster. | |
128 | * Scan all initialized entries and check for | |
129 | * duplicates. If any is found just bail out. | |
130 | * temp values were initialized to UINT_MAX | |
131 | * to avoid matching valid MPIDR[23:0] values. | |
132 | */ | |
133 | for (j = 0; j < cpuidx; j++) | |
a4283e41 JL |
134 | if (WARN(tmp_map[j] == hwid, |
135 | "Duplicate /cpu reg properties in the DT\n")) { | |
136 | of_node_put(cpu); | |
a0ae0240 | 137 | return; |
a4283e41 | 138 | } |
a0ae0240 LP |
139 | |
140 | /* | |
141 | * Build a stashed array of MPIDR values. Numbering scheme | |
142 | * requires that if detected the boot CPU must be assigned | |
143 | * logical id 0. Other CPUs get sequential indexes starting | |
144 | * from 1. If a CPU node with a reg property matching the | |
145 | * boot CPU MPIDR is detected, this is recorded so that the | |
146 | * logical map built from DT is validated and can be used | |
147 | * to override the map created in smp_setup_processor_id(). | |
148 | */ | |
149 | if (hwid == mpidr) { | |
150 | i = 0; | |
151 | bootcpu_valid = true; | |
152 | } else { | |
153 | i = cpuidx++; | |
154 | } | |
155 | ||
ce7b1756 LP |
156 | if (WARN(cpuidx > nr_cpu_ids, "DT /cpu %u nodes greater than " |
157 | "max cores %u, capping them\n", | |
158 | cpuidx, nr_cpu_ids)) { | |
159 | cpuidx = nr_cpu_ids; | |
a4283e41 | 160 | of_node_put(cpu); |
a0ae0240 | 161 | break; |
ce7b1756 LP |
162 | } |
163 | ||
164 | tmp_map[i] = hwid; | |
6c3ff8b1 SB |
165 | |
166 | if (!found_method) | |
167 | found_method = set_smp_ops_by_method(cpu); | |
a0ae0240 LP |
168 | } |
169 | ||
6c3ff8b1 SB |
170 | /* |
171 | * Fallback to an enable-method in the cpus node if nothing found in | |
172 | * a cpu node. | |
173 | */ | |
174 | if (!found_method) | |
175 | set_smp_ops_by_method(cpus); | |
176 | ||
8d5bc1a6 OJ |
177 | if (!bootcpu_valid) { |
178 | pr_warn("DT missing boot CPU MPIDR[23:0], fall back to default cpu_logical_map\n"); | |
a0ae0240 | 179 | return; |
8d5bc1a6 | 180 | } |
a0ae0240 LP |
181 | |
182 | /* | |
183 | * Since the boot CPU node contains proper data, and all nodes have | |
184 | * a reg property, the DT CPU list can be considered valid and the | |
185 | * logical map created in smp_setup_processor_id() can be overridden | |
186 | */ | |
187 | for (i = 0; i < cpuidx; i++) { | |
188 | set_cpu_possible(i, true); | |
189 | cpu_logical_map(i) = tmp_map[i]; | |
190 | pr_debug("cpu logical map 0x%x\n", cpu_logical_map(i)); | |
191 | } | |
192 | } | |
193 | ||
973e02c1 SH |
194 | bool arch_match_cpu_phys_id(int cpu, u64 phys_id) |
195 | { | |
e44ef891 | 196 | return phys_id == cpu_logical_map(cpu); |
973e02c1 SH |
197 | } |
198 | ||
6d67a9f6 RH |
199 | static const void * __init arch_get_next_mach(const char *const **match) |
200 | { | |
201 | static const struct machine_desc *mdesc = __arch_info_begin; | |
202 | const struct machine_desc *m = mdesc; | |
203 | ||
204 | if (m >= __arch_info_end) | |
205 | return NULL; | |
206 | ||
207 | mdesc++; | |
208 | *match = m->dt_compat; | |
209 | return m; | |
210 | } | |
211 | ||
93c02ab4 GL |
212 | /** |
213 | * setup_machine_fdt - Machine setup when an dtb was passed to the kernel | |
214 | * @dt_phys: physical address of dt blob | |
215 | * | |
216 | * If a dtb was passed to the kernel in r2, then use it to choose the | |
217 | * correct machine_desc and to setup the system. | |
218 | */ | |
ff69a4c8 | 219 | const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys) |
93c02ab4 | 220 | { |
ff69a4c8 | 221 | const struct machine_desc *mdesc, *mdesc_best = NULL; |
93c02ab4 | 222 | |
70722803 | 223 | #if defined(CONFIG_ARCH_MULTIPLATFORM) || defined(CONFIG_ARM_SINGLE_ARMV7M) |
883a106b | 224 | DT_MACHINE_START(GENERIC_DT, "Generic DT based system") |
cb6f8344 LW |
225 | .l2c_aux_val = 0x0, |
226 | .l2c_aux_mask = ~0x0, | |
883a106b AB |
227 | MACHINE_END |
228 | ||
ff69a4c8 | 229 | mdesc_best = &__mach_desc_GENERIC_DT; |
883a106b AB |
230 | #endif |
231 | ||
5a12a597 | 232 | if (!dt_phys || !early_init_dt_verify(phys_to_virt(dt_phys))) |
f506cd48 NP |
233 | return NULL; |
234 | ||
6d67a9f6 | 235 | mdesc = of_flat_dt_match_machine(mdesc_best, arch_get_next_mach); |
93c02ab4 | 236 | |
6d67a9f6 | 237 | if (!mdesc) { |
93c02ab4 | 238 | const char *prop; |
9d0c4dfe | 239 | int size; |
6d67a9f6 | 240 | unsigned long dt_root; |
93c02ab4 GL |
241 | |
242 | early_print("\nError: unrecognized/unsupported " | |
243 | "device tree compatible list:\n[ "); | |
244 | ||
6d67a9f6 | 245 | dt_root = of_get_flat_dt_root(); |
93c02ab4 GL |
246 | prop = of_get_flat_dt_prop(dt_root, "compatible", &size); |
247 | while (size > 0) { | |
248 | early_print("'%s' ", prop); | |
249 | size -= strlen(prop) + 1; | |
250 | prop += strlen(prop) + 1; | |
251 | } | |
252 | early_print("]\n\n"); | |
253 | ||
254 | dump_machine_table(); /* does not return */ | |
255 | } | |
256 | ||
5a12a597 LA |
257 | /* We really don't want to do this, but sometimes firmware provides buggy data */ |
258 | if (mdesc->dt_fixup) | |
259 | mdesc->dt_fixup(); | |
260 | ||
261 | early_init_dt_scan_nodes(); | |
262 | ||
93c02ab4 | 263 | /* Change machine number to match the mdesc we're using */ |
6d67a9f6 | 264 | __machine_arch_type = mdesc->nr; |
93c02ab4 | 265 | |
6d67a9f6 | 266 | return mdesc; |
93c02ab4 | 267 | } |