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75d90832 HC |
1 | /* |
2 | * linux/arch/arm/kernel/head-common.S | |
3 | * | |
4 | * Copyright (C) 1994-2002 Russell King | |
5 | * Copyright (c) 2003 ARM Limited | |
6 | * All Rights Reserved | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | */ | |
13 | ||
9c4c9f38 GU |
14 | #define ATAG_CORE 0x54410001 |
15 | #define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2) | |
16 | ||
75d90832 HC |
17 | .type __switch_data, %object |
18 | __switch_data: | |
19 | .long __mmap_switched | |
20 | .long __data_loc @ r4 | |
21 | .long __data_start @ r5 | |
22 | .long __bss_start @ r6 | |
23 | .long _end @ r7 | |
24 | .long processor_id @ r4 | |
25 | .long __machine_arch_type @ r5 | |
9d20fdd5 BG |
26 | .long __atags_pointer @ r6 |
27 | .long cr_alignment @ r7 | |
75d90832 HC |
28 | .long init_thread_union + THREAD_START_SP @ sp |
29 | ||
30 | /* | |
31 | * The following fragment of code is executed with the MMU on in MMU mode, | |
32 | * and uses absolute addresses; this is not position independent. | |
33 | * | |
34 | * r0 = cp#15 control register | |
35 | * r1 = machine ID | |
9d20fdd5 | 36 | * r2 = atags pointer |
75d90832 HC |
37 | * r9 = processor ID |
38 | */ | |
39 | .type __mmap_switched, %function | |
40 | __mmap_switched: | |
41 | adr r3, __switch_data + 4 | |
42 | ||
43 | ldmia r3!, {r4, r5, r6, r7} | |
44 | cmp r4, r5 @ Copy data segment if needed | |
45 | 1: cmpne r5, r6 | |
46 | ldrne fp, [r4], #4 | |
47 | strne fp, [r5], #4 | |
48 | bne 1b | |
49 | ||
50 | mov fp, #0 @ Clear BSS (and zero fp) | |
51 | 1: cmp r6, r7 | |
52 | strcc fp, [r6],#4 | |
53 | bcc 1b | |
54 | ||
9d20fdd5 | 55 | ldmia r3, {r4, r5, r6, r7, sp} |
75d90832 HC |
56 | str r9, [r4] @ Save processor ID |
57 | str r1, [r5] @ Save machine type | |
9d20fdd5 | 58 | str r2, [r6] @ Save atags pointer |
75d90832 | 59 | bic r4, r0, #CR_A @ Clear 'A' bit |
9d20fdd5 | 60 | stmia r7, {r0, r4} @ Save control register values |
75d90832 HC |
61 | b start_kernel |
62 | ||
63 | /* | |
64 | * Exception handling. Something went wrong and we can't proceed. We | |
65 | * ought to tell the user, but since we don't have any guarantee that | |
66 | * we're even running on the right architecture, we do virtually nothing. | |
67 | * | |
68 | * If CONFIG_DEBUG_LL is set we try to print out something about the error | |
69 | * and hope for the best (useful if bootloader fails to pass a proper | |
70 | * machine ID for example). | |
71 | */ | |
72 | ||
73 | .type __error_p, %function | |
74 | __error_p: | |
75 | #ifdef CONFIG_DEBUG_LL | |
76 | adr r0, str_p1 | |
77 | bl printascii | |
78 | b __error | |
79 | str_p1: .asciz "\nError: unrecognized/unsupported processor variant.\n" | |
80 | .align | |
81 | #endif | |
82 | ||
83 | .type __error_a, %function | |
84 | __error_a: | |
85 | #ifdef CONFIG_DEBUG_LL | |
86 | mov r4, r1 @ preserve machine ID | |
87 | adr r0, str_a1 | |
88 | bl printascii | |
89 | mov r0, r4 | |
90 | bl printhex8 | |
91 | adr r0, str_a2 | |
92 | bl printascii | |
93 | adr r3, 3f | |
94 | ldmia r3, {r4, r5, r6} @ get machine desc list | |
95 | sub r4, r3, r4 @ get offset between virt&phys | |
96 | add r5, r5, r4 @ convert virt addresses to | |
97 | add r6, r6, r4 @ physical address space | |
98 | 1: ldr r0, [r5, #MACHINFO_TYPE] @ get machine type | |
99 | bl printhex8 | |
100 | mov r0, #'\t' | |
101 | bl printch | |
102 | ldr r0, [r5, #MACHINFO_NAME] @ get machine name | |
103 | add r0, r0, r4 | |
104 | bl printascii | |
105 | mov r0, #'\n' | |
106 | bl printch | |
107 | add r5, r5, #SIZEOF_MACHINE_DESC @ next machine_desc | |
108 | cmp r5, r6 | |
109 | blo 1b | |
110 | adr r0, str_a3 | |
111 | bl printascii | |
112 | b __error | |
113 | str_a1: .asciz "\nError: unrecognized/unsupported machine ID (r1 = 0x" | |
114 | str_a2: .asciz ").\n\nAvailable machine support:\n\nID (hex)\tNAME\n" | |
115 | str_a3: .asciz "\nPlease check your kernel config and/or bootloader.\n" | |
116 | .align | |
117 | #endif | |
118 | ||
119 | .type __error, %function | |
120 | __error: | |
121 | #ifdef CONFIG_ARCH_RPC | |
122 | /* | |
123 | * Turn the screen red on a error - RiscPC only. | |
124 | */ | |
125 | mov r0, #0x02000000 | |
126 | mov r3, #0x11 | |
127 | orr r3, r3, r3, lsl #8 | |
128 | orr r3, r3, r3, lsl #16 | |
129 | str r3, [r0], #4 | |
130 | str r3, [r0], #4 | |
131 | str r3, [r0], #4 | |
132 | str r3, [r0], #4 | |
133 | #endif | |
134 | 1: mov r0, r0 | |
135 | b 1b | |
136 | ||
137 | ||
138 | /* | |
139 | * Read processor ID register (CP#15, CR0), and look up in the linker-built | |
140 | * supported processor list. Note that we can't use the absolute addresses | |
141 | * for the __proc_info lists since we aren't running with the MMU on | |
142 | * (and therefore, we are not in the correct address space). We have to | |
143 | * calculate the offset. | |
144 | * | |
145 | * r9 = cpuid | |
146 | * Returns: | |
147 | * r3, r4, r6 corrupted | |
148 | * r5 = proc_info pointer in physical address space | |
149 | * r9 = cpuid (preserved) | |
150 | */ | |
151 | .type __lookup_processor_type, %function | |
152 | __lookup_processor_type: | |
153 | adr r3, 3f | |
154 | ldmda r3, {r5 - r7} | |
155 | sub r3, r3, r7 @ get offset between virt&phys | |
156 | add r5, r5, r3 @ convert virt addresses to | |
157 | add r6, r6, r3 @ physical address space | |
158 | 1: ldmia r5, {r3, r4} @ value, mask | |
159 | and r4, r4, r9 @ mask wanted bits | |
160 | teq r3, r4 | |
161 | beq 2f | |
162 | add r5, r5, #PROC_INFO_SZ @ sizeof(proc_info_list) | |
163 | cmp r5, r6 | |
164 | blo 1b | |
165 | mov r5, #0 @ unknown processor | |
166 | 2: mov pc, lr | |
167 | ||
168 | /* | |
169 | * This provides a C-API version of the above function. | |
170 | */ | |
171 | ENTRY(lookup_processor_type) | |
172 | stmfd sp!, {r4 - r7, r9, lr} | |
173 | mov r9, r0 | |
174 | bl __lookup_processor_type | |
175 | mov r0, r5 | |
176 | ldmfd sp!, {r4 - r7, r9, pc} | |
177 | ||
178 | /* | |
179 | * Look in include/asm-arm/procinfo.h and arch/arm/kernel/arch.[ch] for | |
180 | * more information about the __proc_info and __arch_info structures. | |
181 | */ | |
182 | .long __proc_info_begin | |
183 | .long __proc_info_end | |
184 | 3: .long . | |
185 | .long __arch_info_begin | |
186 | .long __arch_info_end | |
187 | ||
188 | /* | |
189 | * Lookup machine architecture in the linker-build list of architectures. | |
190 | * Note that we can't use the absolute addresses for the __arch_info | |
191 | * lists since we aren't running with the MMU on (and therefore, we are | |
192 | * not in the correct address space). We have to calculate the offset. | |
193 | * | |
194 | * r1 = machine architecture number | |
195 | * Returns: | |
196 | * r3, r4, r6 corrupted | |
197 | * r5 = mach_info pointer in physical address space | |
198 | */ | |
199 | .type __lookup_machine_type, %function | |
200 | __lookup_machine_type: | |
201 | adr r3, 3b | |
202 | ldmia r3, {r4, r5, r6} | |
203 | sub r3, r3, r4 @ get offset between virt&phys | |
204 | add r5, r5, r3 @ convert virt addresses to | |
205 | add r6, r6, r3 @ physical address space | |
206 | 1: ldr r3, [r5, #MACHINFO_TYPE] @ get machine type | |
207 | teq r3, r1 @ matches loader number? | |
208 | beq 2f @ found | |
209 | add r5, r5, #SIZEOF_MACHINE_DESC @ next machine_desc | |
210 | cmp r5, r6 | |
211 | blo 1b | |
212 | mov r5, #0 @ unknown machine | |
213 | 2: mov pc, lr | |
214 | ||
215 | /* | |
216 | * This provides a C-API version of the above function. | |
217 | */ | |
218 | ENTRY(lookup_machine_type) | |
219 | stmfd sp!, {r4 - r6, lr} | |
220 | mov r1, r0 | |
221 | bl __lookup_machine_type | |
222 | mov r0, r5 | |
223 | ldmfd sp!, {r4 - r6, pc} | |
9d20fdd5 BG |
224 | |
225 | /* Determine validity of the r2 atags pointer. The heuristic requires | |
226 | * that the pointer be aligned, in the first 16k of physical RAM and | |
227 | * that the ATAG_CORE marker is first and present. Future revisions | |
228 | * of this function may be more lenient with the physical address and | |
229 | * may also be able to move the ATAGS block if necessary. | |
230 | * | |
231 | * r8 = machinfo | |
232 | * | |
233 | * Returns: | |
234 | * r2 either valid atags pointer, or zero | |
235 | * r5, r6 corrupted | |
236 | */ | |
237 | ||
238 | .type __vet_atags, %function | |
239 | __vet_atags: | |
240 | tst r2, #0x3 @ aligned? | |
241 | bne 1f | |
242 | ||
243 | ldr r5, [r2, #0] @ is first tag ATAG_CORE? | |
244 | subs r5, r5, #ATAG_CORE_SIZE | |
245 | bne 1f | |
246 | ldr r5, [r2, #4] | |
247 | ldr r6, =ATAG_CORE | |
248 | cmp r5, r6 | |
249 | bne 1f | |
250 | ||
251 | mov pc, lr @ atag pointer is ok | |
252 | ||
253 | 1: mov r2, #0 | |
254 | mov pc, lr |