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24ba613c AS |
1 | /* |
2 | * arch/arm/kernel/kprobes.c | |
3 | * | |
4 | * Kprobes on ARM | |
5 | * | |
6 | * Abhishek Sagar <sagar.abhishek@gmail.com> | |
7 | * Copyright (C) 2006, 2007 Motorola Inc. | |
8 | * | |
9 | * Nicolas Pitre <nico@marvell.com> | |
10 | * Copyright (C) 2007 Marvell Ltd. | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License version 2 as | |
14 | * published by the Free Software Foundation. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * General Public License for more details. | |
20 | */ | |
21 | ||
22 | #include <linux/kernel.h> | |
23 | #include <linux/kprobes.h> | |
24 | #include <linux/module.h> | |
5a0e3ad6 | 25 | #include <linux/slab.h> |
2003b7af | 26 | #include <linux/stop_machine.h> |
24ba613c AS |
27 | #include <linux/stringify.h> |
28 | #include <asm/traps.h> | |
888be254 | 29 | #include <asm/opcodes.h> |
24ba613c | 30 | #include <asm/cacheflush.h> |
21254ebc DL |
31 | #include <linux/percpu.h> |
32 | #include <linux/bug.h> | |
24ba613c | 33 | |
221bf15f | 34 | #include "kprobes.h" |
47e190fa DL |
35 | #include "probes-arm.h" |
36 | #include "probes-thumb.h" | |
b21d55e9 | 37 | #include "patch.h" |
221bf15f | 38 | |
24ba613c AS |
39 | #define MIN_STACK_SIZE(addr) \ |
40 | min((unsigned long)MAX_STACK_SIZE, \ | |
41 | (unsigned long)current_thread_info() + THREAD_START_SP - (addr)) | |
42 | ||
aceb487a | 43 | #define flush_insns(addr, size) \ |
24ba613c AS |
44 | flush_icache_range((unsigned long)(addr), \ |
45 | (unsigned long)(addr) + \ | |
aceb487a | 46 | (size)) |
24ba613c AS |
47 | |
48 | /* Used as a marker in ARM_pc to note when we're in a jprobe. */ | |
49 | #define JPROBE_MAGIC_ADDR 0xffffffff | |
50 | ||
51 | DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL; | |
52 | DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk); | |
53 | ||
54 | ||
55 | int __kprobes arch_prepare_kprobe(struct kprobe *p) | |
56 | { | |
57 | kprobe_opcode_t insn; | |
58 | kprobe_opcode_t tmp_insn[MAX_INSN_SIZE]; | |
59 | unsigned long addr = (unsigned long)p->addr; | |
e2960317 | 60 | bool thumb; |
24371707 | 61 | kprobe_decode_insn_t *decode_insn; |
3e6cd394 | 62 | const union decode_action *actions; |
24ba613c AS |
63 | int is; |
64 | ||
24371707 | 65 | if (in_exception_text(addr)) |
24ba613c AS |
66 | return -EINVAL; |
67 | ||
24371707 | 68 | #ifdef CONFIG_THUMB2_KERNEL |
e2960317 | 69 | thumb = true; |
24371707 | 70 | addr &= ~1; /* Bit 0 would normally be set to indicate Thumb code */ |
888be254 | 71 | insn = __mem_to_opcode_thumb16(((u16 *)addr)[0]); |
24371707 | 72 | if (is_wide_instruction(insn)) { |
888be254 BD |
73 | u16 inst2 = __mem_to_opcode_thumb16(((u16 *)addr)[1]); |
74 | insn = __opcode_thumb32_compose(insn, inst2); | |
47e190fa | 75 | decode_insn = thumb32_probes_decode_insn; |
3e6cd394 DL |
76 | actions = kprobes_t32_actions; |
77 | } else { | |
47e190fa | 78 | decode_insn = thumb16_probes_decode_insn; |
3e6cd394 DL |
79 | actions = kprobes_t16_actions; |
80 | } | |
24371707 | 81 | #else /* !CONFIG_THUMB2_KERNEL */ |
e2960317 | 82 | thumb = false; |
24371707 JM |
83 | if (addr & 0x3) |
84 | return -EINVAL; | |
888be254 | 85 | insn = __mem_to_opcode_arm(*p->addr); |
47e190fa | 86 | decode_insn = arm_probes_decode_insn; |
3e6cd394 | 87 | actions = kprobes_arm_actions; |
24371707 JM |
88 | #endif |
89 | ||
24ba613c AS |
90 | p->opcode = insn; |
91 | p->ainsn.insn = tmp_insn; | |
92 | ||
602cd260 | 93 | switch ((*decode_insn)(insn, &p->ainsn, true, actions)) { |
24ba613c AS |
94 | case INSN_REJECTED: /* not supported */ |
95 | return -EINVAL; | |
96 | ||
97 | case INSN_GOOD: /* instruction uses slot */ | |
98 | p->ainsn.insn = get_insn_slot(); | |
99 | if (!p->ainsn.insn) | |
100 | return -ENOMEM; | |
101 | for (is = 0; is < MAX_INSN_SIZE; ++is) | |
102 | p->ainsn.insn[is] = tmp_insn[is]; | |
aceb487a JM |
103 | flush_insns(p->ainsn.insn, |
104 | sizeof(p->ainsn.insn[0]) * MAX_INSN_SIZE); | |
47e190fa | 105 | p->ainsn.insn_fn = (probes_insn_fn_t *) |
e2960317 | 106 | ((uintptr_t)p->ainsn.insn | thumb); |
24ba613c AS |
107 | break; |
108 | ||
109 | case INSN_GOOD_NO_SLOT: /* instruction doesn't need insn slot */ | |
110 | p->ainsn.insn = NULL; | |
111 | break; | |
112 | } | |
113 | ||
114 | return 0; | |
115 | } | |
116 | ||
117 | void __kprobes arch_arm_kprobe(struct kprobe *p) | |
118 | { | |
b21d55e9 RV |
119 | unsigned int brkp; |
120 | void *addr; | |
121 | ||
122 | if (IS_ENABLED(CONFIG_THUMB2_KERNEL)) { | |
123 | /* Remove any Thumb flag */ | |
124 | addr = (void *)((uintptr_t)p->addr & ~1); | |
125 | ||
126 | if (is_wide_instruction(p->opcode)) | |
127 | brkp = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION; | |
128 | else | |
129 | brkp = KPROBE_THUMB16_BREAKPOINT_INSTRUCTION; | |
aceb487a | 130 | } else { |
b21d55e9 | 131 | kprobe_opcode_t insn = p->opcode; |
24ba613c | 132 | |
b21d55e9 RV |
133 | addr = p->addr; |
134 | brkp = KPROBE_ARM_BREAKPOINT_INSTRUCTION; | |
aceb487a | 135 | |
b21d55e9 RV |
136 | if (insn >= 0xe0000000) |
137 | brkp |= 0xe0000000; /* Unconditional instruction */ | |
138 | else | |
139 | brkp |= insn & 0xf0000000; /* Copy condition from insn */ | |
140 | } | |
aceb487a | 141 | |
b21d55e9 RV |
142 | patch_text(addr, brkp); |
143 | } | |
aceb487a | 144 | |
2003b7af FR |
145 | /* |
146 | * The actual disarming is done here on each CPU and synchronized using | |
147 | * stop_machine. This synchronization is necessary on SMP to avoid removing | |
148 | * a probe between the moment the 'Undefined Instruction' exception is raised | |
149 | * and the moment the exception handler reads the faulting instruction from | |
aceb487a JM |
150 | * memory. It is also needed to atomically set the two half-words of a 32-bit |
151 | * Thumb breakpoint. | |
2003b7af FR |
152 | */ |
153 | int __kprobes __arch_disarm_kprobe(void *p) | |
154 | { | |
155 | struct kprobe *kp = p; | |
b21d55e9 | 156 | void *addr = (void *)((uintptr_t)kp->addr & ~1); |
aceb487a | 157 | |
b21d55e9 | 158 | __patch_text(addr, kp->opcode); |
aceb487a | 159 | |
2003b7af FR |
160 | return 0; |
161 | } | |
162 | ||
24ba613c AS |
163 | void __kprobes arch_disarm_kprobe(struct kprobe *p) |
164 | { | |
0b5f9c00 | 165 | stop_machine(__arch_disarm_kprobe, p, cpu_online_mask); |
24ba613c AS |
166 | } |
167 | ||
168 | void __kprobes arch_remove_kprobe(struct kprobe *p) | |
169 | { | |
170 | if (p->ainsn.insn) { | |
24ba613c | 171 | free_insn_slot(p->ainsn.insn, 0); |
24ba613c AS |
172 | p->ainsn.insn = NULL; |
173 | } | |
174 | } | |
175 | ||
176 | static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb) | |
177 | { | |
178 | kcb->prev_kprobe.kp = kprobe_running(); | |
179 | kcb->prev_kprobe.status = kcb->kprobe_status; | |
180 | } | |
181 | ||
182 | static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb) | |
183 | { | |
1436c1aa | 184 | __this_cpu_write(current_kprobe, kcb->prev_kprobe.kp); |
24ba613c AS |
185 | kcb->kprobe_status = kcb->prev_kprobe.status; |
186 | } | |
187 | ||
188 | static void __kprobes set_current_kprobe(struct kprobe *p) | |
189 | { | |
1436c1aa | 190 | __this_cpu_write(current_kprobe, p); |
24ba613c AS |
191 | } |
192 | ||
3cca6c24 JM |
193 | static void __kprobes |
194 | singlestep_skip(struct kprobe *p, struct pt_regs *regs) | |
195 | { | |
196 | #ifdef CONFIG_THUMB2_KERNEL | |
197 | regs->ARM_cpsr = it_advance(regs->ARM_cpsr); | |
198 | if (is_wide_instruction(p->opcode)) | |
199 | regs->ARM_pc += 4; | |
200 | else | |
201 | regs->ARM_pc += 2; | |
202 | #else | |
203 | regs->ARM_pc += 4; | |
204 | #endif | |
205 | } | |
206 | ||
c6a7d97d JM |
207 | static inline void __kprobes |
208 | singlestep(struct kprobe *p, struct pt_regs *regs, struct kprobe_ctlblk *kcb) | |
24ba613c | 209 | { |
7579f4b3 | 210 | p->ainsn.insn_singlestep(p->opcode, &p->ainsn, regs); |
24ba613c AS |
211 | } |
212 | ||
213 | /* | |
214 | * Called with IRQs disabled. IRQs must remain disabled from that point | |
215 | * all the way until processing this kprobe is complete. The current | |
216 | * kprobes implementation cannot process more than one nested level of | |
217 | * kprobe, and that level is reserved for user kprobe handlers, so we can't | |
218 | * risk encountering a new kprobe in an interrupt handler. | |
219 | */ | |
220 | void __kprobes kprobe_handler(struct pt_regs *regs) | |
221 | { | |
222 | struct kprobe *p, *cur; | |
223 | struct kprobe_ctlblk *kcb; | |
24ba613c AS |
224 | |
225 | kcb = get_kprobe_ctlblk(); | |
226 | cur = kprobe_running(); | |
aceb487a JM |
227 | |
228 | #ifdef CONFIG_THUMB2_KERNEL | |
229 | /* | |
230 | * First look for a probe which was registered using an address with | |
231 | * bit 0 set, this is the usual situation for pointers to Thumb code. | |
232 | * If not found, fallback to looking for one with bit 0 clear. | |
233 | */ | |
234 | p = get_kprobe((kprobe_opcode_t *)(regs->ARM_pc | 1)); | |
235 | if (!p) | |
236 | p = get_kprobe((kprobe_opcode_t *)regs->ARM_pc); | |
237 | ||
238 | #else /* ! CONFIG_THUMB2_KERNEL */ | |
239 | p = get_kprobe((kprobe_opcode_t *)regs->ARM_pc); | |
240 | #endif | |
24ba613c AS |
241 | |
242 | if (p) { | |
243 | if (cur) { | |
244 | /* Kprobe is pending, so we're recursing. */ | |
245 | switch (kcb->kprobe_status) { | |
246 | case KPROBE_HIT_ACTIVE: | |
247 | case KPROBE_HIT_SSDONE: | |
248 | /* A pre- or post-handler probe got us here. */ | |
249 | kprobes_inc_nmissed_count(p); | |
250 | save_previous_kprobe(kcb); | |
251 | set_current_kprobe(p); | |
252 | kcb->kprobe_status = KPROBE_REENTER; | |
253 | singlestep(p, regs, kcb); | |
254 | restore_previous_kprobe(kcb); | |
255 | break; | |
256 | default: | |
257 | /* impossible cases */ | |
258 | BUG(); | |
259 | } | |
3cca6c24 JM |
260 | } else if (p->ainsn.insn_check_cc(regs->ARM_cpsr)) { |
261 | /* Probe hit and conditional execution check ok. */ | |
24ba613c AS |
262 | set_current_kprobe(p); |
263 | kcb->kprobe_status = KPROBE_HIT_ACTIVE; | |
264 | ||
265 | /* | |
266 | * If we have no pre-handler or it returned 0, we | |
267 | * continue with normal processing. If we have a | |
268 | * pre-handler and it returned non-zero, it prepped | |
269 | * for calling the break_handler below on re-entry, | |
270 | * so get out doing nothing more here. | |
271 | */ | |
272 | if (!p->pre_handler || !p->pre_handler(p, regs)) { | |
273 | kcb->kprobe_status = KPROBE_HIT_SS; | |
274 | singlestep(p, regs, kcb); | |
275 | if (p->post_handler) { | |
276 | kcb->kprobe_status = KPROBE_HIT_SSDONE; | |
277 | p->post_handler(p, regs, 0); | |
278 | } | |
279 | reset_current_kprobe(); | |
280 | } | |
3cca6c24 JM |
281 | } else { |
282 | /* | |
283 | * Probe hit but conditional execution check failed, | |
284 | * so just skip the instruction and continue as if | |
285 | * nothing had happened. | |
286 | */ | |
287 | singlestep_skip(p, regs); | |
24ba613c AS |
288 | } |
289 | } else if (cur) { | |
290 | /* We probably hit a jprobe. Call its break handler. */ | |
291 | if (cur->break_handler && cur->break_handler(cur, regs)) { | |
292 | kcb->kprobe_status = KPROBE_HIT_SS; | |
293 | singlestep(cur, regs, kcb); | |
294 | if (cur->post_handler) { | |
295 | kcb->kprobe_status = KPROBE_HIT_SSDONE; | |
296 | cur->post_handler(cur, regs, 0); | |
297 | } | |
298 | } | |
299 | reset_current_kprobe(); | |
300 | } else { | |
301 | /* | |
302 | * The probe was removed and a race is in progress. | |
303 | * There is nothing we can do about it. Let's restart | |
304 | * the instruction. By the time we can restart, the | |
305 | * real instruction will be there. | |
306 | */ | |
307 | } | |
308 | } | |
309 | ||
3305a607 | 310 | static int __kprobes kprobe_trap_handler(struct pt_regs *regs, unsigned int instr) |
24ba613c | 311 | { |
3305a607 NP |
312 | unsigned long flags; |
313 | local_irq_save(flags); | |
24ba613c | 314 | kprobe_handler(regs); |
3305a607 | 315 | local_irq_restore(flags); |
24ba613c AS |
316 | return 0; |
317 | } | |
318 | ||
319 | int __kprobes kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr) | |
320 | { | |
321 | struct kprobe *cur = kprobe_running(); | |
322 | struct kprobe_ctlblk *kcb = get_kprobe_ctlblk(); | |
323 | ||
324 | switch (kcb->kprobe_status) { | |
325 | case KPROBE_HIT_SS: | |
326 | case KPROBE_REENTER: | |
327 | /* | |
328 | * We are here because the instruction being single | |
329 | * stepped caused a page fault. We reset the current | |
330 | * kprobe and the PC to point back to the probe address | |
331 | * and allow the page fault handler to continue as a | |
332 | * normal page fault. | |
333 | */ | |
334 | regs->ARM_pc = (long)cur->addr; | |
335 | if (kcb->kprobe_status == KPROBE_REENTER) { | |
336 | restore_previous_kprobe(kcb); | |
337 | } else { | |
338 | reset_current_kprobe(); | |
339 | } | |
340 | break; | |
341 | ||
342 | case KPROBE_HIT_ACTIVE: | |
343 | case KPROBE_HIT_SSDONE: | |
344 | /* | |
345 | * We increment the nmissed count for accounting, | |
346 | * we can also use npre/npostfault count for accounting | |
347 | * these specific fault cases. | |
348 | */ | |
349 | kprobes_inc_nmissed_count(cur); | |
350 | ||
351 | /* | |
352 | * We come here because instructions in the pre/post | |
353 | * handler caused the page_fault, this could happen | |
354 | * if handler tries to access user space by | |
355 | * copy_from_user(), get_user() etc. Let the | |
356 | * user-specified handler try to fix it. | |
357 | */ | |
358 | if (cur->fault_handler && cur->fault_handler(cur, regs, fsr)) | |
359 | return 1; | |
360 | break; | |
361 | ||
362 | default: | |
363 | break; | |
364 | } | |
365 | ||
366 | return 0; | |
367 | } | |
368 | ||
369 | int __kprobes kprobe_exceptions_notify(struct notifier_block *self, | |
370 | unsigned long val, void *data) | |
371 | { | |
372 | /* | |
373 | * notify_die() is currently never called on ARM, | |
374 | * so this callback is currently empty. | |
375 | */ | |
376 | return NOTIFY_DONE; | |
377 | } | |
378 | ||
379 | /* | |
380 | * When a retprobed function returns, trampoline_handler() is called, | |
381 | * calling the kretprobe's handler. We construct a struct pt_regs to | |
382 | * give a view of registers r0-r11 to the user return-handler. This is | |
383 | * not a complete pt_regs structure, but that should be plenty sufficient | |
384 | * for kretprobe handlers which should normally be interested in r0 only | |
385 | * anyway. | |
386 | */ | |
e0773410 | 387 | void __naked __kprobes kretprobe_trampoline(void) |
24ba613c AS |
388 | { |
389 | __asm__ __volatile__ ( | |
390 | "stmdb sp!, {r0 - r11} \n\t" | |
391 | "mov r0, sp \n\t" | |
392 | "bl trampoline_handler \n\t" | |
393 | "mov lr, r0 \n\t" | |
394 | "ldmia sp!, {r0 - r11} \n\t" | |
de419840 JM |
395 | #ifdef CONFIG_THUMB2_KERNEL |
396 | "bx lr \n\t" | |
397 | #else | |
24ba613c | 398 | "mov pc, lr \n\t" |
de419840 | 399 | #endif |
24ba613c AS |
400 | : : : "memory"); |
401 | } | |
402 | ||
403 | /* Called from kretprobe_trampoline */ | |
404 | static __used __kprobes void *trampoline_handler(struct pt_regs *regs) | |
405 | { | |
406 | struct kretprobe_instance *ri = NULL; | |
407 | struct hlist_head *head, empty_rp; | |
b67bfe0d | 408 | struct hlist_node *tmp; |
24ba613c AS |
409 | unsigned long flags, orig_ret_address = 0; |
410 | unsigned long trampoline_address = (unsigned long)&kretprobe_trampoline; | |
411 | ||
412 | INIT_HLIST_HEAD(&empty_rp); | |
ef53d9c5 | 413 | kretprobe_hash_lock(current, &head, &flags); |
24ba613c AS |
414 | |
415 | /* | |
416 | * It is possible to have multiple instances associated with a given | |
417 | * task either because multiple functions in the call path have | |
418 | * a return probe installed on them, and/or more than one return | |
419 | * probe was registered for a target function. | |
420 | * | |
421 | * We can handle this because: | |
422 | * - instances are always inserted at the head of the list | |
423 | * - when multiple return probes are registered for the same | |
424 | * function, the first instance's ret_addr will point to the | |
425 | * real return address, and all the rest will point to | |
426 | * kretprobe_trampoline | |
427 | */ | |
b67bfe0d | 428 | hlist_for_each_entry_safe(ri, tmp, head, hlist) { |
24ba613c AS |
429 | if (ri->task != current) |
430 | /* another task is sharing our hash bucket */ | |
431 | continue; | |
432 | ||
433 | if (ri->rp && ri->rp->handler) { | |
1436c1aa | 434 | __this_cpu_write(current_kprobe, &ri->rp->kp); |
24ba613c AS |
435 | get_kprobe_ctlblk()->kprobe_status = KPROBE_HIT_ACTIVE; |
436 | ri->rp->handler(ri, regs); | |
1436c1aa | 437 | __this_cpu_write(current_kprobe, NULL); |
24ba613c AS |
438 | } |
439 | ||
440 | orig_ret_address = (unsigned long)ri->ret_addr; | |
441 | recycle_rp_inst(ri, &empty_rp); | |
442 | ||
443 | if (orig_ret_address != trampoline_address) | |
444 | /* | |
445 | * This is the real return address. Any other | |
446 | * instances associated with this task are for | |
447 | * other calls deeper on the call stack | |
448 | */ | |
449 | break; | |
450 | } | |
451 | ||
452 | kretprobe_assert(ri, orig_ret_address, trampoline_address); | |
ef53d9c5 | 453 | kretprobe_hash_unlock(current, &flags); |
24ba613c | 454 | |
b67bfe0d | 455 | hlist_for_each_entry_safe(ri, tmp, &empty_rp, hlist) { |
24ba613c AS |
456 | hlist_del(&ri->hlist); |
457 | kfree(ri); | |
458 | } | |
459 | ||
460 | return (void *)orig_ret_address; | |
461 | } | |
462 | ||
24ba613c AS |
463 | void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri, |
464 | struct pt_regs *regs) | |
465 | { | |
466 | ri->ret_addr = (kprobe_opcode_t *)regs->ARM_lr; | |
467 | ||
468 | /* Replace the return addr with trampoline addr. */ | |
469 | regs->ARM_lr = (unsigned long)&kretprobe_trampoline; | |
470 | } | |
471 | ||
472 | int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs) | |
473 | { | |
474 | struct jprobe *jp = container_of(p, struct jprobe, kp); | |
475 | struct kprobe_ctlblk *kcb = get_kprobe_ctlblk(); | |
476 | long sp_addr = regs->ARM_sp; | |
de419840 | 477 | long cpsr; |
24ba613c AS |
478 | |
479 | kcb->jprobe_saved_regs = *regs; | |
480 | memcpy(kcb->jprobes_stack, (void *)sp_addr, MIN_STACK_SIZE(sp_addr)); | |
481 | regs->ARM_pc = (long)jp->entry; | |
de419840 JM |
482 | |
483 | cpsr = regs->ARM_cpsr | PSR_I_BIT; | |
484 | #ifdef CONFIG_THUMB2_KERNEL | |
485 | /* Set correct Thumb state in cpsr */ | |
486 | if (regs->ARM_pc & 1) | |
487 | cpsr |= PSR_T_BIT; | |
488 | else | |
489 | cpsr &= ~PSR_T_BIT; | |
490 | #endif | |
491 | regs->ARM_cpsr = cpsr; | |
492 | ||
24ba613c AS |
493 | preempt_disable(); |
494 | return 1; | |
495 | } | |
496 | ||
497 | void __kprobes jprobe_return(void) | |
498 | { | |
499 | struct kprobe_ctlblk *kcb = get_kprobe_ctlblk(); | |
500 | ||
501 | __asm__ __volatile__ ( | |
502 | /* | |
503 | * Setup an empty pt_regs. Fill SP and PC fields as | |
504 | * they're needed by longjmp_break_handler. | |
782a0fd1 MW |
505 | * |
506 | * We allocate some slack between the original SP and start of | |
507 | * our fabricated regs. To be precise we want to have worst case | |
508 | * covered which is STMFD with all 16 regs so we allocate 2 * | |
509 | * sizeof(struct_pt_regs)). | |
510 | * | |
511 | * This is to prevent any simulated instruction from writing | |
512 | * over the regs when they are accessing the stack. | |
24ba613c | 513 | */ |
de419840 JM |
514 | #ifdef CONFIG_THUMB2_KERNEL |
515 | "sub r0, %0, %1 \n\t" | |
516 | "mov sp, r0 \n\t" | |
517 | #else | |
24ba613c | 518 | "sub sp, %0, %1 \n\t" |
de419840 | 519 | #endif |
24ba613c AS |
520 | "ldr r0, ="__stringify(JPROBE_MAGIC_ADDR)"\n\t" |
521 | "str %0, [sp, %2] \n\t" | |
522 | "str r0, [sp, %3] \n\t" | |
523 | "mov r0, sp \n\t" | |
524 | "bl kprobe_handler \n\t" | |
525 | ||
526 | /* | |
527 | * Return to the context saved by setjmp_pre_handler | |
528 | * and restored by longjmp_break_handler. | |
529 | */ | |
de419840 JM |
530 | #ifdef CONFIG_THUMB2_KERNEL |
531 | "ldr lr, [sp, %2] \n\t" /* lr = saved sp */ | |
532 | "ldrd r0, r1, [sp, %5] \n\t" /* r0,r1 = saved lr,pc */ | |
533 | "ldr r2, [sp, %4] \n\t" /* r2 = saved psr */ | |
534 | "stmdb lr!, {r0, r1, r2} \n\t" /* push saved lr and */ | |
535 | /* rfe context */ | |
536 | "ldmia sp, {r0 - r12} \n\t" | |
537 | "mov sp, lr \n\t" | |
538 | "ldr lr, [sp], #4 \n\t" | |
539 | "rfeia sp! \n\t" | |
540 | #else | |
24ba613c AS |
541 | "ldr r0, [sp, %4] \n\t" |
542 | "msr cpsr_cxsf, r0 \n\t" | |
543 | "ldmia sp, {r0 - pc} \n\t" | |
de419840 | 544 | #endif |
24ba613c AS |
545 | : |
546 | : "r" (kcb->jprobe_saved_regs.ARM_sp), | |
782a0fd1 | 547 | "I" (sizeof(struct pt_regs) * 2), |
24ba613c AS |
548 | "J" (offsetof(struct pt_regs, ARM_sp)), |
549 | "J" (offsetof(struct pt_regs, ARM_pc)), | |
de419840 JM |
550 | "J" (offsetof(struct pt_regs, ARM_cpsr)), |
551 | "J" (offsetof(struct pt_regs, ARM_lr)) | |
24ba613c AS |
552 | : "memory", "cc"); |
553 | } | |
554 | ||
555 | int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs) | |
556 | { | |
557 | struct kprobe_ctlblk *kcb = get_kprobe_ctlblk(); | |
558 | long stack_addr = kcb->jprobe_saved_regs.ARM_sp; | |
559 | long orig_sp = regs->ARM_sp; | |
560 | struct jprobe *jp = container_of(p, struct jprobe, kp); | |
561 | ||
562 | if (regs->ARM_pc == JPROBE_MAGIC_ADDR) { | |
563 | if (orig_sp != stack_addr) { | |
564 | struct pt_regs *saved_regs = | |
565 | (struct pt_regs *)kcb->jprobe_saved_regs.ARM_sp; | |
566 | printk("current sp %lx does not match saved sp %lx\n", | |
567 | orig_sp, stack_addr); | |
568 | printk("Saved registers for jprobe %p\n", jp); | |
569 | show_regs(saved_regs); | |
570 | printk("Current registers\n"); | |
571 | show_regs(regs); | |
572 | BUG(); | |
573 | } | |
574 | *regs = kcb->jprobe_saved_regs; | |
575 | memcpy((void *)stack_addr, kcb->jprobes_stack, | |
576 | MIN_STACK_SIZE(stack_addr)); | |
577 | preempt_enable_no_resched(); | |
578 | return 1; | |
579 | } | |
580 | return 0; | |
581 | } | |
582 | ||
b24061fa NP |
583 | int __kprobes arch_trampoline_kprobe(struct kprobe *p) |
584 | { | |
585 | return 0; | |
586 | } | |
587 | ||
aceb487a JM |
588 | #ifdef CONFIG_THUMB2_KERNEL |
589 | ||
590 | static struct undef_hook kprobes_thumb16_break_hook = { | |
591 | .instr_mask = 0xffff, | |
592 | .instr_val = KPROBE_THUMB16_BREAKPOINT_INSTRUCTION, | |
593 | .cpsr_mask = MODE_MASK, | |
594 | .cpsr_val = SVC_MODE, | |
595 | .fn = kprobe_trap_handler, | |
596 | }; | |
597 | ||
598 | static struct undef_hook kprobes_thumb32_break_hook = { | |
599 | .instr_mask = 0xffffffff, | |
600 | .instr_val = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION, | |
601 | .cpsr_mask = MODE_MASK, | |
602 | .cpsr_val = SVC_MODE, | |
603 | .fn = kprobe_trap_handler, | |
604 | }; | |
605 | ||
606 | #else /* !CONFIG_THUMB2_KERNEL */ | |
607 | ||
608 | static struct undef_hook kprobes_arm_break_hook = { | |
3b269455 | 609 | .instr_mask = 0x0fffffff, |
aceb487a | 610 | .instr_val = KPROBE_ARM_BREAKPOINT_INSTRUCTION, |
24ba613c AS |
611 | .cpsr_mask = MODE_MASK, |
612 | .cpsr_val = SVC_MODE, | |
613 | .fn = kprobe_trap_handler, | |
614 | }; | |
615 | ||
aceb487a JM |
616 | #endif /* !CONFIG_THUMB2_KERNEL */ |
617 | ||
24ba613c AS |
618 | int __init arch_init_kprobes() |
619 | { | |
eb73ea97 | 620 | arm_probes_decode_init(); |
aceb487a JM |
621 | #ifdef CONFIG_THUMB2_KERNEL |
622 | register_undef_hook(&kprobes_thumb16_break_hook); | |
623 | register_undef_hook(&kprobes_thumb32_break_hook); | |
624 | #else | |
625 | register_undef_hook(&kprobes_arm_break_hook); | |
626 | #endif | |
24ba613c AS |
627 | return 0; |
628 | } |