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24ba613c AS |
1 | /* |
2 | * arch/arm/kernel/kprobes.c | |
3 | * | |
4 | * Kprobes on ARM | |
5 | * | |
6 | * Abhishek Sagar <sagar.abhishek@gmail.com> | |
7 | * Copyright (C) 2006, 2007 Motorola Inc. | |
8 | * | |
9 | * Nicolas Pitre <nico@marvell.com> | |
10 | * Copyright (C) 2007 Marvell Ltd. | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License version 2 as | |
14 | * published by the Free Software Foundation. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * General Public License for more details. | |
20 | */ | |
21 | ||
22 | #include <linux/kernel.h> | |
23 | #include <linux/kprobes.h> | |
24 | #include <linux/module.h> | |
5a0e3ad6 | 25 | #include <linux/slab.h> |
2003b7af | 26 | #include <linux/stop_machine.h> |
24ba613c AS |
27 | #include <linux/stringify.h> |
28 | #include <asm/traps.h> | |
29 | #include <asm/cacheflush.h> | |
21254ebc DL |
30 | #include <linux/percpu.h> |
31 | #include <linux/bug.h> | |
24ba613c | 32 | |
221bf15f | 33 | #include "kprobes.h" |
b21d55e9 | 34 | #include "patch.h" |
221bf15f | 35 | |
24ba613c AS |
36 | #define MIN_STACK_SIZE(addr) \ |
37 | min((unsigned long)MAX_STACK_SIZE, \ | |
38 | (unsigned long)current_thread_info() + THREAD_START_SP - (addr)) | |
39 | ||
aceb487a | 40 | #define flush_insns(addr, size) \ |
24ba613c AS |
41 | flush_icache_range((unsigned long)(addr), \ |
42 | (unsigned long)(addr) + \ | |
aceb487a | 43 | (size)) |
24ba613c AS |
44 | |
45 | /* Used as a marker in ARM_pc to note when we're in a jprobe. */ | |
46 | #define JPROBE_MAGIC_ADDR 0xffffffff | |
47 | ||
48 | DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL; | |
49 | DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk); | |
50 | ||
51 | ||
52 | int __kprobes arch_prepare_kprobe(struct kprobe *p) | |
53 | { | |
54 | kprobe_opcode_t insn; | |
55 | kprobe_opcode_t tmp_insn[MAX_INSN_SIZE]; | |
56 | unsigned long addr = (unsigned long)p->addr; | |
e2960317 | 57 | bool thumb; |
24371707 | 58 | kprobe_decode_insn_t *decode_insn; |
3e6cd394 | 59 | const union decode_action *actions; |
24ba613c AS |
60 | int is; |
61 | ||
24371707 | 62 | if (in_exception_text(addr)) |
24ba613c AS |
63 | return -EINVAL; |
64 | ||
24371707 | 65 | #ifdef CONFIG_THUMB2_KERNEL |
e2960317 | 66 | thumb = true; |
24371707 JM |
67 | addr &= ~1; /* Bit 0 would normally be set to indicate Thumb code */ |
68 | insn = ((u16 *)addr)[0]; | |
69 | if (is_wide_instruction(insn)) { | |
70 | insn <<= 16; | |
71 | insn |= ((u16 *)addr)[1]; | |
72 | decode_insn = thumb32_kprobe_decode_insn; | |
3e6cd394 DL |
73 | actions = kprobes_t32_actions; |
74 | } else { | |
24371707 | 75 | decode_insn = thumb16_kprobe_decode_insn; |
3e6cd394 DL |
76 | actions = kprobes_t16_actions; |
77 | } | |
24371707 | 78 | #else /* !CONFIG_THUMB2_KERNEL */ |
e2960317 | 79 | thumb = false; |
24371707 JM |
80 | if (addr & 0x3) |
81 | return -EINVAL; | |
24ba613c | 82 | insn = *p->addr; |
24371707 | 83 | decode_insn = arm_kprobe_decode_insn; |
3e6cd394 | 84 | actions = kprobes_arm_actions; |
24371707 JM |
85 | #endif |
86 | ||
24ba613c AS |
87 | p->opcode = insn; |
88 | p->ainsn.insn = tmp_insn; | |
89 | ||
3e6cd394 | 90 | switch ((*decode_insn)(insn, &p->ainsn, actions)) { |
24ba613c AS |
91 | case INSN_REJECTED: /* not supported */ |
92 | return -EINVAL; | |
93 | ||
94 | case INSN_GOOD: /* instruction uses slot */ | |
95 | p->ainsn.insn = get_insn_slot(); | |
96 | if (!p->ainsn.insn) | |
97 | return -ENOMEM; | |
98 | for (is = 0; is < MAX_INSN_SIZE; ++is) | |
99 | p->ainsn.insn[is] = tmp_insn[is]; | |
aceb487a JM |
100 | flush_insns(p->ainsn.insn, |
101 | sizeof(p->ainsn.insn[0]) * MAX_INSN_SIZE); | |
e2960317 JM |
102 | p->ainsn.insn_fn = (kprobe_insn_fn_t *) |
103 | ((uintptr_t)p->ainsn.insn | thumb); | |
24ba613c AS |
104 | break; |
105 | ||
106 | case INSN_GOOD_NO_SLOT: /* instruction doesn't need insn slot */ | |
107 | p->ainsn.insn = NULL; | |
108 | break; | |
109 | } | |
110 | ||
111 | return 0; | |
112 | } | |
113 | ||
114 | void __kprobes arch_arm_kprobe(struct kprobe *p) | |
115 | { | |
b21d55e9 RV |
116 | unsigned int brkp; |
117 | void *addr; | |
118 | ||
119 | if (IS_ENABLED(CONFIG_THUMB2_KERNEL)) { | |
120 | /* Remove any Thumb flag */ | |
121 | addr = (void *)((uintptr_t)p->addr & ~1); | |
122 | ||
123 | if (is_wide_instruction(p->opcode)) | |
124 | brkp = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION; | |
125 | else | |
126 | brkp = KPROBE_THUMB16_BREAKPOINT_INSTRUCTION; | |
aceb487a | 127 | } else { |
b21d55e9 | 128 | kprobe_opcode_t insn = p->opcode; |
24ba613c | 129 | |
b21d55e9 RV |
130 | addr = p->addr; |
131 | brkp = KPROBE_ARM_BREAKPOINT_INSTRUCTION; | |
aceb487a | 132 | |
b21d55e9 RV |
133 | if (insn >= 0xe0000000) |
134 | brkp |= 0xe0000000; /* Unconditional instruction */ | |
135 | else | |
136 | brkp |= insn & 0xf0000000; /* Copy condition from insn */ | |
137 | } | |
aceb487a | 138 | |
b21d55e9 RV |
139 | patch_text(addr, brkp); |
140 | } | |
aceb487a | 141 | |
2003b7af FR |
142 | /* |
143 | * The actual disarming is done here on each CPU and synchronized using | |
144 | * stop_machine. This synchronization is necessary on SMP to avoid removing | |
145 | * a probe between the moment the 'Undefined Instruction' exception is raised | |
146 | * and the moment the exception handler reads the faulting instruction from | |
aceb487a JM |
147 | * memory. It is also needed to atomically set the two half-words of a 32-bit |
148 | * Thumb breakpoint. | |
2003b7af FR |
149 | */ |
150 | int __kprobes __arch_disarm_kprobe(void *p) | |
151 | { | |
152 | struct kprobe *kp = p; | |
b21d55e9 | 153 | void *addr = (void *)((uintptr_t)kp->addr & ~1); |
aceb487a | 154 | |
b21d55e9 | 155 | __patch_text(addr, kp->opcode); |
aceb487a | 156 | |
2003b7af FR |
157 | return 0; |
158 | } | |
159 | ||
24ba613c AS |
160 | void __kprobes arch_disarm_kprobe(struct kprobe *p) |
161 | { | |
0b5f9c00 | 162 | stop_machine(__arch_disarm_kprobe, p, cpu_online_mask); |
24ba613c AS |
163 | } |
164 | ||
165 | void __kprobes arch_remove_kprobe(struct kprobe *p) | |
166 | { | |
167 | if (p->ainsn.insn) { | |
24ba613c | 168 | free_insn_slot(p->ainsn.insn, 0); |
24ba613c AS |
169 | p->ainsn.insn = NULL; |
170 | } | |
171 | } | |
172 | ||
173 | static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb) | |
174 | { | |
175 | kcb->prev_kprobe.kp = kprobe_running(); | |
176 | kcb->prev_kprobe.status = kcb->kprobe_status; | |
177 | } | |
178 | ||
179 | static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb) | |
180 | { | |
1436c1aa | 181 | __this_cpu_write(current_kprobe, kcb->prev_kprobe.kp); |
24ba613c AS |
182 | kcb->kprobe_status = kcb->prev_kprobe.status; |
183 | } | |
184 | ||
185 | static void __kprobes set_current_kprobe(struct kprobe *p) | |
186 | { | |
1436c1aa | 187 | __this_cpu_write(current_kprobe, p); |
24ba613c AS |
188 | } |
189 | ||
3cca6c24 JM |
190 | static void __kprobes |
191 | singlestep_skip(struct kprobe *p, struct pt_regs *regs) | |
192 | { | |
193 | #ifdef CONFIG_THUMB2_KERNEL | |
194 | regs->ARM_cpsr = it_advance(regs->ARM_cpsr); | |
195 | if (is_wide_instruction(p->opcode)) | |
196 | regs->ARM_pc += 4; | |
197 | else | |
198 | regs->ARM_pc += 2; | |
199 | #else | |
200 | regs->ARM_pc += 4; | |
201 | #endif | |
202 | } | |
203 | ||
c6a7d97d JM |
204 | static inline void __kprobes |
205 | singlestep(struct kprobe *p, struct pt_regs *regs, struct kprobe_ctlblk *kcb) | |
24ba613c | 206 | { |
7579f4b3 | 207 | p->ainsn.insn_singlestep(p->opcode, &p->ainsn, regs); |
24ba613c AS |
208 | } |
209 | ||
210 | /* | |
211 | * Called with IRQs disabled. IRQs must remain disabled from that point | |
212 | * all the way until processing this kprobe is complete. The current | |
213 | * kprobes implementation cannot process more than one nested level of | |
214 | * kprobe, and that level is reserved for user kprobe handlers, so we can't | |
215 | * risk encountering a new kprobe in an interrupt handler. | |
216 | */ | |
217 | void __kprobes kprobe_handler(struct pt_regs *regs) | |
218 | { | |
219 | struct kprobe *p, *cur; | |
220 | struct kprobe_ctlblk *kcb; | |
24ba613c AS |
221 | |
222 | kcb = get_kprobe_ctlblk(); | |
223 | cur = kprobe_running(); | |
aceb487a JM |
224 | |
225 | #ifdef CONFIG_THUMB2_KERNEL | |
226 | /* | |
227 | * First look for a probe which was registered using an address with | |
228 | * bit 0 set, this is the usual situation for pointers to Thumb code. | |
229 | * If not found, fallback to looking for one with bit 0 clear. | |
230 | */ | |
231 | p = get_kprobe((kprobe_opcode_t *)(regs->ARM_pc | 1)); | |
232 | if (!p) | |
233 | p = get_kprobe((kprobe_opcode_t *)regs->ARM_pc); | |
234 | ||
235 | #else /* ! CONFIG_THUMB2_KERNEL */ | |
236 | p = get_kprobe((kprobe_opcode_t *)regs->ARM_pc); | |
237 | #endif | |
24ba613c AS |
238 | |
239 | if (p) { | |
240 | if (cur) { | |
241 | /* Kprobe is pending, so we're recursing. */ | |
242 | switch (kcb->kprobe_status) { | |
243 | case KPROBE_HIT_ACTIVE: | |
244 | case KPROBE_HIT_SSDONE: | |
245 | /* A pre- or post-handler probe got us here. */ | |
246 | kprobes_inc_nmissed_count(p); | |
247 | save_previous_kprobe(kcb); | |
248 | set_current_kprobe(p); | |
249 | kcb->kprobe_status = KPROBE_REENTER; | |
250 | singlestep(p, regs, kcb); | |
251 | restore_previous_kprobe(kcb); | |
252 | break; | |
253 | default: | |
254 | /* impossible cases */ | |
255 | BUG(); | |
256 | } | |
3cca6c24 JM |
257 | } else if (p->ainsn.insn_check_cc(regs->ARM_cpsr)) { |
258 | /* Probe hit and conditional execution check ok. */ | |
24ba613c AS |
259 | set_current_kprobe(p); |
260 | kcb->kprobe_status = KPROBE_HIT_ACTIVE; | |
261 | ||
262 | /* | |
263 | * If we have no pre-handler or it returned 0, we | |
264 | * continue with normal processing. If we have a | |
265 | * pre-handler and it returned non-zero, it prepped | |
266 | * for calling the break_handler below on re-entry, | |
267 | * so get out doing nothing more here. | |
268 | */ | |
269 | if (!p->pre_handler || !p->pre_handler(p, regs)) { | |
270 | kcb->kprobe_status = KPROBE_HIT_SS; | |
271 | singlestep(p, regs, kcb); | |
272 | if (p->post_handler) { | |
273 | kcb->kprobe_status = KPROBE_HIT_SSDONE; | |
274 | p->post_handler(p, regs, 0); | |
275 | } | |
276 | reset_current_kprobe(); | |
277 | } | |
3cca6c24 JM |
278 | } else { |
279 | /* | |
280 | * Probe hit but conditional execution check failed, | |
281 | * so just skip the instruction and continue as if | |
282 | * nothing had happened. | |
283 | */ | |
284 | singlestep_skip(p, regs); | |
24ba613c AS |
285 | } |
286 | } else if (cur) { | |
287 | /* We probably hit a jprobe. Call its break handler. */ | |
288 | if (cur->break_handler && cur->break_handler(cur, regs)) { | |
289 | kcb->kprobe_status = KPROBE_HIT_SS; | |
290 | singlestep(cur, regs, kcb); | |
291 | if (cur->post_handler) { | |
292 | kcb->kprobe_status = KPROBE_HIT_SSDONE; | |
293 | cur->post_handler(cur, regs, 0); | |
294 | } | |
295 | } | |
296 | reset_current_kprobe(); | |
297 | } else { | |
298 | /* | |
299 | * The probe was removed and a race is in progress. | |
300 | * There is nothing we can do about it. Let's restart | |
301 | * the instruction. By the time we can restart, the | |
302 | * real instruction will be there. | |
303 | */ | |
304 | } | |
305 | } | |
306 | ||
3305a607 | 307 | static int __kprobes kprobe_trap_handler(struct pt_regs *regs, unsigned int instr) |
24ba613c | 308 | { |
3305a607 NP |
309 | unsigned long flags; |
310 | local_irq_save(flags); | |
24ba613c | 311 | kprobe_handler(regs); |
3305a607 | 312 | local_irq_restore(flags); |
24ba613c AS |
313 | return 0; |
314 | } | |
315 | ||
316 | int __kprobes kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr) | |
317 | { | |
318 | struct kprobe *cur = kprobe_running(); | |
319 | struct kprobe_ctlblk *kcb = get_kprobe_ctlblk(); | |
320 | ||
321 | switch (kcb->kprobe_status) { | |
322 | case KPROBE_HIT_SS: | |
323 | case KPROBE_REENTER: | |
324 | /* | |
325 | * We are here because the instruction being single | |
326 | * stepped caused a page fault. We reset the current | |
327 | * kprobe and the PC to point back to the probe address | |
328 | * and allow the page fault handler to continue as a | |
329 | * normal page fault. | |
330 | */ | |
331 | regs->ARM_pc = (long)cur->addr; | |
332 | if (kcb->kprobe_status == KPROBE_REENTER) { | |
333 | restore_previous_kprobe(kcb); | |
334 | } else { | |
335 | reset_current_kprobe(); | |
336 | } | |
337 | break; | |
338 | ||
339 | case KPROBE_HIT_ACTIVE: | |
340 | case KPROBE_HIT_SSDONE: | |
341 | /* | |
342 | * We increment the nmissed count for accounting, | |
343 | * we can also use npre/npostfault count for accounting | |
344 | * these specific fault cases. | |
345 | */ | |
346 | kprobes_inc_nmissed_count(cur); | |
347 | ||
348 | /* | |
349 | * We come here because instructions in the pre/post | |
350 | * handler caused the page_fault, this could happen | |
351 | * if handler tries to access user space by | |
352 | * copy_from_user(), get_user() etc. Let the | |
353 | * user-specified handler try to fix it. | |
354 | */ | |
355 | if (cur->fault_handler && cur->fault_handler(cur, regs, fsr)) | |
356 | return 1; | |
357 | break; | |
358 | ||
359 | default: | |
360 | break; | |
361 | } | |
362 | ||
363 | return 0; | |
364 | } | |
365 | ||
366 | int __kprobes kprobe_exceptions_notify(struct notifier_block *self, | |
367 | unsigned long val, void *data) | |
368 | { | |
369 | /* | |
370 | * notify_die() is currently never called on ARM, | |
371 | * so this callback is currently empty. | |
372 | */ | |
373 | return NOTIFY_DONE; | |
374 | } | |
375 | ||
376 | /* | |
377 | * When a retprobed function returns, trampoline_handler() is called, | |
378 | * calling the kretprobe's handler. We construct a struct pt_regs to | |
379 | * give a view of registers r0-r11 to the user return-handler. This is | |
380 | * not a complete pt_regs structure, but that should be plenty sufficient | |
381 | * for kretprobe handlers which should normally be interested in r0 only | |
382 | * anyway. | |
383 | */ | |
e0773410 | 384 | void __naked __kprobes kretprobe_trampoline(void) |
24ba613c AS |
385 | { |
386 | __asm__ __volatile__ ( | |
387 | "stmdb sp!, {r0 - r11} \n\t" | |
388 | "mov r0, sp \n\t" | |
389 | "bl trampoline_handler \n\t" | |
390 | "mov lr, r0 \n\t" | |
391 | "ldmia sp!, {r0 - r11} \n\t" | |
de419840 JM |
392 | #ifdef CONFIG_THUMB2_KERNEL |
393 | "bx lr \n\t" | |
394 | #else | |
24ba613c | 395 | "mov pc, lr \n\t" |
de419840 | 396 | #endif |
24ba613c AS |
397 | : : : "memory"); |
398 | } | |
399 | ||
400 | /* Called from kretprobe_trampoline */ | |
401 | static __used __kprobes void *trampoline_handler(struct pt_regs *regs) | |
402 | { | |
403 | struct kretprobe_instance *ri = NULL; | |
404 | struct hlist_head *head, empty_rp; | |
b67bfe0d | 405 | struct hlist_node *tmp; |
24ba613c AS |
406 | unsigned long flags, orig_ret_address = 0; |
407 | unsigned long trampoline_address = (unsigned long)&kretprobe_trampoline; | |
408 | ||
409 | INIT_HLIST_HEAD(&empty_rp); | |
ef53d9c5 | 410 | kretprobe_hash_lock(current, &head, &flags); |
24ba613c AS |
411 | |
412 | /* | |
413 | * It is possible to have multiple instances associated with a given | |
414 | * task either because multiple functions in the call path have | |
415 | * a return probe installed on them, and/or more than one return | |
416 | * probe was registered for a target function. | |
417 | * | |
418 | * We can handle this because: | |
419 | * - instances are always inserted at the head of the list | |
420 | * - when multiple return probes are registered for the same | |
421 | * function, the first instance's ret_addr will point to the | |
422 | * real return address, and all the rest will point to | |
423 | * kretprobe_trampoline | |
424 | */ | |
b67bfe0d | 425 | hlist_for_each_entry_safe(ri, tmp, head, hlist) { |
24ba613c AS |
426 | if (ri->task != current) |
427 | /* another task is sharing our hash bucket */ | |
428 | continue; | |
429 | ||
430 | if (ri->rp && ri->rp->handler) { | |
1436c1aa | 431 | __this_cpu_write(current_kprobe, &ri->rp->kp); |
24ba613c AS |
432 | get_kprobe_ctlblk()->kprobe_status = KPROBE_HIT_ACTIVE; |
433 | ri->rp->handler(ri, regs); | |
1436c1aa | 434 | __this_cpu_write(current_kprobe, NULL); |
24ba613c AS |
435 | } |
436 | ||
437 | orig_ret_address = (unsigned long)ri->ret_addr; | |
438 | recycle_rp_inst(ri, &empty_rp); | |
439 | ||
440 | if (orig_ret_address != trampoline_address) | |
441 | /* | |
442 | * This is the real return address. Any other | |
443 | * instances associated with this task are for | |
444 | * other calls deeper on the call stack | |
445 | */ | |
446 | break; | |
447 | } | |
448 | ||
449 | kretprobe_assert(ri, orig_ret_address, trampoline_address); | |
ef53d9c5 | 450 | kretprobe_hash_unlock(current, &flags); |
24ba613c | 451 | |
b67bfe0d | 452 | hlist_for_each_entry_safe(ri, tmp, &empty_rp, hlist) { |
24ba613c AS |
453 | hlist_del(&ri->hlist); |
454 | kfree(ri); | |
455 | } | |
456 | ||
457 | return (void *)orig_ret_address; | |
458 | } | |
459 | ||
24ba613c AS |
460 | void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri, |
461 | struct pt_regs *regs) | |
462 | { | |
463 | ri->ret_addr = (kprobe_opcode_t *)regs->ARM_lr; | |
464 | ||
465 | /* Replace the return addr with trampoline addr. */ | |
466 | regs->ARM_lr = (unsigned long)&kretprobe_trampoline; | |
467 | } | |
468 | ||
469 | int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs) | |
470 | { | |
471 | struct jprobe *jp = container_of(p, struct jprobe, kp); | |
472 | struct kprobe_ctlblk *kcb = get_kprobe_ctlblk(); | |
473 | long sp_addr = regs->ARM_sp; | |
de419840 | 474 | long cpsr; |
24ba613c AS |
475 | |
476 | kcb->jprobe_saved_regs = *regs; | |
477 | memcpy(kcb->jprobes_stack, (void *)sp_addr, MIN_STACK_SIZE(sp_addr)); | |
478 | regs->ARM_pc = (long)jp->entry; | |
de419840 JM |
479 | |
480 | cpsr = regs->ARM_cpsr | PSR_I_BIT; | |
481 | #ifdef CONFIG_THUMB2_KERNEL | |
482 | /* Set correct Thumb state in cpsr */ | |
483 | if (regs->ARM_pc & 1) | |
484 | cpsr |= PSR_T_BIT; | |
485 | else | |
486 | cpsr &= ~PSR_T_BIT; | |
487 | #endif | |
488 | regs->ARM_cpsr = cpsr; | |
489 | ||
24ba613c AS |
490 | preempt_disable(); |
491 | return 1; | |
492 | } | |
493 | ||
494 | void __kprobes jprobe_return(void) | |
495 | { | |
496 | struct kprobe_ctlblk *kcb = get_kprobe_ctlblk(); | |
497 | ||
498 | __asm__ __volatile__ ( | |
499 | /* | |
500 | * Setup an empty pt_regs. Fill SP and PC fields as | |
501 | * they're needed by longjmp_break_handler. | |
782a0fd1 MW |
502 | * |
503 | * We allocate some slack between the original SP and start of | |
504 | * our fabricated regs. To be precise we want to have worst case | |
505 | * covered which is STMFD with all 16 regs so we allocate 2 * | |
506 | * sizeof(struct_pt_regs)). | |
507 | * | |
508 | * This is to prevent any simulated instruction from writing | |
509 | * over the regs when they are accessing the stack. | |
24ba613c | 510 | */ |
de419840 JM |
511 | #ifdef CONFIG_THUMB2_KERNEL |
512 | "sub r0, %0, %1 \n\t" | |
513 | "mov sp, r0 \n\t" | |
514 | #else | |
24ba613c | 515 | "sub sp, %0, %1 \n\t" |
de419840 | 516 | #endif |
24ba613c AS |
517 | "ldr r0, ="__stringify(JPROBE_MAGIC_ADDR)"\n\t" |
518 | "str %0, [sp, %2] \n\t" | |
519 | "str r0, [sp, %3] \n\t" | |
520 | "mov r0, sp \n\t" | |
521 | "bl kprobe_handler \n\t" | |
522 | ||
523 | /* | |
524 | * Return to the context saved by setjmp_pre_handler | |
525 | * and restored by longjmp_break_handler. | |
526 | */ | |
de419840 JM |
527 | #ifdef CONFIG_THUMB2_KERNEL |
528 | "ldr lr, [sp, %2] \n\t" /* lr = saved sp */ | |
529 | "ldrd r0, r1, [sp, %5] \n\t" /* r0,r1 = saved lr,pc */ | |
530 | "ldr r2, [sp, %4] \n\t" /* r2 = saved psr */ | |
531 | "stmdb lr!, {r0, r1, r2} \n\t" /* push saved lr and */ | |
532 | /* rfe context */ | |
533 | "ldmia sp, {r0 - r12} \n\t" | |
534 | "mov sp, lr \n\t" | |
535 | "ldr lr, [sp], #4 \n\t" | |
536 | "rfeia sp! \n\t" | |
537 | #else | |
24ba613c AS |
538 | "ldr r0, [sp, %4] \n\t" |
539 | "msr cpsr_cxsf, r0 \n\t" | |
540 | "ldmia sp, {r0 - pc} \n\t" | |
de419840 | 541 | #endif |
24ba613c AS |
542 | : |
543 | : "r" (kcb->jprobe_saved_regs.ARM_sp), | |
782a0fd1 | 544 | "I" (sizeof(struct pt_regs) * 2), |
24ba613c AS |
545 | "J" (offsetof(struct pt_regs, ARM_sp)), |
546 | "J" (offsetof(struct pt_regs, ARM_pc)), | |
de419840 JM |
547 | "J" (offsetof(struct pt_regs, ARM_cpsr)), |
548 | "J" (offsetof(struct pt_regs, ARM_lr)) | |
24ba613c AS |
549 | : "memory", "cc"); |
550 | } | |
551 | ||
552 | int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs) | |
553 | { | |
554 | struct kprobe_ctlblk *kcb = get_kprobe_ctlblk(); | |
555 | long stack_addr = kcb->jprobe_saved_regs.ARM_sp; | |
556 | long orig_sp = regs->ARM_sp; | |
557 | struct jprobe *jp = container_of(p, struct jprobe, kp); | |
558 | ||
559 | if (regs->ARM_pc == JPROBE_MAGIC_ADDR) { | |
560 | if (orig_sp != stack_addr) { | |
561 | struct pt_regs *saved_regs = | |
562 | (struct pt_regs *)kcb->jprobe_saved_regs.ARM_sp; | |
563 | printk("current sp %lx does not match saved sp %lx\n", | |
564 | orig_sp, stack_addr); | |
565 | printk("Saved registers for jprobe %p\n", jp); | |
566 | show_regs(saved_regs); | |
567 | printk("Current registers\n"); | |
568 | show_regs(regs); | |
569 | BUG(); | |
570 | } | |
571 | *regs = kcb->jprobe_saved_regs; | |
572 | memcpy((void *)stack_addr, kcb->jprobes_stack, | |
573 | MIN_STACK_SIZE(stack_addr)); | |
574 | preempt_enable_no_resched(); | |
575 | return 1; | |
576 | } | |
577 | return 0; | |
578 | } | |
579 | ||
b24061fa NP |
580 | int __kprobes arch_trampoline_kprobe(struct kprobe *p) |
581 | { | |
582 | return 0; | |
583 | } | |
584 | ||
aceb487a JM |
585 | #ifdef CONFIG_THUMB2_KERNEL |
586 | ||
587 | static struct undef_hook kprobes_thumb16_break_hook = { | |
588 | .instr_mask = 0xffff, | |
589 | .instr_val = KPROBE_THUMB16_BREAKPOINT_INSTRUCTION, | |
590 | .cpsr_mask = MODE_MASK, | |
591 | .cpsr_val = SVC_MODE, | |
592 | .fn = kprobe_trap_handler, | |
593 | }; | |
594 | ||
595 | static struct undef_hook kprobes_thumb32_break_hook = { | |
596 | .instr_mask = 0xffffffff, | |
597 | .instr_val = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION, | |
598 | .cpsr_mask = MODE_MASK, | |
599 | .cpsr_val = SVC_MODE, | |
600 | .fn = kprobe_trap_handler, | |
601 | }; | |
602 | ||
603 | #else /* !CONFIG_THUMB2_KERNEL */ | |
604 | ||
605 | static struct undef_hook kprobes_arm_break_hook = { | |
3b269455 | 606 | .instr_mask = 0x0fffffff, |
aceb487a | 607 | .instr_val = KPROBE_ARM_BREAKPOINT_INSTRUCTION, |
24ba613c AS |
608 | .cpsr_mask = MODE_MASK, |
609 | .cpsr_val = SVC_MODE, | |
610 | .fn = kprobe_trap_handler, | |
611 | }; | |
612 | ||
aceb487a JM |
613 | #endif /* !CONFIG_THUMB2_KERNEL */ |
614 | ||
24ba613c AS |
615 | int __init arch_init_kprobes() |
616 | { | |
eb73ea97 | 617 | arm_probes_decode_init(); |
aceb487a JM |
618 | #ifdef CONFIG_THUMB2_KERNEL |
619 | register_undef_hook(&kprobes_thumb16_break_hook); | |
620 | register_undef_hook(&kprobes_thumb32_break_hook); | |
621 | #else | |
622 | register_undef_hook(&kprobes_arm_break_hook); | |
623 | #endif | |
24ba613c AS |
624 | return 0; |
625 | } |