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112f38a4 RK |
1 | /* |
2 | * sched_clock.c: support for extending counters to full 64-bit ns counter | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | #include <linux/clocksource.h> | |
9 | #include <linux/init.h> | |
10 | #include <linux/jiffies.h> | |
11 | #include <linux/kernel.h> | |
a42c3629 | 12 | #include <linux/moduleparam.h> |
112f38a4 | 13 | #include <linux/sched.h> |
f153d017 | 14 | #include <linux/syscore_ops.h> |
112f38a4 RK |
15 | #include <linux/timer.h> |
16 | ||
17 | #include <asm/sched_clock.h> | |
18 | ||
2f0778af MZ |
19 | struct clock_data { |
20 | u64 epoch_ns; | |
21 | u32 epoch_cyc; | |
22 | u32 epoch_cyc_copy; | |
23 | u32 mult; | |
24 | u32 shift; | |
237ec6f2 CC |
25 | bool suspended; |
26 | bool needs_suspend; | |
2f0778af MZ |
27 | }; |
28 | ||
112f38a4 RK |
29 | static void sched_clock_poll(unsigned long wrap_ticks); |
30 | static DEFINE_TIMER(sched_clock_timer, sched_clock_poll, 0, 0); | |
a42c3629 RK |
31 | static int irqtime = -1; |
32 | ||
33 | core_param(irqtime, irqtime, int, 0400); | |
2f0778af MZ |
34 | |
35 | static struct clock_data cd = { | |
36 | .mult = NSEC_PER_SEC / HZ, | |
37 | }; | |
38 | ||
39 | static u32 __read_mostly sched_clock_mask = 0xffffffff; | |
40 | ||
41 | static u32 notrace jiffy_sched_clock_read(void) | |
42 | { | |
43 | return (u32)(jiffies - INITIAL_JIFFIES); | |
44 | } | |
45 | ||
46 | static u32 __read_mostly (*read_sched_clock)(void) = jiffy_sched_clock_read; | |
47 | ||
48 | static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift) | |
49 | { | |
50 | return (cyc * mult) >> shift; | |
51 | } | |
52 | ||
53 | static unsigned long long cyc_to_sched_clock(u32 cyc, u32 mask) | |
54 | { | |
55 | u64 epoch_ns; | |
56 | u32 epoch_cyc; | |
57 | ||
237ec6f2 CC |
58 | if (cd.suspended) |
59 | return cd.epoch_ns; | |
60 | ||
2f0778af MZ |
61 | /* |
62 | * Load the epoch_cyc and epoch_ns atomically. We do this by | |
63 | * ensuring that we always write epoch_cyc, epoch_ns and | |
64 | * epoch_cyc_copy in strict order, and read them in strict order. | |
65 | * If epoch_cyc and epoch_cyc_copy are not equal, then we're in | |
66 | * the middle of an update, and we should repeat the load. | |
67 | */ | |
68 | do { | |
69 | epoch_cyc = cd.epoch_cyc; | |
70 | smp_rmb(); | |
71 | epoch_ns = cd.epoch_ns; | |
72 | smp_rmb(); | |
73 | } while (epoch_cyc != cd.epoch_cyc_copy); | |
74 | ||
75 | return epoch_ns + cyc_to_ns((cyc - epoch_cyc) & mask, cd.mult, cd.shift); | |
76 | } | |
77 | ||
78 | /* | |
79 | * Atomically update the sched_clock epoch. | |
80 | */ | |
81 | static void notrace update_sched_clock(void) | |
82 | { | |
83 | unsigned long flags; | |
84 | u32 cyc; | |
85 | u64 ns; | |
86 | ||
87 | cyc = read_sched_clock(); | |
88 | ns = cd.epoch_ns + | |
89 | cyc_to_ns((cyc - cd.epoch_cyc) & sched_clock_mask, | |
90 | cd.mult, cd.shift); | |
91 | /* | |
92 | * Write epoch_cyc and epoch_ns in a way that the update is | |
93 | * detectable in cyc_to_fixed_sched_clock(). | |
94 | */ | |
95 | raw_local_irq_save(flags); | |
96 | cd.epoch_cyc = cyc; | |
97 | smp_wmb(); | |
98 | cd.epoch_ns = ns; | |
99 | smp_wmb(); | |
100 | cd.epoch_cyc_copy = cyc; | |
101 | raw_local_irq_restore(flags); | |
102 | } | |
112f38a4 RK |
103 | |
104 | static void sched_clock_poll(unsigned long wrap_ticks) | |
105 | { | |
106 | mod_timer(&sched_clock_timer, round_jiffies(jiffies + wrap_ticks)); | |
2f0778af | 107 | update_sched_clock(); |
112f38a4 RK |
108 | } |
109 | ||
237ec6f2 CC |
110 | void __init setup_sched_clock_needs_suspend(u32 (*read)(void), int bits, |
111 | unsigned long rate) | |
112 | { | |
113 | setup_sched_clock(read, bits, rate); | |
114 | cd.needs_suspend = true; | |
115 | } | |
116 | ||
2f0778af | 117 | void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate) |
112f38a4 RK |
118 | { |
119 | unsigned long r, w; | |
120 | u64 res, wrap; | |
121 | char r_unit; | |
122 | ||
2f0778af MZ |
123 | BUG_ON(bits > 32); |
124 | WARN_ON(!irqs_disabled()); | |
125 | WARN_ON(read_sched_clock != jiffy_sched_clock_read); | |
126 | read_sched_clock = read; | |
127 | sched_clock_mask = (1 << bits) - 1; | |
112f38a4 RK |
128 | |
129 | /* calculate the mult/shift to convert counter ticks to ns. */ | |
2f0778af | 130 | clocks_calc_mult_shift(&cd.mult, &cd.shift, rate, NSEC_PER_SEC, 0); |
112f38a4 RK |
131 | |
132 | r = rate; | |
133 | if (r >= 4000000) { | |
134 | r /= 1000000; | |
135 | r_unit = 'M'; | |
2f0778af | 136 | } else if (r >= 1000) { |
112f38a4 RK |
137 | r /= 1000; |
138 | r_unit = 'k'; | |
2f0778af MZ |
139 | } else |
140 | r_unit = ' '; | |
112f38a4 RK |
141 | |
142 | /* calculate how many ns until we wrap */ | |
2f0778af | 143 | wrap = cyc_to_ns((1ULL << bits) - 1, cd.mult, cd.shift); |
112f38a4 RK |
144 | do_div(wrap, NSEC_PER_MSEC); |
145 | w = wrap; | |
146 | ||
147 | /* calculate the ns resolution of this counter */ | |
2f0778af | 148 | res = cyc_to_ns(1ULL, cd.mult, cd.shift); |
112f38a4 | 149 | pr_info("sched_clock: %u bits at %lu%cHz, resolution %lluns, wraps every %lums\n", |
2f0778af | 150 | bits, r, r_unit, res, w); |
112f38a4 RK |
151 | |
152 | /* | |
153 | * Start the timer to keep sched_clock() properly updated and | |
154 | * sets the initial epoch. | |
155 | */ | |
156 | sched_clock_timer.data = msecs_to_jiffies(w - (w / 10)); | |
2f0778af | 157 | update_sched_clock(); |
112f38a4 RK |
158 | |
159 | /* | |
160 | * Ensure that sched_clock() starts off at 0ns | |
161 | */ | |
2f0778af MZ |
162 | cd.epoch_ns = 0; |
163 | ||
a42c3629 RK |
164 | /* Enable IRQ time accounting if we have a fast enough sched_clock */ |
165 | if (irqtime > 0 || (irqtime == -1 && rate >= 1000000)) | |
166 | enable_sched_clock_irqtime(); | |
167 | ||
2f0778af MZ |
168 | pr_debug("Registered %pF as sched_clock source\n", read); |
169 | } | |
170 | ||
171 | unsigned long long notrace sched_clock(void) | |
172 | { | |
173 | u32 cyc = read_sched_clock(); | |
174 | return cyc_to_sched_clock(cyc, sched_clock_mask); | |
112f38a4 | 175 | } |
211baa70 RK |
176 | |
177 | void __init sched_clock_postinit(void) | |
178 | { | |
2f0778af MZ |
179 | /* |
180 | * If no sched_clock function has been provided at that point, | |
181 | * make it the final one one. | |
182 | */ | |
183 | if (read_sched_clock == jiffy_sched_clock_read) | |
184 | setup_sched_clock(jiffy_sched_clock_read, 32, HZ); | |
185 | ||
211baa70 RK |
186 | sched_clock_poll(sched_clock_timer.data); |
187 | } | |
f153d017 RK |
188 | |
189 | static int sched_clock_suspend(void) | |
190 | { | |
191 | sched_clock_poll(sched_clock_timer.data); | |
237ec6f2 CC |
192 | if (cd.needs_suspend) |
193 | cd.suspended = true; | |
f153d017 RK |
194 | return 0; |
195 | } | |
196 | ||
237ec6f2 CC |
197 | static void sched_clock_resume(void) |
198 | { | |
199 | if (cd.needs_suspend) { | |
200 | cd.epoch_cyc = read_sched_clock(); | |
201 | cd.epoch_cyc_copy = cd.epoch_cyc; | |
202 | cd.suspended = false; | |
203 | } | |
204 | } | |
205 | ||
f153d017 RK |
206 | static struct syscore_ops sched_clock_ops = { |
207 | .suspend = sched_clock_suspend, | |
237ec6f2 | 208 | .resume = sched_clock_resume, |
f153d017 RK |
209 | }; |
210 | ||
211 | static int __init sched_clock_syscore_init(void) | |
212 | { | |
213 | register_syscore_ops(&sched_clock_ops); | |
214 | return 0; | |
215 | } | |
216 | device_initcall(sched_clock_syscore_init); |