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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/kernel/smp.c | |
3 | * | |
4 | * Copyright (C) 2002 ARM Limited, All Rights Reserved. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
c97d4869 | 10 | #include <linux/module.h> |
1da177e4 LT |
11 | #include <linux/delay.h> |
12 | #include <linux/init.h> | |
13 | #include <linux/spinlock.h> | |
14 | #include <linux/sched.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/cache.h> | |
17 | #include <linux/profile.h> | |
18 | #include <linux/errno.h> | |
19 | #include <linux/mm.h> | |
4e950f6f | 20 | #include <linux/err.h> |
1da177e4 LT |
21 | #include <linux/cpu.h> |
22 | #include <linux/smp.h> | |
23 | #include <linux/seq_file.h> | |
c97d4869 | 24 | #include <linux/irq.h> |
bc28248e RK |
25 | #include <linux/percpu.h> |
26 | #include <linux/clockchips.h> | |
1da177e4 LT |
27 | |
28 | #include <asm/atomic.h> | |
29 | #include <asm/cacheflush.h> | |
30 | #include <asm/cpu.h> | |
42578c82 | 31 | #include <asm/cputype.h> |
e65f38ed RK |
32 | #include <asm/mmu_context.h> |
33 | #include <asm/pgtable.h> | |
34 | #include <asm/pgalloc.h> | |
1da177e4 | 35 | #include <asm/processor.h> |
37b05b63 | 36 | #include <asm/sections.h> |
1da177e4 LT |
37 | #include <asm/tlbflush.h> |
38 | #include <asm/ptrace.h> | |
bc28248e | 39 | #include <asm/localtimer.h> |
e616c591 | 40 | #include <asm/smp_plat.h> |
1da177e4 | 41 | |
e65f38ed RK |
42 | /* |
43 | * as from 2.5, kernels no longer have an init_tasks structure | |
44 | * so we need some other way of telling a new secondary core | |
45 | * where to place its SVC stack | |
46 | */ | |
47 | struct secondary_data secondary_data; | |
48 | ||
1da177e4 | 49 | enum ipi_msg_type { |
24480d98 | 50 | IPI_TIMER = 2, |
1da177e4 LT |
51 | IPI_RESCHEDULE, |
52 | IPI_CALL_FUNC, | |
f6dd9fa5 | 53 | IPI_CALL_FUNC_SINGLE, |
1da177e4 LT |
54 | IPI_CPU_STOP, |
55 | }; | |
56 | ||
37b05b63 RK |
57 | static inline void identity_mapping_add(pgd_t *pgd, unsigned long start, |
58 | unsigned long end) | |
59 | { | |
60 | unsigned long addr, prot; | |
61 | pmd_t *pmd; | |
62 | ||
63 | prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE; | |
64 | if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale()) | |
65 | prot |= PMD_BIT4; | |
66 | ||
67 | for (addr = start & PGDIR_MASK; addr < end;) { | |
68 | pmd = pmd_offset(pgd + pgd_index(addr), addr); | |
69 | pmd[0] = __pmd(addr | prot); | |
70 | addr += SECTION_SIZE; | |
71 | pmd[1] = __pmd(addr | prot); | |
72 | addr += SECTION_SIZE; | |
73 | flush_pmd_entry(pmd); | |
74 | outer_clean_range(__pa(pmd), __pa(pmd + 1)); | |
75 | } | |
76 | } | |
77 | ||
78 | static inline void identity_mapping_del(pgd_t *pgd, unsigned long start, | |
79 | unsigned long end) | |
80 | { | |
81 | unsigned long addr; | |
82 | pmd_t *pmd; | |
83 | ||
84 | for (addr = start & PGDIR_MASK; addr < end; addr += PGDIR_SIZE) { | |
85 | pmd = pmd_offset(pgd + pgd_index(addr), addr); | |
86 | pmd[0] = __pmd(0); | |
87 | pmd[1] = __pmd(0); | |
88 | clean_pmd_entry(pmd); | |
89 | outer_clean_range(__pa(pmd), __pa(pmd + 1)); | |
90 | } | |
91 | } | |
92 | ||
bd6f68af | 93 | int __cpuinit __cpu_up(unsigned int cpu) |
1da177e4 | 94 | { |
71f512e8 RK |
95 | struct cpuinfo_arm *ci = &per_cpu(cpu_data, cpu); |
96 | struct task_struct *idle = ci->idle; | |
e65f38ed | 97 | pgd_t *pgd; |
1da177e4 LT |
98 | int ret; |
99 | ||
100 | /* | |
71f512e8 RK |
101 | * Spawn a new process manually, if not already done. |
102 | * Grab a pointer to its task struct so we can mess with it | |
1da177e4 | 103 | */ |
71f512e8 RK |
104 | if (!idle) { |
105 | idle = fork_idle(cpu); | |
106 | if (IS_ERR(idle)) { | |
107 | printk(KERN_ERR "CPU%u: fork() failed\n", cpu); | |
108 | return PTR_ERR(idle); | |
109 | } | |
110 | ci->idle = idle; | |
13ea9cc8 SS |
111 | } else { |
112 | /* | |
113 | * Since this idle thread is being re-used, call | |
114 | * init_idle() to reinitialize the thread structure. | |
115 | */ | |
116 | init_idle(idle, cpu); | |
1da177e4 LT |
117 | } |
118 | ||
e65f38ed RK |
119 | /* |
120 | * Allocate initial page tables to allow the new CPU to | |
121 | * enable the MMU safely. This essentially means a set | |
122 | * of our "standard" page tables, with the addition of | |
123 | * a 1:1 mapping for the physical address of the kernel. | |
124 | */ | |
125 | pgd = pgd_alloc(&init_mm); | |
37b05b63 RK |
126 | if (!pgd) |
127 | return -ENOMEM; | |
128 | ||
129 | if (PHYS_OFFSET != PAGE_OFFSET) { | |
130 | #ifndef CONFIG_HOTPLUG_CPU | |
131 | identity_mapping_add(pgd, __pa(__init_begin), __pa(__init_end)); | |
132 | #endif | |
133 | identity_mapping_add(pgd, __pa(_stext), __pa(_etext)); | |
134 | identity_mapping_add(pgd, __pa(_sdata), __pa(_edata)); | |
135 | } | |
e65f38ed RK |
136 | |
137 | /* | |
138 | * We need to tell the secondary core where to find | |
139 | * its stack and the page tables. | |
140 | */ | |
32d39a93 | 141 | secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; |
e65f38ed | 142 | secondary_data.pgdir = virt_to_phys(pgd); |
1027247f RK |
143 | __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data)); |
144 | outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1)); | |
e65f38ed | 145 | |
1da177e4 LT |
146 | /* |
147 | * Now bring the CPU into our world. | |
148 | */ | |
149 | ret = boot_secondary(cpu, idle); | |
e65f38ed RK |
150 | if (ret == 0) { |
151 | unsigned long timeout; | |
152 | ||
153 | /* | |
154 | * CPU was successfully started, wait for it | |
155 | * to come online or time out. | |
156 | */ | |
157 | timeout = jiffies + HZ; | |
158 | while (time_before(jiffies, timeout)) { | |
159 | if (cpu_online(cpu)) | |
160 | break; | |
161 | ||
162 | udelay(10); | |
163 | barrier(); | |
164 | } | |
165 | ||
166 | if (!cpu_online(cpu)) | |
167 | ret = -EIO; | |
168 | } | |
169 | ||
5d43045b | 170 | secondary_data.stack = NULL; |
e65f38ed RK |
171 | secondary_data.pgdir = 0; |
172 | ||
37b05b63 RK |
173 | if (PHYS_OFFSET != PAGE_OFFSET) { |
174 | #ifndef CONFIG_HOTPLUG_CPU | |
175 | identity_mapping_del(pgd, __pa(__init_begin), __pa(__init_end)); | |
176 | #endif | |
177 | identity_mapping_del(pgd, __pa(_stext), __pa(_etext)); | |
178 | identity_mapping_del(pgd, __pa(_sdata), __pa(_edata)); | |
179 | } | |
180 | ||
5e541973 | 181 | pgd_free(&init_mm, pgd); |
e65f38ed | 182 | |
1da177e4 | 183 | if (ret) { |
0908db22 RK |
184 | printk(KERN_CRIT "CPU%u: processor failed to boot\n", cpu); |
185 | ||
1da177e4 LT |
186 | /* |
187 | * FIXME: We need to clean up the new idle thread. --rmk | |
188 | */ | |
189 | } | |
190 | ||
191 | return ret; | |
192 | } | |
193 | ||
a054a811 RK |
194 | #ifdef CONFIG_HOTPLUG_CPU |
195 | /* | |
196 | * __cpu_disable runs on the processor to be shutdown. | |
197 | */ | |
90140c30 | 198 | int __cpu_disable(void) |
a054a811 RK |
199 | { |
200 | unsigned int cpu = smp_processor_id(); | |
201 | struct task_struct *p; | |
202 | int ret; | |
203 | ||
8e2a43f5 | 204 | ret = platform_cpu_disable(cpu); |
a054a811 RK |
205 | if (ret) |
206 | return ret; | |
207 | ||
208 | /* | |
209 | * Take this CPU offline. Once we clear this, we can't return, | |
210 | * and we must not schedule until we're ready to give up the cpu. | |
211 | */ | |
e03cdade | 212 | set_cpu_online(cpu, false); |
a054a811 RK |
213 | |
214 | /* | |
215 | * OK - migrate IRQs away from this CPU | |
216 | */ | |
217 | migrate_irqs(); | |
218 | ||
37ee16ae RK |
219 | /* |
220 | * Stop the local timer for this CPU. | |
221 | */ | |
ebac6546 | 222 | local_timer_stop(); |
37ee16ae | 223 | |
a054a811 RK |
224 | /* |
225 | * Flush user cache and TLB mappings, and then remove this CPU | |
226 | * from the vm mask set of all processes. | |
227 | */ | |
228 | flush_cache_all(); | |
229 | local_flush_tlb_all(); | |
230 | ||
231 | read_lock(&tasklist_lock); | |
232 | for_each_process(p) { | |
233 | if (p->mm) | |
56f8ba83 | 234 | cpumask_clear_cpu(cpu, mm_cpumask(p->mm)); |
a054a811 RK |
235 | } |
236 | read_unlock(&tasklist_lock); | |
237 | ||
238 | return 0; | |
239 | } | |
240 | ||
241 | /* | |
242 | * called on the thread which is asking for a CPU to be shutdown - | |
243 | * waits until shutdown has completed, or it is timed out. | |
244 | */ | |
90140c30 | 245 | void __cpu_die(unsigned int cpu) |
a054a811 RK |
246 | { |
247 | if (!platform_cpu_kill(cpu)) | |
248 | printk("CPU%u: unable to kill\n", cpu); | |
249 | } | |
250 | ||
251 | /* | |
252 | * Called from the idle thread for the CPU which has been shutdown. | |
253 | * | |
254 | * Note that we disable IRQs here, but do not re-enable them | |
255 | * before returning to the caller. This is also the behaviour | |
256 | * of the other hotplug-cpu capable cores, so presumably coming | |
257 | * out of idle fixes this. | |
258 | */ | |
90140c30 | 259 | void __ref cpu_die(void) |
a054a811 RK |
260 | { |
261 | unsigned int cpu = smp_processor_id(); | |
262 | ||
263 | local_irq_disable(); | |
264 | idle_task_exit(); | |
265 | ||
266 | /* | |
267 | * actual CPU shutdown procedure is at least platform (if not | |
268 | * CPU) specific | |
269 | */ | |
270 | platform_cpu_die(cpu); | |
271 | ||
272 | /* | |
273 | * Do not return to the idle loop - jump back to the secondary | |
274 | * cpu initialisation. There's some initialisation which needs | |
275 | * to be repeated to undo the effects of taking the CPU offline. | |
276 | */ | |
277 | __asm__("mov sp, %0\n" | |
278 | " b secondary_start_kernel" | |
279 | : | |
32d39a93 | 280 | : "r" (task_stack_page(current) + THREAD_SIZE - 8)); |
a054a811 RK |
281 | } |
282 | #endif /* CONFIG_HOTPLUG_CPU */ | |
283 | ||
05c74a6c RK |
284 | /* |
285 | * Called by both boot and secondaries to move global data into | |
286 | * per-processor storage. | |
287 | */ | |
288 | static void __cpuinit smp_store_cpu_info(unsigned int cpuid) | |
289 | { | |
290 | struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid); | |
291 | ||
292 | cpu_info->loops_per_jiffy = loops_per_jiffy; | |
293 | } | |
294 | ||
e65f38ed RK |
295 | /* |
296 | * This is the secondary CPU boot entry. We're using this CPUs | |
297 | * idle thread stack, but a set of temporary page tables. | |
298 | */ | |
bd6f68af | 299 | asmlinkage void __cpuinit secondary_start_kernel(void) |
e65f38ed RK |
300 | { |
301 | struct mm_struct *mm = &init_mm; | |
da2660d2 | 302 | unsigned int cpu = smp_processor_id(); |
e65f38ed RK |
303 | |
304 | printk("CPU%u: Booted secondary processor\n", cpu); | |
305 | ||
306 | /* | |
307 | * All kernel threads share the same mm context; grab a | |
308 | * reference and switch to it. | |
309 | */ | |
310 | atomic_inc(&mm->mm_users); | |
311 | atomic_inc(&mm->mm_count); | |
312 | current->active_mm = mm; | |
56f8ba83 | 313 | cpumask_set_cpu(cpu, mm_cpumask(mm)); |
e65f38ed RK |
314 | cpu_switch_mm(mm->pgd, mm); |
315 | enter_lazy_tlb(mm, current); | |
505d7b19 | 316 | local_flush_tlb_all(); |
e65f38ed RK |
317 | |
318 | cpu_init(); | |
5bfb5d69 | 319 | preempt_disable(); |
e65f38ed RK |
320 | |
321 | /* | |
322 | * Give the platform a chance to do its own initialisation. | |
323 | */ | |
324 | platform_secondary_init(cpu); | |
325 | ||
326 | /* | |
327 | * Enable local interrupts. | |
328 | */ | |
e545a614 | 329 | notify_cpu_starting(cpu); |
e65f38ed RK |
330 | local_irq_enable(); |
331 | local_fiq_enable(); | |
332 | ||
a8655e83 | 333 | /* |
bc28248e | 334 | * Setup the percpu timer for this CPU. |
a8655e83 | 335 | */ |
bc28248e | 336 | percpu_timer_setup(); |
a8655e83 | 337 | |
e65f38ed RK |
338 | calibrate_delay(); |
339 | ||
340 | smp_store_cpu_info(cpu); | |
341 | ||
342 | /* | |
343 | * OK, now it's safe to let the boot CPU continue | |
344 | */ | |
e03cdade | 345 | set_cpu_online(cpu, true); |
e65f38ed RK |
346 | |
347 | /* | |
348 | * OK, it's off to the idle thread for us | |
349 | */ | |
350 | cpu_idle(); | |
351 | } | |
352 | ||
1da177e4 LT |
353 | void __init smp_cpus_done(unsigned int max_cpus) |
354 | { | |
355 | int cpu; | |
356 | unsigned long bogosum = 0; | |
357 | ||
358 | for_each_online_cpu(cpu) | |
359 | bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy; | |
360 | ||
361 | printk(KERN_INFO "SMP: Total of %d processors activated " | |
362 | "(%lu.%02lu BogoMIPS).\n", | |
363 | num_online_cpus(), | |
364 | bogosum / (500000/HZ), | |
365 | (bogosum / (5000/HZ)) % 100); | |
366 | } | |
367 | ||
368 | void __init smp_prepare_boot_cpu(void) | |
369 | { | |
370 | unsigned int cpu = smp_processor_id(); | |
371 | ||
71f512e8 | 372 | per_cpu(cpu_data, cpu).idle = current; |
1da177e4 LT |
373 | } |
374 | ||
05c74a6c RK |
375 | void __init smp_prepare_cpus(unsigned int max_cpus) |
376 | { | |
377 | unsigned int ncores = num_possible_cpus(); | |
378 | ||
379 | smp_store_cpu_info(smp_processor_id()); | |
380 | ||
381 | /* | |
382 | * are we trying to boot more cores than exist? | |
383 | */ | |
384 | if (max_cpus > ncores) | |
385 | max_cpus = ncores; | |
386 | ||
387 | if (max_cpus > 1) { | |
388 | /* | |
389 | * Enable the local timer or broadcast device for the | |
390 | * boot CPU, but only if we have more than one CPU. | |
391 | */ | |
392 | percpu_timer_setup(); | |
393 | ||
394 | /* | |
395 | * Initialise the SCU if there are more than one CPU | |
396 | * and let them know where to start. | |
397 | */ | |
398 | platform_smp_prepare_cpus(max_cpus); | |
399 | } | |
400 | } | |
401 | ||
82668104 | 402 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
1da177e4 | 403 | { |
e3fbb087 | 404 | smp_cross_call(mask, IPI_CALL_FUNC); |
1da177e4 LT |
405 | } |
406 | ||
f6dd9fa5 | 407 | void arch_send_call_function_single_ipi(int cpu) |
3e459990 | 408 | { |
e3fbb087 | 409 | smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE); |
3e459990 | 410 | } |
3e459990 | 411 | |
4a88abd7 RK |
412 | static const char *ipi_types[NR_IPI] = { |
413 | #define S(x,s) [x - IPI_TIMER] = s | |
414 | S(IPI_TIMER, "Timer broadcast interrupts"), | |
415 | S(IPI_RESCHEDULE, "Rescheduling interrupts"), | |
416 | S(IPI_CALL_FUNC, "Function call interrupts"), | |
417 | S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"), | |
418 | S(IPI_CPU_STOP, "CPU stop interrupts"), | |
419 | }; | |
420 | ||
f13cd417 | 421 | void show_ipi_list(struct seq_file *p, int prec) |
1da177e4 | 422 | { |
4a88abd7 | 423 | unsigned int cpu, i; |
1da177e4 | 424 | |
4a88abd7 RK |
425 | for (i = 0; i < NR_IPI; i++) { |
426 | seq_printf(p, "%*s%u: ", prec - 1, "IPI", i); | |
1da177e4 | 427 | |
4a88abd7 RK |
428 | for_each_present_cpu(cpu) |
429 | seq_printf(p, "%10u ", | |
430 | __get_irq_stat(cpu, ipi_irqs[i])); | |
1da177e4 | 431 | |
4a88abd7 RK |
432 | seq_printf(p, " %s\n", ipi_types[i]); |
433 | } | |
1da177e4 LT |
434 | } |
435 | ||
b54992fe RK |
436 | u64 smp_irq_stat_cpu(unsigned int cpu) |
437 | { | |
438 | u64 sum = 0; | |
439 | int i; | |
440 | ||
441 | for (i = 0; i < NR_IPI; i++) | |
442 | sum += __get_irq_stat(cpu, ipi_irqs[i]); | |
443 | ||
444 | #ifdef CONFIG_LOCAL_TIMERS | |
445 | sum += __get_irq_stat(cpu, local_timer_irqs); | |
446 | #endif | |
447 | ||
448 | return sum; | |
449 | } | |
450 | ||
bc28248e RK |
451 | /* |
452 | * Timer (local or broadcast) support | |
453 | */ | |
454 | static DEFINE_PER_CPU(struct clock_event_device, percpu_clockevent); | |
455 | ||
c97d4869 | 456 | static void ipi_timer(void) |
1da177e4 | 457 | { |
bc28248e | 458 | struct clock_event_device *evt = &__get_cpu_var(percpu_clockevent); |
1da177e4 | 459 | irq_enter(); |
bc28248e | 460 | evt->event_handler(evt); |
1da177e4 LT |
461 | irq_exit(); |
462 | } | |
463 | ||
37ee16ae | 464 | #ifdef CONFIG_LOCAL_TIMERS |
b9811d7f | 465 | asmlinkage void __exception do_local_timer(struct pt_regs *regs) |
37ee16ae | 466 | { |
c97d4869 | 467 | struct pt_regs *old_regs = set_irq_regs(regs); |
37ee16ae RK |
468 | int cpu = smp_processor_id(); |
469 | ||
470 | if (local_timer_ack()) { | |
46c48f22 | 471 | __inc_irq_stat(cpu, local_timer_irqs); |
c97d4869 | 472 | ipi_timer(); |
37ee16ae | 473 | } |
c97d4869 RK |
474 | |
475 | set_irq_regs(old_regs); | |
37ee16ae | 476 | } |
ec405ea9 | 477 | |
f13cd417 | 478 | void show_local_irqs(struct seq_file *p, int prec) |
ec405ea9 RK |
479 | { |
480 | unsigned int cpu; | |
481 | ||
f13cd417 | 482 | seq_printf(p, "%*s: ", prec, "LOC"); |
ec405ea9 RK |
483 | |
484 | for_each_present_cpu(cpu) | |
46c48f22 | 485 | seq_printf(p, "%10u ", __get_irq_stat(cpu, local_timer_irqs)); |
ec405ea9 | 486 | |
f13cd417 | 487 | seq_printf(p, " Local timer interrupts\n"); |
ec405ea9 | 488 | } |
37ee16ae RK |
489 | #endif |
490 | ||
bc28248e RK |
491 | #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST |
492 | static void smp_timer_broadcast(const struct cpumask *mask) | |
493 | { | |
e3fbb087 | 494 | smp_cross_call(mask, IPI_TIMER); |
bc28248e | 495 | } |
5388a6b2 RK |
496 | #else |
497 | #define smp_timer_broadcast NULL | |
498 | #endif | |
bc28248e | 499 | |
5388a6b2 | 500 | #ifndef CONFIG_LOCAL_TIMERS |
bc28248e RK |
501 | static void broadcast_timer_set_mode(enum clock_event_mode mode, |
502 | struct clock_event_device *evt) | |
503 | { | |
504 | } | |
505 | ||
506 | static void local_timer_setup(struct clock_event_device *evt) | |
507 | { | |
508 | evt->name = "dummy_timer"; | |
509 | evt->features = CLOCK_EVT_FEAT_ONESHOT | | |
510 | CLOCK_EVT_FEAT_PERIODIC | | |
511 | CLOCK_EVT_FEAT_DUMMY; | |
512 | evt->rating = 400; | |
513 | evt->mult = 1; | |
514 | evt->set_mode = broadcast_timer_set_mode; | |
bc28248e RK |
515 | |
516 | clockevents_register_device(evt); | |
517 | } | |
518 | #endif | |
519 | ||
520 | void __cpuinit percpu_timer_setup(void) | |
521 | { | |
522 | unsigned int cpu = smp_processor_id(); | |
523 | struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu); | |
524 | ||
525 | evt->cpumask = cpumask_of(cpu); | |
5388a6b2 | 526 | evt->broadcast = smp_timer_broadcast; |
bc28248e RK |
527 | |
528 | local_timer_setup(evt); | |
529 | } | |
530 | ||
1da177e4 LT |
531 | static DEFINE_SPINLOCK(stop_lock); |
532 | ||
533 | /* | |
534 | * ipi_cpu_stop - handle IPI from smp_send_stop() | |
535 | */ | |
536 | static void ipi_cpu_stop(unsigned int cpu) | |
537 | { | |
3d3f78d7 RK |
538 | if (system_state == SYSTEM_BOOTING || |
539 | system_state == SYSTEM_RUNNING) { | |
540 | spin_lock(&stop_lock); | |
541 | printk(KERN_CRIT "CPU%u: stopping\n", cpu); | |
542 | dump_stack(); | |
543 | spin_unlock(&stop_lock); | |
544 | } | |
1da177e4 | 545 | |
e03cdade | 546 | set_cpu_online(cpu, false); |
1da177e4 LT |
547 | |
548 | local_fiq_disable(); | |
549 | local_irq_disable(); | |
550 | ||
551 | while (1) | |
552 | cpu_relax(); | |
553 | } | |
554 | ||
555 | /* | |
556 | * Main handler for inter-processor interrupts | |
1da177e4 | 557 | */ |
ad3b6993 | 558 | asmlinkage void __exception do_IPI(int ipinr, struct pt_regs *regs) |
1da177e4 LT |
559 | { |
560 | unsigned int cpu = smp_processor_id(); | |
c97d4869 | 561 | struct pt_regs *old_regs = set_irq_regs(regs); |
1da177e4 | 562 | |
4a88abd7 RK |
563 | if (ipinr >= IPI_TIMER && ipinr < IPI_TIMER + NR_IPI) |
564 | __inc_irq_stat(cpu, ipi_irqs[ipinr - IPI_TIMER]); | |
1da177e4 | 565 | |
24480d98 RK |
566 | switch (ipinr) { |
567 | case IPI_TIMER: | |
568 | ipi_timer(); | |
569 | break; | |
1da177e4 | 570 | |
24480d98 RK |
571 | case IPI_RESCHEDULE: |
572 | /* | |
573 | * nothing more to do - eveything is | |
574 | * done on the interrupt return path | |
575 | */ | |
576 | break; | |
1da177e4 | 577 | |
24480d98 RK |
578 | case IPI_CALL_FUNC: |
579 | generic_smp_call_function_interrupt(); | |
580 | break; | |
f6dd9fa5 | 581 | |
24480d98 RK |
582 | case IPI_CALL_FUNC_SINGLE: |
583 | generic_smp_call_function_single_interrupt(); | |
584 | break; | |
1da177e4 | 585 | |
24480d98 RK |
586 | case IPI_CPU_STOP: |
587 | ipi_cpu_stop(cpu); | |
588 | break; | |
1da177e4 | 589 | |
24480d98 RK |
590 | default: |
591 | printk(KERN_CRIT "CPU%u: Unknown IPI message 0x%x\n", | |
592 | cpu, ipinr); | |
593 | break; | |
1da177e4 | 594 | } |
c97d4869 | 595 | set_irq_regs(old_regs); |
1da177e4 LT |
596 | } |
597 | ||
598 | void smp_send_reschedule(int cpu) | |
599 | { | |
e3fbb087 | 600 | smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE); |
1da177e4 LT |
601 | } |
602 | ||
1da177e4 LT |
603 | void smp_send_stop(void) |
604 | { | |
28e18293 RK |
605 | unsigned long timeout; |
606 | ||
607 | if (num_online_cpus() > 1) { | |
608 | cpumask_t mask = cpu_online_map; | |
609 | cpu_clear(smp_processor_id(), mask); | |
610 | ||
e3fbb087 | 611 | smp_cross_call(&mask, IPI_CPU_STOP); |
28e18293 RK |
612 | } |
613 | ||
614 | /* Wait up to one second for other CPUs to stop */ | |
615 | timeout = USEC_PER_SEC; | |
616 | while (num_online_cpus() > 1 && timeout--) | |
617 | udelay(1); | |
618 | ||
619 | if (num_online_cpus() > 1) | |
620 | pr_warning("SMP: failed to stop secondary CPUs\n"); | |
1da177e4 LT |
621 | } |
622 | ||
623 | /* | |
624 | * not supported here | |
625 | */ | |
5048bcba | 626 | int setup_profiling_timer(unsigned int multiplier) |
1da177e4 LT |
627 | { |
628 | return -EINVAL; | |
629 | } | |
4b0ef3b1 | 630 | |
82668104 RK |
631 | static void |
632 | on_each_cpu_mask(void (*func)(void *), void *info, int wait, | |
633 | const struct cpumask *mask) | |
4b0ef3b1 | 634 | { |
4b0ef3b1 RK |
635 | preempt_disable(); |
636 | ||
82668104 RK |
637 | smp_call_function_many(mask, func, info, wait); |
638 | if (cpumask_test_cpu(smp_processor_id(), mask)) | |
4b0ef3b1 RK |
639 | func(info); |
640 | ||
641 | preempt_enable(); | |
4b0ef3b1 RK |
642 | } |
643 | ||
644 | /**********************************************************************/ | |
645 | ||
646 | /* | |
647 | * TLB operations | |
648 | */ | |
649 | struct tlb_args { | |
650 | struct vm_area_struct *ta_vma; | |
651 | unsigned long ta_start; | |
652 | unsigned long ta_end; | |
653 | }; | |
654 | ||
655 | static inline void ipi_flush_tlb_all(void *ignored) | |
656 | { | |
657 | local_flush_tlb_all(); | |
658 | } | |
659 | ||
660 | static inline void ipi_flush_tlb_mm(void *arg) | |
661 | { | |
662 | struct mm_struct *mm = (struct mm_struct *)arg; | |
663 | ||
664 | local_flush_tlb_mm(mm); | |
665 | } | |
666 | ||
667 | static inline void ipi_flush_tlb_page(void *arg) | |
668 | { | |
669 | struct tlb_args *ta = (struct tlb_args *)arg; | |
670 | ||
671 | local_flush_tlb_page(ta->ta_vma, ta->ta_start); | |
672 | } | |
673 | ||
674 | static inline void ipi_flush_tlb_kernel_page(void *arg) | |
675 | { | |
676 | struct tlb_args *ta = (struct tlb_args *)arg; | |
677 | ||
678 | local_flush_tlb_kernel_page(ta->ta_start); | |
679 | } | |
680 | ||
681 | static inline void ipi_flush_tlb_range(void *arg) | |
682 | { | |
683 | struct tlb_args *ta = (struct tlb_args *)arg; | |
684 | ||
685 | local_flush_tlb_range(ta->ta_vma, ta->ta_start, ta->ta_end); | |
686 | } | |
687 | ||
688 | static inline void ipi_flush_tlb_kernel_range(void *arg) | |
689 | { | |
690 | struct tlb_args *ta = (struct tlb_args *)arg; | |
691 | ||
692 | local_flush_tlb_kernel_range(ta->ta_start, ta->ta_end); | |
693 | } | |
694 | ||
695 | void flush_tlb_all(void) | |
696 | { | |
faa7bc51 CM |
697 | if (tlb_ops_need_broadcast()) |
698 | on_each_cpu(ipi_flush_tlb_all, NULL, 1); | |
699 | else | |
700 | local_flush_tlb_all(); | |
4b0ef3b1 RK |
701 | } |
702 | ||
703 | void flush_tlb_mm(struct mm_struct *mm) | |
704 | { | |
faa7bc51 | 705 | if (tlb_ops_need_broadcast()) |
56f8ba83 | 706 | on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, mm_cpumask(mm)); |
faa7bc51 CM |
707 | else |
708 | local_flush_tlb_mm(mm); | |
4b0ef3b1 RK |
709 | } |
710 | ||
711 | void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr) | |
712 | { | |
faa7bc51 CM |
713 | if (tlb_ops_need_broadcast()) { |
714 | struct tlb_args ta; | |
715 | ta.ta_vma = vma; | |
716 | ta.ta_start = uaddr; | |
56f8ba83 | 717 | on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, mm_cpumask(vma->vm_mm)); |
faa7bc51 CM |
718 | } else |
719 | local_flush_tlb_page(vma, uaddr); | |
4b0ef3b1 RK |
720 | } |
721 | ||
722 | void flush_tlb_kernel_page(unsigned long kaddr) | |
723 | { | |
faa7bc51 CM |
724 | if (tlb_ops_need_broadcast()) { |
725 | struct tlb_args ta; | |
726 | ta.ta_start = kaddr; | |
727 | on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1); | |
728 | } else | |
729 | local_flush_tlb_kernel_page(kaddr); | |
4b0ef3b1 RK |
730 | } |
731 | ||
732 | void flush_tlb_range(struct vm_area_struct *vma, | |
733 | unsigned long start, unsigned long end) | |
734 | { | |
faa7bc51 CM |
735 | if (tlb_ops_need_broadcast()) { |
736 | struct tlb_args ta; | |
737 | ta.ta_vma = vma; | |
738 | ta.ta_start = start; | |
739 | ta.ta_end = end; | |
56f8ba83 | 740 | on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, mm_cpumask(vma->vm_mm)); |
faa7bc51 CM |
741 | } else |
742 | local_flush_tlb_range(vma, start, end); | |
4b0ef3b1 RK |
743 | } |
744 | ||
745 | void flush_tlb_kernel_range(unsigned long start, unsigned long end) | |
746 | { | |
faa7bc51 CM |
747 | if (tlb_ops_need_broadcast()) { |
748 | struct tlb_args ta; | |
749 | ta.ta_start = start; | |
750 | ta.ta_end = end; | |
751 | on_each_cpu(ipi_flush_tlb_kernel_range, &ta, 1); | |
752 | } else | |
753 | local_flush_tlb_kernel_range(start, end); | |
4b0ef3b1 | 754 | } |