[mirror_ubuntu-artful-kernel.git] / arch / arm / kernel / smp_twd.c

/*
 *  linux/arch/arm/kernel/smp_twd.c
 *
 *  Copyright (C) 2002 ARM Ltd.
 *  All Rights Reserved
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/clk.h>
#include <linux/cpu.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/smp.h>
#include <linux/jiffies.h>
#include <linux/clockchips.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/of_irq.h>
#include <linux/of_address.h>

#include <asm/smp_twd.h>

/* set up by the platform code */
static void __iomem *twd_base;

static struct clk *twd_clk;
static unsigned long twd_timer_rate;
static DEFINE_PER_CPU(bool, percpu_setup_called);

static struct clock_event_device __percpu *twd_evt;
static int feat_c3stop;
static int twd_ppi;

static int twd_shutdown(struct clock_event_device *clk)
{
	writel_relaxed(0, twd_base + TWD_TIMER_CONTROL);
	return 0;
}

static int twd_set_oneshot(struct clock_event_device *clk)
{
	/* period set, and timer enabled in 'next_event' hook */
	writel_relaxed(TWD_TIMER_CONTROL_IT_ENABLE | TWD_TIMER_CONTROL_ONESHOT,
		       twd_base + TWD_TIMER_CONTROL);
	return 0;
}

static int twd_set_periodic(struct clock_event_device *clk)
{
	unsigned long ctrl = TWD_TIMER_CONTROL_ENABLE |
			     TWD_TIMER_CONTROL_IT_ENABLE |
			     TWD_TIMER_CONTROL_PERIODIC;

	writel_relaxed(DIV_ROUND_CLOSEST(twd_timer_rate, HZ),
		       twd_base + TWD_TIMER_LOAD);
	writel_relaxed(ctrl, twd_base + TWD_TIMER_CONTROL);
	return 0;
}

static int twd_set_next_event(unsigned long evt,
			struct clock_event_device *unused)
{
	unsigned long ctrl = readl_relaxed(twd_base + TWD_TIMER_CONTROL);

	ctrl |= TWD_TIMER_CONTROL_ENABLE;

	writel_relaxed(evt, twd_base + TWD_TIMER_COUNTER);
	writel_relaxed(ctrl, twd_base + TWD_TIMER_CONTROL);

	return 0;
}

/*
 * local_timer_ack: checks for a local timer interrupt.
 *
 * If a local timer interrupt has occurred, acknowledge and return 1.
 * Otherwise, return 0.
 */
static int twd_timer_ack(void)
{
	if (readl_relaxed(twd_base + TWD_TIMER_INTSTAT)) {
		writel_relaxed(1, twd_base + TWD_TIMER_INTSTAT);
		return 1;
	}

	return 0;
}

static void twd_timer_stop(void)
{
	struct clock_event_device *clk = raw_cpu_ptr(twd_evt);

	twd_shutdown(clk);
	disable_percpu_irq(clk->irq);
}

#ifdef CONFIG_COMMON_CLK

/*
 * Updates clockevent frequency when the cpu frequency changes.
 * Called on the cpu that is changing frequency with interrupts disabled.
 */
static void twd_update_frequency(void *new_rate)
{
	twd_timer_rate = *((unsigned long *) new_rate);

	clockevents_update_freq(raw_cpu_ptr(twd_evt), twd_timer_rate);
}

static int twd_rate_change(struct notifier_block *nb,
	unsigned long flags, void *data)
{
	struct clk_notifier_data *cnd = data;

	/*
	 * The twd clock events must be reprogrammed to account for the new
	 * frequency.  The timer is local to a cpu, so cross-call to the
	 * changing cpu.
	 */
	if (flags == POST_RATE_CHANGE)
		on_each_cpu(twd_update_frequency,
				  (void *)&cnd->new_rate, 1);

	return NOTIFY_OK;
}

static struct notifier_block twd_clk_nb = {
	.notifier_call = twd_rate_change,
};

static int twd_clk_init(void)
{
	if (twd_evt && raw_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
		return clk_notifier_register(twd_clk, &twd_clk_nb);

	return 0;
}
core_initcall(twd_clk_init);

#elif defined (CONFIG_CPU_FREQ)

#include <linux/cpufreq.h>

/*
 * Updates clockevent frequency when the cpu frequency changes.
 * Called on the cpu that is changing frequency with interrupts disabled.
 */
static void twd_update_frequency(void *data)
{
	twd_timer_rate = clk_get_rate(twd_clk);

	clockevents_update_freq(raw_cpu_ptr(twd_evt), twd_timer_rate);
}

static int twd_cpufreq_transition(struct notifier_block *nb,
	unsigned long state, void *data)
{
	struct cpufreq_freqs *freqs = data;

	/*
	 * The twd clock events must be reprogrammed to account for the new
	 * frequency.  The timer is local to a cpu, so cross-call to the
	 * changing cpu.
	 */
	if (state == CPUFREQ_POSTCHANGE)
		smp_call_function_single(freqs->cpu, twd_update_frequency,
			NULL, 1);

	return NOTIFY_OK;
}

static struct notifier_block twd_cpufreq_nb = {
	.notifier_call = twd_cpufreq_transition,
};

static int twd_cpufreq_init(void)
{
	if (twd_evt && raw_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
		return cpufreq_register_notifier(&twd_cpufreq_nb,
			CPUFREQ_TRANSITION_NOTIFIER);

	return 0;
}
core_initcall(twd_cpufreq_init);

#endif

static void twd_calibrate_rate(void)
{
	unsigned long count;
	u64 waitjiffies;

	/*
	 * If this is the first time round, we need to work out how fast
	 * the timer ticks
	 */
	if (twd_timer_rate == 0) {
		pr_info("Calibrating local timer... ");

		/* Wait for a tick to start */
		waitjiffies = get_jiffies_64() + 1;

		while (get_jiffies_64() < waitjiffies)
			udelay(10);

		/* OK, now the tick has started, let's get the timer going */
		waitjiffies += 5;

				 /* enable, no interrupt or reload */
		writel_relaxed(0x1, twd_base + TWD_TIMER_CONTROL);

				 /* maximum value */
		writel_relaxed(0xFFFFFFFFU, twd_base + TWD_TIMER_COUNTER);

		while (get_jiffies_64() < waitjiffies)
			udelay(10);

		count = readl_relaxed(twd_base + TWD_TIMER_COUNTER);

		twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);

		pr_cont("%lu.%02luMHz.\n", twd_timer_rate / 1000000,
			(twd_timer_rate / 10000) % 100);
	}
}

static irqreturn_t twd_handler(int irq, void *dev_id)
{
	struct clock_event_device *evt = dev_id;

	if (twd_timer_ack()) {
		evt->event_handler(evt);
		return IRQ_HANDLED;
	}

	return IRQ_NONE;
}

static void twd_get_clock(struct device_node *np)
{
	int err;

	if (np)
		twd_clk = of_clk_get(np, 0);
	else
		twd_clk = clk_get_sys("smp_twd", NULL);

	if (IS_ERR(twd_clk)) {
		pr_err("smp_twd: clock not found %d\n", (int) PTR_ERR(twd_clk));
		return;
	}

	err = clk_prepare_enable(twd_clk);
	if (err) {
		pr_err("smp_twd: clock failed to prepare+enable: %d\n", err);
		clk_put(twd_clk);
		return;
	}

	twd_timer_rate = clk_get_rate(twd_clk);
}

/*
 * Setup the local clock events for a CPU.
 */
static void twd_timer_setup(void)
{
	struct clock_event_device *clk = raw_cpu_ptr(twd_evt);
	int cpu = smp_processor_id();

	/*
	 * If the basic setup for this CPU has been done before don't
	 * bother with the below.
	 */
	if (per_cpu(percpu_setup_called, cpu)) {
		writel_relaxed(0, twd_base + TWD_TIMER_CONTROL);
		clockevents_register_device(clk);
		enable_percpu_irq(clk->irq, 0);
		return;
	}
	per_cpu(percpu_setup_called, cpu) = true;

	twd_calibrate_rate();

	/*
	 * The following is done once per CPU the first time .setup() is
	 * called.
	 */
	writel_relaxed(0, twd_base + TWD_TIMER_CONTROL);

	clk->name = "local_timer";
	clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
			feat_c3stop;
	clk->rating = 350;
	clk->set_state_shutdown = twd_shutdown;
	clk->set_state_periodic = twd_set_periodic;
	clk->set_state_oneshot = twd_set_oneshot;
	clk->tick_resume = twd_shutdown;
	clk->set_next_event = twd_set_next_event;
	clk->irq = twd_ppi;
	clk->cpumask = cpumask_of(cpu);

	clockevents_config_and_register(clk, twd_timer_rate,
					0xf, 0xffffffff);
	enable_percpu_irq(clk->irq, 0);
}

static int twd_timer_cpu_notify(struct notifier_block *self,
				unsigned long action, void *hcpu)
{
	switch (action & ~CPU_TASKS_FROZEN) {
	case CPU_STARTING:
		twd_timer_setup();
		break;
	case CPU_DYING:
		twd_timer_stop();
		break;
	}

	return NOTIFY_OK;
}

static struct notifier_block twd_timer_cpu_nb = {
	.notifier_call = twd_timer_cpu_notify,
};

static int __init twd_local_timer_common_register(struct device_node *np)
{
	int err;

	twd_evt = alloc_percpu(struct clock_event_device);
	if (!twd_evt) {
		err = -ENOMEM;
		goto out_free;
	}

	err = request_percpu_irq(twd_ppi, twd_handler, "twd", twd_evt);
	if (err) {
		pr_err("twd: can't register interrupt %d (%d)\n", twd_ppi, err);
		goto out_free;
	}

	err = register_cpu_notifier(&twd_timer_cpu_nb);
	if (err)
		goto out_irq;

	twd_get_clock(np);
	if (!of_property_read_bool(np, "always-on"))
		feat_c3stop = CLOCK_EVT_FEAT_C3STOP;

	/*
	 * Immediately configure the timer on the boot CPU, unless we need
	 * jiffies to be incrementing to calibrate the rate in which case
	 * setup the timer in late_time_init.
	 */
	if (twd_timer_rate)
		twd_timer_setup();
	else
		late_time_init = twd_timer_setup;

	return 0;

out_irq:
	free_percpu_irq(twd_ppi, twd_evt);
out_free:
	iounmap(twd_base);
	twd_base = NULL;
	free_percpu(twd_evt);

	return err;
}

int __init twd_local_timer_register(struct twd_local_timer *tlt)
{
	if (twd_base || twd_evt)
		return -EBUSY;

	twd_ppi	= tlt->res[1].start;

	twd_base = ioremap(tlt->res[0].start, resource_size(&tlt->res[0]));
	if (!twd_base)
		return -ENOMEM;

	return twd_local_timer_common_register(NULL);
}

#ifdef CONFIG_OF
static void __init twd_local_timer_of_register(struct device_node *np)
{
	int err;

	twd_ppi = irq_of_parse_and_map(np, 0);
	if (!twd_ppi) {
		err = -EINVAL;
		goto out;
	}

	twd_base = of_iomap(np, 0);
	if (!twd_base) {
		err = -ENOMEM;
		goto out;
	}

	err = twd_local_timer_common_register(np);

out:
	WARN(err, "twd_local_timer_of_register failed (%d)\n", err);
}
CLOCKSOURCE_OF_DECLARE(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register);
CLOCKSOURCE_OF_DECLARE(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register);
CLOCKSOURCE_OF_DECLARE(arm_twd_11mp, "arm,arm11mp-twd-timer", twd_local_timer_of_register);
#endif
Commit	Line	Data
f32f4ce2 RK	1	/*
	2	* linux/arch/arm/kernel/smp_twd.c
	3	*
	4	* Copyright (C) 2002 ARM Ltd.
	5	* All Rights Reserved
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11	#include <linux/init.h>
	12	#include <linux/kernel.h>
5def51b0	13	#include <linux/clk.h>
a894fcc2	14	#include <linux/cpu.h>
f32f4ce2 RK	15	#include <linux/delay.h>
f32f4ce2 RK	16	#include <linux/device.h>
5def51b0	17	#include <linux/err.h>
f32f4ce2 RK	18	#include <linux/smp.h>
	19	#include <linux/jiffies.h>
	20	#include <linux/clockchips.h>
92485104	21	#include <linux/interrupt.h>
f32f4ce2	22	#include <linux/io.h>
d8e03643 MZ	23	#include <linux/of_irq.h>
d8e03643 MZ	24	#include <linux/of_address.h>
f32f4ce2 RK	25
f32f4ce2 RK	26	#include <asm/smp_twd.h>
f32f4ce2	27
f32f4ce2	28	/* set up by the platform code */
92485104	29	static void __iomem *twd_base;
f32f4ce2	30
5def51b0	31	static struct clk *twd_clk;
f32f4ce2	32	static unsigned long twd_timer_rate;
a68becd1	33	static DEFINE_PER_CPU(bool, percpu_setup_called);
f32f4ce2	34
a894fcc2	35	static struct clock_event_device __percpu *twd_evt;
194444c5	36	static int feat_c3stop;
81e46f7b	37	static int twd_ppi;
28af690a	38
5e253571	39	static int twd_shutdown(struct clock_event_device *clk)
f32f4ce2	40	{
5e253571 VK	41	writel_relaxed(0, twd_base + TWD_TIMER_CONTROL);
	42	return 0;
	43	}
f32f4ce2	44
5e253571 VK	45	static int twd_set_oneshot(struct clock_event_device *clk)
	46	{
	47	/* period set, and timer enabled in 'next_event' hook */
	48	writel_relaxed(TWD_TIMER_CONTROL_IT_ENABLE \| TWD_TIMER_CONTROL_ONESHOT,
	49	twd_base + TWD_TIMER_CONTROL);
	50	return 0;
	51	}
	52
	53	static int twd_set_periodic(struct clock_event_device *clk)
	54	{
	55	unsigned long ctrl = TWD_TIMER_CONTROL_ENABLE \|
	56	TWD_TIMER_CONTROL_IT_ENABLE \|
	57	TWD_TIMER_CONTROL_PERIODIC;
	58
	59	writel_relaxed(DIV_ROUND_CLOSEST(twd_timer_rate, HZ),
	60	twd_base + TWD_TIMER_LOAD);
2e874ea3	61	writel_relaxed(ctrl, twd_base + TWD_TIMER_CONTROL);
5e253571	62	return 0;
f32f4ce2 RK	63	}
	64
	65	static int twd_set_next_event(unsigned long evt,
	66	struct clock_event_device *unused)
	67	{
2e874ea3	68	unsigned long ctrl = readl_relaxed(twd_base + TWD_TIMER_CONTROL);
f32f4ce2	69
4c5158d4 RK	70	ctrl \|= TWD_TIMER_CONTROL_ENABLE;
4c5158d4 RK	71
2e874ea3 BD	72	writel_relaxed(evt, twd_base + TWD_TIMER_COUNTER);
2e874ea3 BD	73	writel_relaxed(ctrl, twd_base + TWD_TIMER_CONTROL);
f32f4ce2 RK	74
	75	return 0;
	76	}
	77
	78	/*
	79	* local_timer_ack: checks for a local timer interrupt.
	80	*
	81	* If a local timer interrupt has occurred, acknowledge and return 1.
	82	* Otherwise, return 0.
	83	*/
92485104	84	static int twd_timer_ack(void)
f32f4ce2	85	{
2e874ea3 BD	86	if (readl_relaxed(twd_base + TWD_TIMER_INTSTAT)) {
2e874ea3 BD	87	writel_relaxed(1, twd_base + TWD_TIMER_INTSTAT);
f32f4ce2 RK	88	return 1;
	89	}
	90
	91	return 0;
	92	}
	93
a894fcc2	94	static void twd_timer_stop(void)
28af690a	95	{
06b96c8b	96	struct clock_event_device *clk = raw_cpu_ptr(twd_evt);
a894fcc2	97
5e253571	98	twd_shutdown(clk);
28af690a MZ	99	disable_percpu_irq(clk->irq);
	100	}
	101
2b25d9f6 MT	102	#ifdef CONFIG_COMMON_CLK
	103
	104	/*
	105	* Updates clockevent frequency when the cpu frequency changes.
	106	* Called on the cpu that is changing frequency with interrupts disabled.
	107	*/
	108	static void twd_update_frequency(void *new_rate)
	109	{
	110	twd_timer_rate = ((unsigned long ) new_rate);
	111
06b96c8b	112	clockevents_update_freq(raw_cpu_ptr(twd_evt), twd_timer_rate);
2b25d9f6 MT	113	}
	114
	115	static int twd_rate_change(struct notifier_block *nb,
	116	unsigned long flags, void *data)
	117	{
	118	struct clk_notifier_data *cnd = data;
	119
	120	/*
	121	* The twd clock events must be reprogrammed to account for the new
	122	* frequency. The timer is local to a cpu, so cross-call to the
	123	* changing cpu.
	124	*/
	125	if (flags == POST_RATE_CHANGE)
cbbe6f82	126	on_each_cpu(twd_update_frequency,
2b25d9f6 MT	127	(void *)&cnd->new_rate, 1);
	128
	129	return NOTIFY_OK;
	130	}
	131
	132	static struct notifier_block twd_clk_nb = {
	133	.notifier_call = twd_rate_change,
	134	};
	135
	136	static int twd_clk_init(void)
	137	{
06b96c8b	138	if (twd_evt && raw_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
2b25d9f6 MT	139	return clk_notifier_register(twd_clk, &twd_clk_nb);
	140
	141	return 0;
	142	}
	143	core_initcall(twd_clk_init);
	144
	145	#elif defined (CONFIG_CPU_FREQ)
	146
	147	#include <linux/cpufreq.h>
4fd7f9b1 LW	148
	149	/*
	150	* Updates clockevent frequency when the cpu frequency changes.
	151	* Called on the cpu that is changing frequency with interrupts disabled.
	152	*/
	153	static void twd_update_frequency(void *data)
	154	{
	155	twd_timer_rate = clk_get_rate(twd_clk);
	156
06b96c8b	157	clockevents_update_freq(raw_cpu_ptr(twd_evt), twd_timer_rate);
4fd7f9b1 LW	158	}
	159
	160	static int twd_cpufreq_transition(struct notifier_block *nb,
	161	unsigned long state, void *data)
	162	{
	163	struct cpufreq_freqs *freqs = data;
	164
	165	/*
	166	* The twd clock events must be reprogrammed to account for the new
	167	* frequency. The timer is local to a cpu, so cross-call to the
	168	* changing cpu.
	169	*/
0b443ead	170	if (state == CPUFREQ_POSTCHANGE)
4fd7f9b1	171	smp_call_function_single(freqs->cpu, twd_update_frequency,
3cd88f99	172	NULL, 1);
4fd7f9b1 LW	173
	174	return NOTIFY_OK;
	175	}
	176
	177	static struct notifier_block twd_cpufreq_nb = {
	178	.notifier_call = twd_cpufreq_transition,
	179	};
	180
	181	static int twd_cpufreq_init(void)
	182	{
06b96c8b	183	if (twd_evt && raw_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
4fd7f9b1 LW	184	return cpufreq_register_notifier(&twd_cpufreq_nb,
	185	CPUFREQ_TRANSITION_NOTIFIER);
	186
	187	return 0;
	188	}
	189	core_initcall(twd_cpufreq_init);
	190
	191	#endif
	192
8bd26e3a	193	static void twd_calibrate_rate(void)
f32f4ce2	194	{
03399c1c	195	unsigned long count;
f32f4ce2 RK	196	u64 waitjiffies;
	197
	198	/*
	199	* If this is the first time round, we need to work out how fast
	200	* the timer ticks
	201	*/
	202	if (twd_timer_rate == 0) {
4ed89f22	203	pr_info("Calibrating local timer... ");
f32f4ce2 RK	204
	205	/* Wait for a tick to start */
	206	waitjiffies = get_jiffies_64() + 1;
	207
	208	while (get_jiffies_64() < waitjiffies)
	209	udelay(10);
	210
	211	/* OK, now the tick has started, let's get the timer going */
	212	waitjiffies += 5;
	213
	214	/* enable, no interrupt or reload */
2e874ea3	215	writel_relaxed(0x1, twd_base + TWD_TIMER_CONTROL);
f32f4ce2 RK	216
f32f4ce2 RK	217	/* maximum value */
2e874ea3	218	writel_relaxed(0xFFFFFFFFU, twd_base + TWD_TIMER_COUNTER);
f32f4ce2 RK	219
	220	while (get_jiffies_64() < waitjiffies)
	221	udelay(10);
	222
2e874ea3	223	count = readl_relaxed(twd_base + TWD_TIMER_COUNTER);
f32f4ce2 RK	224
	225	twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);
	226
4ed89f22	227	pr_cont("%lu.%02luMHz.\n", twd_timer_rate / 1000000,
90c5ffe5	228	(twd_timer_rate / 10000) % 100);
f32f4ce2	229	}
f32f4ce2 RK	230	}
f32f4ce2 RK	231
28af690a MZ	232	static irqreturn_t twd_handler(int irq, void *dev_id)
28af690a MZ	233	{
a894fcc2	234	struct clock_event_device *evt = dev_id;
28af690a MZ	235
	236	if (twd_timer_ack()) {
	237	evt->event_handler(evt);
	238	return IRQ_HANDLED;
	239	}
	240
	241	return IRQ_NONE;
	242	}
	243
bd603455	244	static void twd_get_clock(struct device_node *np)
5def51b0	245	{
5def51b0 LW	246	int err;
5def51b0 LW	247
bd603455 RH	248	if (np)
	249	twd_clk = of_clk_get(np, 0);
	250	else
	251	twd_clk = clk_get_sys("smp_twd", NULL);
	252
	253	if (IS_ERR(twd_clk)) {
	254	pr_err("smp_twd: clock not found %d\n", (int) PTR_ERR(twd_clk));
	255	return;
5def51b0 LW	256	}
5def51b0 LW	257
bd603455	258	err = clk_prepare_enable(twd_clk);
5def51b0	259	if (err) {
2577cf24	260	pr_err("smp_twd: clock failed to prepare+enable: %d\n", err);
bd603455 RH	261	clk_put(twd_clk);
bd603455 RH	262	return;
5def51b0 LW	263	}
5def51b0 LW	264
bd603455	265	twd_timer_rate = clk_get_rate(twd_clk);
5def51b0 LW	266	}
5def51b0 LW	267
f32f4ce2 RK	268	/*
	269	* Setup the local clock events for a CPU.
	270	*/
47dcd356	271	static void twd_timer_setup(void)
f32f4ce2	272	{
06b96c8b	273	struct clock_event_device *clk = raw_cpu_ptr(twd_evt);
a68becd1	274	int cpu = smp_processor_id();
28af690a	275
a68becd1 LW	276	/*
	277	* If the basic setup for this CPU has been done before don't
	278	* bother with the below.
	279	*/
	280	if (per_cpu(percpu_setup_called, cpu)) {
2e874ea3	281	writel_relaxed(0, twd_base + TWD_TIMER_CONTROL);
a894fcc2	282	clockevents_register_device(clk);
a68becd1	283	enable_percpu_irq(clk->irq, 0);
a894fcc2	284	return;
a68becd1 LW	285	}
a68becd1 LW	286	per_cpu(percpu_setup_called, cpu) = true;
28af690a	287
bd603455	288	twd_calibrate_rate();
f32f4ce2	289
a68becd1 LW	290	/*
	291	* The following is done once per CPU the first time .setup() is
	292	* called.
	293	*/
2e874ea3	294	writel_relaxed(0, twd_base + TWD_TIMER_CONTROL);
c214455f	295
4c5158d4	296	clk->name = "local_timer";
5388a6b2	297	clk->features = CLOCK_EVT_FEAT_PERIODIC \| CLOCK_EVT_FEAT_ONESHOT \|
194444c5	298	feat_c3stop;
4c5158d4	299	clk->rating = 350;
5e253571 VK	300	clk->set_state_shutdown = twd_shutdown;
	301	clk->set_state_periodic = twd_set_periodic;
	302	clk->set_state_oneshot = twd_set_oneshot;
	303	clk->tick_resume = twd_shutdown;
4c5158d4	304	clk->set_next_event = twd_set_next_event;
92485104	305	clk->irq = twd_ppi;
a894fcc2	306	clk->cpumask = cpumask_of(cpu);
28af690a	307
54d15b1d LW	308	clockevents_config_and_register(clk, twd_timer_rate,
54d15b1d LW	309	0xf, 0xffffffff);
28af690a	310	enable_percpu_irq(clk->irq, 0);
a894fcc2	311	}
81e46f7b	312
47dcd356 OJ	313	static int twd_timer_cpu_notify(struct notifier_block *self,
47dcd356 OJ	314	unsigned long action, void *hcpu)
a894fcc2 SB	315	{
	316	switch (action & ~CPU_TASKS_FROZEN) {
	317	case CPU_STARTING:
	318	twd_timer_setup();
	319	break;
	320	case CPU_DYING:
	321	twd_timer_stop();
	322	break;
	323	}
	324
	325	return NOTIFY_OK;
81e46f7b MZ	326	}
81e46f7b MZ	327
47dcd356	328	static struct notifier_block twd_timer_cpu_nb = {
a894fcc2	329	.notifier_call = twd_timer_cpu_notify,
81e46f7b MZ	330	};
81e46f7b MZ	331
bd603455	332	static int __init twd_local_timer_common_register(struct device_node *np)
81e46f7b MZ	333	{
	334	int err;
	335
a894fcc2	336	twd_evt = alloc_percpu(struct clock_event_device);
d8e03643	337	if (!twd_evt) {
81e46f7b	338	err = -ENOMEM;
d8e03643	339	goto out_free;
81e46f7b MZ	340	}
	341
	342	err = request_percpu_irq(twd_ppi, twd_handler, "twd", twd_evt);
	343	if (err) {
	344	pr_err("twd: can't register interrupt %d (%d)\n", twd_ppi, err);
d8e03643	345	goto out_free;
81e46f7b MZ	346	}
81e46f7b MZ	347
a894fcc2	348	err = register_cpu_notifier(&twd_timer_cpu_nb);
81e46f7b	349	if (err)
d8e03643	350	goto out_irq;
81e46f7b	351
bd603455	352	twd_get_clock(np);
194444c5 MG	353	if (!of_property_read_bool(np, "always-on"))
194444c5 MG	354	feat_c3stop = CLOCK_EVT_FEAT_C3STOP;
bd603455	355
a894fcc2 SB	356	/*
	357	* Immediately configure the timer on the boot CPU, unless we need
	358	* jiffies to be incrementing to calibrate the rate in which case
	359	* setup the timer in late_time_init.
	360	*/
	361	if (twd_timer_rate)
	362	twd_timer_setup();
	363	else
	364	late_time_init = twd_timer_setup;
	365
81e46f7b MZ	366	return 0;
81e46f7b MZ	367
d8e03643 MZ	368	out_irq:
	369	free_percpu_irq(twd_ppi, twd_evt);
	370	out_free:
81e46f7b	371	iounmap(twd_base);
d8e03643	372	twd_base = NULL;
81e46f7b	373	free_percpu(twd_evt);
d8e03643	374
81e46f7b	375	return err;
f32f4ce2	376	}
d8e03643 MZ	377
	378	int __init twd_local_timer_register(struct twd_local_timer *tlt)
	379	{
	380	if (twd_base \|\| twd_evt)
	381	return -EBUSY;
	382
	383	twd_ppi = tlt->res[1].start;
	384
	385	twd_base = ioremap(tlt->res[0].start, resource_size(&tlt->res[0]));
	386	if (!twd_base)
	387	return -ENOMEM;
	388
bd603455	389	return twd_local_timer_common_register(NULL);
d8e03643 MZ	390	}
	391
	392	#ifdef CONFIG_OF
da4a686a	393	static void __init twd_local_timer_of_register(struct device_node *np)
d8e03643	394	{
d8e03643 MZ	395	int err;
d8e03643 MZ	396
d8e03643 MZ	397	twd_ppi = irq_of_parse_and_map(np, 0);
	398	if (!twd_ppi) {
	399	err = -EINVAL;
	400	goto out;
	401	}
	402
	403	twd_base = of_iomap(np, 0);
	404	if (!twd_base) {
	405	err = -ENOMEM;
	406	goto out;
	407	}
	408
bd603455	409	err = twd_local_timer_common_register(np);
d8e03643 MZ	410
	411	out:
	412	WARN(err, "twd_local_timer_of_register failed (%d)\n", err);
	413	}
da4a686a RH	414	CLOCKSOURCE_OF_DECLARE(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register);
	415	CLOCKSOURCE_OF_DECLARE(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register);
	416	CLOCKSOURCE_OF_DECLARE(arm_twd_11mp, "arm,arm11mp-twd-timer", twd_local_timer_of_register);
d8e03643	417	#endif