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1 | /* |
2 | * linux/arch/arm/kernel/smp_twd.c | |
3 | * | |
4 | * Copyright (C) 2002 ARM Ltd. | |
5 | * All Rights Reserved | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | #include <linux/init.h> | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/delay.h> | |
14 | #include <linux/device.h> | |
15 | #include <linux/smp.h> | |
16 | #include <linux/jiffies.h> | |
17 | #include <linux/clockchips.h> | |
18 | #include <linux/irq.h> | |
19 | #include <linux/io.h> | |
20 | ||
21 | #include <asm/smp_twd.h> | |
22 | #include <asm/hardware/gic.h> | |
23 | ||
f32f4ce2 RK |
24 | /* set up by the platform code */ |
25 | void __iomem *twd_base; | |
26 | ||
27 | static unsigned long twd_timer_rate; | |
28 | ||
29 | static void twd_set_mode(enum clock_event_mode mode, | |
30 | struct clock_event_device *clk) | |
31 | { | |
32 | unsigned long ctrl; | |
33 | ||
4c5158d4 | 34 | switch (mode) { |
f32f4ce2 RK |
35 | case CLOCK_EVT_MODE_PERIODIC: |
36 | /* timer load already set up */ | |
37 | ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE | |
38 | | TWD_TIMER_CONTROL_PERIODIC; | |
39 | break; | |
40 | case CLOCK_EVT_MODE_ONESHOT: | |
41 | /* period set, and timer enabled in 'next_event' hook */ | |
42 | ctrl = TWD_TIMER_CONTROL_IT_ENABLE | TWD_TIMER_CONTROL_ONESHOT; | |
43 | break; | |
44 | case CLOCK_EVT_MODE_UNUSED: | |
45 | case CLOCK_EVT_MODE_SHUTDOWN: | |
46 | default: | |
47 | ctrl = 0; | |
48 | } | |
49 | ||
50 | __raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL); | |
51 | } | |
52 | ||
53 | static int twd_set_next_event(unsigned long evt, | |
54 | struct clock_event_device *unused) | |
55 | { | |
56 | unsigned long ctrl = __raw_readl(twd_base + TWD_TIMER_CONTROL); | |
57 | ||
4c5158d4 RK |
58 | ctrl |= TWD_TIMER_CONTROL_ENABLE; |
59 | ||
f32f4ce2 | 60 | __raw_writel(evt, twd_base + TWD_TIMER_COUNTER); |
4c5158d4 | 61 | __raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL); |
f32f4ce2 RK |
62 | |
63 | return 0; | |
64 | } | |
65 | ||
66 | /* | |
67 | * local_timer_ack: checks for a local timer interrupt. | |
68 | * | |
69 | * If a local timer interrupt has occurred, acknowledge and return 1. | |
70 | * Otherwise, return 0. | |
71 | */ | |
72 | int twd_timer_ack(void) | |
73 | { | |
74 | if (__raw_readl(twd_base + TWD_TIMER_INTSTAT)) { | |
75 | __raw_writel(1, twd_base + TWD_TIMER_INTSTAT); | |
76 | return 1; | |
77 | } | |
78 | ||
79 | return 0; | |
80 | } | |
81 | ||
82 | static void __cpuinit twd_calibrate_rate(void) | |
83 | { | |
84 | unsigned long load, count; | |
85 | u64 waitjiffies; | |
86 | ||
87 | /* | |
88 | * If this is the first time round, we need to work out how fast | |
89 | * the timer ticks | |
90 | */ | |
91 | if (twd_timer_rate == 0) { | |
4c5158d4 | 92 | printk(KERN_INFO "Calibrating local timer... "); |
f32f4ce2 RK |
93 | |
94 | /* Wait for a tick to start */ | |
95 | waitjiffies = get_jiffies_64() + 1; | |
96 | ||
97 | while (get_jiffies_64() < waitjiffies) | |
98 | udelay(10); | |
99 | ||
100 | /* OK, now the tick has started, let's get the timer going */ | |
101 | waitjiffies += 5; | |
102 | ||
103 | /* enable, no interrupt or reload */ | |
104 | __raw_writel(0x1, twd_base + TWD_TIMER_CONTROL); | |
105 | ||
106 | /* maximum value */ | |
107 | __raw_writel(0xFFFFFFFFU, twd_base + TWD_TIMER_COUNTER); | |
108 | ||
109 | while (get_jiffies_64() < waitjiffies) | |
110 | udelay(10); | |
111 | ||
112 | count = __raw_readl(twd_base + TWD_TIMER_COUNTER); | |
113 | ||
114 | twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5); | |
115 | ||
116 | printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000, | |
6426d2c2 | 117 | (twd_timer_rate / 1000000) % 100); |
f32f4ce2 RK |
118 | } |
119 | ||
120 | load = twd_timer_rate / HZ; | |
121 | ||
122 | __raw_writel(load, twd_base + TWD_TIMER_LOAD); | |
123 | } | |
124 | ||
125 | /* | |
126 | * Setup the local clock events for a CPU. | |
127 | */ | |
128 | void __cpuinit twd_timer_setup(struct clock_event_device *clk) | |
129 | { | |
f32f4ce2 RK |
130 | twd_calibrate_rate(); |
131 | ||
4c5158d4 | 132 | clk->name = "local_timer"; |
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133 | clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT | |
134 | CLOCK_EVT_FEAT_C3STOP; | |
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135 | clk->rating = 350; |
136 | clk->set_mode = twd_set_mode; | |
137 | clk->set_next_event = twd_set_next_event; | |
138 | clk->shift = 20; | |
139 | clk->mult = div_sc(twd_timer_rate, NSEC_PER_SEC, clk->shift); | |
140 | clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk); | |
141 | clk->min_delta_ns = clockevent_delta2ns(0xf, clk); | |
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142 | |
143 | /* Make sure our local interrupt controller has this enabled */ | |
ac61d143 | 144 | gic_enable_ppi(clk->irq); |
f32f4ce2 RK |
145 | |
146 | clockevents_register_device(clk); | |
147 | } |