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1/*
2 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
3 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
17 */
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18
19#include <linux/mman.h>
20#include <linux/kvm_host.h>
21#include <linux/io.h>
ad361f09 22#include <linux/hugetlb.h>
45e96ea6 23#include <trace/events/kvm.h>
342cd0ab 24#include <asm/pgalloc.h>
94f8e641 25#include <asm/cacheflush.h>
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26#include <asm/kvm_arm.h>
27#include <asm/kvm_mmu.h>
45e96ea6 28#include <asm/kvm_mmio.h>
d5d8184d 29#include <asm/kvm_asm.h>
94f8e641 30#include <asm/kvm_emulate.h>
d5d8184d
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31
32#include "trace.h"
342cd0ab
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33
34extern char __hyp_idmap_text_start[], __hyp_idmap_text_end[];
35
5a677ce0 36static pgd_t *boot_hyp_pgd;
2fb41059 37static pgd_t *hyp_pgd;
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38static DEFINE_MUTEX(kvm_hyp_pgd_mutex);
39
5a677ce0
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40static void *init_bounce_page;
41static unsigned long hyp_idmap_start;
42static unsigned long hyp_idmap_end;
43static phys_addr_t hyp_idmap_vector;
44
38f791a4 45#define hyp_pgd_order get_order(PTRS_PER_PGD * sizeof(pgd_t))
5d4e08c4 46
9b5fdb97 47#define kvm_pmd_huge(_x) (pmd_huge(_x) || pmd_trans_huge(_x))
c6473555 48#define kvm_pud_huge(_x) pud_huge(_x)
ad361f09 49
15a49a44
MS
50#define KVM_S2PTE_FLAG_IS_IOMAP (1UL << 0)
51#define KVM_S2_FLAG_LOGGING_ACTIVE (1UL << 1)
52
53static bool memslot_is_logging(struct kvm_memory_slot *memslot)
54{
15a49a44 55 return memslot->dirty_bitmap && !(memslot->flags & KVM_MEM_READONLY);
7276030a
MS
56}
57
58/**
59 * kvm_flush_remote_tlbs() - flush all VM TLB entries for v7/8
60 * @kvm: pointer to kvm structure.
61 *
62 * Interface to HYP function to flush all VM TLB entries
63 */
64void kvm_flush_remote_tlbs(struct kvm *kvm)
65{
66 kvm_call_hyp(__kvm_tlb_flush_vmid, kvm);
15a49a44 67}
ad361f09 68
48762767 69static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
d5d8184d 70{
d4cb9df5
MZ
71 /*
72 * This function also gets called when dealing with HYP page
73 * tables. As HYP doesn't have an associated struct kvm (and
74 * the HYP page tables are fairly static), we don't do
75 * anything there.
76 */
77 if (kvm)
78 kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, kvm, ipa);
d5d8184d
CD
79}
80
363ef89f
MZ
81/*
82 * D-Cache management functions. They take the page table entries by
83 * value, as they are flushing the cache using the kernel mapping (or
84 * kmap on 32bit).
85 */
86static void kvm_flush_dcache_pte(pte_t pte)
87{
88 __kvm_flush_dcache_pte(pte);
89}
90
91static void kvm_flush_dcache_pmd(pmd_t pmd)
92{
93 __kvm_flush_dcache_pmd(pmd);
94}
95
96static void kvm_flush_dcache_pud(pud_t pud)
97{
98 __kvm_flush_dcache_pud(pud);
99}
100
15a49a44
MS
101/**
102 * stage2_dissolve_pmd() - clear and flush huge PMD entry
103 * @kvm: pointer to kvm structure.
104 * @addr: IPA
105 * @pmd: pmd pointer for IPA
106 *
107 * Function clears a PMD entry, flushes addr 1st and 2nd stage TLBs. Marks all
108 * pages in the range dirty.
109 */
110static void stage2_dissolve_pmd(struct kvm *kvm, phys_addr_t addr, pmd_t *pmd)
111{
112 if (!kvm_pmd_huge(*pmd))
113 return;
114
115 pmd_clear(pmd);
116 kvm_tlb_flush_vmid_ipa(kvm, addr);
117 put_page(virt_to_page(pmd));
118}
119
d5d8184d
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120static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
121 int min, int max)
122{
123 void *page;
124
125 BUG_ON(max > KVM_NR_MEM_OBJS);
126 if (cache->nobjs >= min)
127 return 0;
128 while (cache->nobjs < max) {
129 page = (void *)__get_free_page(PGALLOC_GFP);
130 if (!page)
131 return -ENOMEM;
132 cache->objects[cache->nobjs++] = page;
133 }
134 return 0;
135}
136
137static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
138{
139 while (mc->nobjs)
140 free_page((unsigned long)mc->objects[--mc->nobjs]);
141}
142
143static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
144{
145 void *p;
146
147 BUG_ON(!mc || !mc->nobjs);
148 p = mc->objects[--mc->nobjs];
149 return p;
150}
151
4f853a71 152static void clear_pgd_entry(struct kvm *kvm, pgd_t *pgd, phys_addr_t addr)
979acd5e 153{
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CD
154 pud_t *pud_table __maybe_unused = pud_offset(pgd, 0);
155 pgd_clear(pgd);
156 kvm_tlb_flush_vmid_ipa(kvm, addr);
157 pud_free(NULL, pud_table);
158 put_page(virt_to_page(pgd));
979acd5e
MZ
159}
160
d4cb9df5 161static void clear_pud_entry(struct kvm *kvm, pud_t *pud, phys_addr_t addr)
342cd0ab 162{
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CD
163 pmd_t *pmd_table = pmd_offset(pud, 0);
164 VM_BUG_ON(pud_huge(*pud));
165 pud_clear(pud);
166 kvm_tlb_flush_vmid_ipa(kvm, addr);
167 pmd_free(NULL, pmd_table);
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168 put_page(virt_to_page(pud));
169}
342cd0ab 170
d4cb9df5 171static void clear_pmd_entry(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr)
4f728276 172{
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173 pte_t *pte_table = pte_offset_kernel(pmd, 0);
174 VM_BUG_ON(kvm_pmd_huge(*pmd));
175 pmd_clear(pmd);
176 kvm_tlb_flush_vmid_ipa(kvm, addr);
177 pte_free_kernel(NULL, pte_table);
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178 put_page(virt_to_page(pmd));
179}
180
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181/*
182 * Unmapping vs dcache management:
183 *
184 * If a guest maps certain memory pages as uncached, all writes will
185 * bypass the data cache and go directly to RAM. However, the CPUs
186 * can still speculate reads (not writes) and fill cache lines with
187 * data.
188 *
189 * Those cache lines will be *clean* cache lines though, so a
190 * clean+invalidate operation is equivalent to an invalidate
191 * operation, because no cache lines are marked dirty.
192 *
193 * Those clean cache lines could be filled prior to an uncached write
194 * by the guest, and the cache coherent IO subsystem would therefore
195 * end up writing old data to disk.
196 *
197 * This is why right after unmapping a page/section and invalidating
198 * the corresponding TLBs, we call kvm_flush_dcache_p*() to make sure
199 * the IO subsystem will never hit in the cache.
200 */
4f853a71
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201static void unmap_ptes(struct kvm *kvm, pmd_t *pmd,
202 phys_addr_t addr, phys_addr_t end)
4f728276 203{
4f853a71
CD
204 phys_addr_t start_addr = addr;
205 pte_t *pte, *start_pte;
206
207 start_pte = pte = pte_offset_kernel(pmd, addr);
208 do {
209 if (!pte_none(*pte)) {
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210 pte_t old_pte = *pte;
211
4f853a71 212 kvm_set_pte(pte, __pte(0));
4f853a71 213 kvm_tlb_flush_vmid_ipa(kvm, addr);
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214
215 /* No need to invalidate the cache for device mappings */
216 if ((pte_val(old_pte) & PAGE_S2_DEVICE) != PAGE_S2_DEVICE)
217 kvm_flush_dcache_pte(old_pte);
218
219 put_page(virt_to_page(pte));
4f853a71
CD
220 }
221 } while (pte++, addr += PAGE_SIZE, addr != end);
222
38f791a4 223 if (kvm_pte_table_empty(kvm, start_pte))
4f853a71 224 clear_pmd_entry(kvm, pmd, start_addr);
342cd0ab
CD
225}
226
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227static void unmap_pmds(struct kvm *kvm, pud_t *pud,
228 phys_addr_t addr, phys_addr_t end)
000d3996 229{
4f853a71
CD
230 phys_addr_t next, start_addr = addr;
231 pmd_t *pmd, *start_pmd;
000d3996 232
4f853a71
CD
233 start_pmd = pmd = pmd_offset(pud, addr);
234 do {
235 next = kvm_pmd_addr_end(addr, end);
236 if (!pmd_none(*pmd)) {
237 if (kvm_pmd_huge(*pmd)) {
363ef89f
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238 pmd_t old_pmd = *pmd;
239
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CD
240 pmd_clear(pmd);
241 kvm_tlb_flush_vmid_ipa(kvm, addr);
363ef89f
MZ
242
243 kvm_flush_dcache_pmd(old_pmd);
244
4f853a71
CD
245 put_page(virt_to_page(pmd));
246 } else {
247 unmap_ptes(kvm, pmd, addr, next);
248 }
ad361f09 249 }
4f853a71 250 } while (pmd++, addr = next, addr != end);
ad361f09 251
38f791a4 252 if (kvm_pmd_table_empty(kvm, start_pmd))
4f853a71
CD
253 clear_pud_entry(kvm, pud, start_addr);
254}
000d3996 255
4f853a71
CD
256static void unmap_puds(struct kvm *kvm, pgd_t *pgd,
257 phys_addr_t addr, phys_addr_t end)
258{
259 phys_addr_t next, start_addr = addr;
260 pud_t *pud, *start_pud;
4f728276 261
4f853a71
CD
262 start_pud = pud = pud_offset(pgd, addr);
263 do {
264 next = kvm_pud_addr_end(addr, end);
265 if (!pud_none(*pud)) {
266 if (pud_huge(*pud)) {
363ef89f
MZ
267 pud_t old_pud = *pud;
268
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CD
269 pud_clear(pud);
270 kvm_tlb_flush_vmid_ipa(kvm, addr);
363ef89f
MZ
271
272 kvm_flush_dcache_pud(old_pud);
273
4f853a71
CD
274 put_page(virt_to_page(pud));
275 } else {
276 unmap_pmds(kvm, pud, addr, next);
4f728276
MZ
277 }
278 }
4f853a71 279 } while (pud++, addr = next, addr != end);
4f728276 280
38f791a4 281 if (kvm_pud_table_empty(kvm, start_pud))
4f853a71
CD
282 clear_pgd_entry(kvm, pgd, start_addr);
283}
284
285
286static void unmap_range(struct kvm *kvm, pgd_t *pgdp,
287 phys_addr_t start, u64 size)
288{
289 pgd_t *pgd;
290 phys_addr_t addr = start, end = start + size;
291 phys_addr_t next;
292
04b8dc85 293 pgd = pgdp + kvm_pgd_index(addr);
4f853a71
CD
294 do {
295 next = kvm_pgd_addr_end(addr, end);
7cbb87d6
MR
296 if (!pgd_none(*pgd))
297 unmap_puds(kvm, pgd, addr, next);
4f853a71 298 } while (pgd++, addr = next, addr != end);
000d3996
MZ
299}
300
9d218a1f
MZ
301static void stage2_flush_ptes(struct kvm *kvm, pmd_t *pmd,
302 phys_addr_t addr, phys_addr_t end)
303{
304 pte_t *pte;
305
306 pte = pte_offset_kernel(pmd, addr);
307 do {
363ef89f
MZ
308 if (!pte_none(*pte) &&
309 (pte_val(*pte) & PAGE_S2_DEVICE) != PAGE_S2_DEVICE)
310 kvm_flush_dcache_pte(*pte);
9d218a1f
MZ
311 } while (pte++, addr += PAGE_SIZE, addr != end);
312}
313
314static void stage2_flush_pmds(struct kvm *kvm, pud_t *pud,
315 phys_addr_t addr, phys_addr_t end)
316{
317 pmd_t *pmd;
318 phys_addr_t next;
319
320 pmd = pmd_offset(pud, addr);
321 do {
322 next = kvm_pmd_addr_end(addr, end);
323 if (!pmd_none(*pmd)) {
363ef89f
MZ
324 if (kvm_pmd_huge(*pmd))
325 kvm_flush_dcache_pmd(*pmd);
326 else
9d218a1f 327 stage2_flush_ptes(kvm, pmd, addr, next);
9d218a1f
MZ
328 }
329 } while (pmd++, addr = next, addr != end);
330}
331
332static void stage2_flush_puds(struct kvm *kvm, pgd_t *pgd,
333 phys_addr_t addr, phys_addr_t end)
334{
335 pud_t *pud;
336 phys_addr_t next;
337
338 pud = pud_offset(pgd, addr);
339 do {
340 next = kvm_pud_addr_end(addr, end);
341 if (!pud_none(*pud)) {
363ef89f
MZ
342 if (pud_huge(*pud))
343 kvm_flush_dcache_pud(*pud);
344 else
9d218a1f 345 stage2_flush_pmds(kvm, pud, addr, next);
9d218a1f
MZ
346 }
347 } while (pud++, addr = next, addr != end);
348}
349
350static void stage2_flush_memslot(struct kvm *kvm,
351 struct kvm_memory_slot *memslot)
352{
353 phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
354 phys_addr_t end = addr + PAGE_SIZE * memslot->npages;
355 phys_addr_t next;
356 pgd_t *pgd;
357
04b8dc85 358 pgd = kvm->arch.pgd + kvm_pgd_index(addr);
9d218a1f
MZ
359 do {
360 next = kvm_pgd_addr_end(addr, end);
361 stage2_flush_puds(kvm, pgd, addr, next);
362 } while (pgd++, addr = next, addr != end);
363}
364
365/**
366 * stage2_flush_vm - Invalidate cache for pages mapped in stage 2
367 * @kvm: The struct kvm pointer
368 *
369 * Go through the stage 2 page tables and invalidate any cache lines
370 * backing memory already mapped to the VM.
371 */
3c1e7165 372static void stage2_flush_vm(struct kvm *kvm)
9d218a1f
MZ
373{
374 struct kvm_memslots *slots;
375 struct kvm_memory_slot *memslot;
376 int idx;
377
378 idx = srcu_read_lock(&kvm->srcu);
379 spin_lock(&kvm->mmu_lock);
380
381 slots = kvm_memslots(kvm);
382 kvm_for_each_memslot(memslot, slots)
383 stage2_flush_memslot(kvm, memslot);
384
385 spin_unlock(&kvm->mmu_lock);
386 srcu_read_unlock(&kvm->srcu, idx);
387}
388
d157f4a5
MZ
389/**
390 * free_boot_hyp_pgd - free HYP boot page tables
391 *
392 * Free the HYP boot page tables. The bounce page is also freed.
393 */
394void free_boot_hyp_pgd(void)
395{
396 mutex_lock(&kvm_hyp_pgd_mutex);
397
398 if (boot_hyp_pgd) {
d4cb9df5
MZ
399 unmap_range(NULL, boot_hyp_pgd, hyp_idmap_start, PAGE_SIZE);
400 unmap_range(NULL, boot_hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE);
38f791a4 401 free_pages((unsigned long)boot_hyp_pgd, hyp_pgd_order);
d157f4a5
MZ
402 boot_hyp_pgd = NULL;
403 }
404
405 if (hyp_pgd)
d4cb9df5 406 unmap_range(NULL, hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE);
d157f4a5 407
5d4e08c4 408 free_page((unsigned long)init_bounce_page);
d157f4a5
MZ
409 init_bounce_page = NULL;
410
411 mutex_unlock(&kvm_hyp_pgd_mutex);
412}
413
342cd0ab 414/**
4f728276 415 * free_hyp_pgds - free Hyp-mode page tables
342cd0ab 416 *
5a677ce0
MZ
417 * Assumes hyp_pgd is a page table used strictly in Hyp-mode and
418 * therefore contains either mappings in the kernel memory area (above
419 * PAGE_OFFSET), or device mappings in the vmalloc range (from
420 * VMALLOC_START to VMALLOC_END).
421 *
422 * boot_hyp_pgd should only map two pages for the init code.
342cd0ab 423 */
4f728276 424void free_hyp_pgds(void)
342cd0ab 425{
342cd0ab
CD
426 unsigned long addr;
427
d157f4a5 428 free_boot_hyp_pgd();
4f728276 429
d157f4a5 430 mutex_lock(&kvm_hyp_pgd_mutex);
5a677ce0 431
4f728276
MZ
432 if (hyp_pgd) {
433 for (addr = PAGE_OFFSET; virt_addr_valid(addr); addr += PGDIR_SIZE)
d4cb9df5 434 unmap_range(NULL, hyp_pgd, KERN_TO_HYP(addr), PGDIR_SIZE);
4f728276 435 for (addr = VMALLOC_START; is_vmalloc_addr((void*)addr); addr += PGDIR_SIZE)
d4cb9df5
MZ
436 unmap_range(NULL, hyp_pgd, KERN_TO_HYP(addr), PGDIR_SIZE);
437
38f791a4 438 free_pages((unsigned long)hyp_pgd, hyp_pgd_order);
d157f4a5 439 hyp_pgd = NULL;
4f728276
MZ
440 }
441
342cd0ab
CD
442 mutex_unlock(&kvm_hyp_pgd_mutex);
443}
444
445static void create_hyp_pte_mappings(pmd_t *pmd, unsigned long start,
6060df84
MZ
446 unsigned long end, unsigned long pfn,
447 pgprot_t prot)
342cd0ab
CD
448{
449 pte_t *pte;
450 unsigned long addr;
342cd0ab 451
3562c76d
MZ
452 addr = start;
453 do {
6060df84
MZ
454 pte = pte_offset_kernel(pmd, addr);
455 kvm_set_pte(pte, pfn_pte(pfn, prot));
4f728276 456 get_page(virt_to_page(pte));
5a677ce0 457 kvm_flush_dcache_to_poc(pte, sizeof(*pte));
6060df84 458 pfn++;
3562c76d 459 } while (addr += PAGE_SIZE, addr != end);
342cd0ab
CD
460}
461
462static int create_hyp_pmd_mappings(pud_t *pud, unsigned long start,
6060df84
MZ
463 unsigned long end, unsigned long pfn,
464 pgprot_t prot)
342cd0ab
CD
465{
466 pmd_t *pmd;
467 pte_t *pte;
468 unsigned long addr, next;
469
3562c76d
MZ
470 addr = start;
471 do {
6060df84 472 pmd = pmd_offset(pud, addr);
342cd0ab
CD
473
474 BUG_ON(pmd_sect(*pmd));
475
476 if (pmd_none(*pmd)) {
6060df84 477 pte = pte_alloc_one_kernel(NULL, addr);
342cd0ab
CD
478 if (!pte) {
479 kvm_err("Cannot allocate Hyp pte\n");
480 return -ENOMEM;
481 }
482 pmd_populate_kernel(NULL, pmd, pte);
4f728276 483 get_page(virt_to_page(pmd));
5a677ce0 484 kvm_flush_dcache_to_poc(pmd, sizeof(*pmd));
342cd0ab
CD
485 }
486
487 next = pmd_addr_end(addr, end);
488
6060df84
MZ
489 create_hyp_pte_mappings(pmd, addr, next, pfn, prot);
490 pfn += (next - addr) >> PAGE_SHIFT;
3562c76d 491 } while (addr = next, addr != end);
342cd0ab
CD
492
493 return 0;
494}
495
38f791a4
CD
496static int create_hyp_pud_mappings(pgd_t *pgd, unsigned long start,
497 unsigned long end, unsigned long pfn,
498 pgprot_t prot)
499{
500 pud_t *pud;
501 pmd_t *pmd;
502 unsigned long addr, next;
503 int ret;
504
505 addr = start;
506 do {
507 pud = pud_offset(pgd, addr);
508
509 if (pud_none_or_clear_bad(pud)) {
510 pmd = pmd_alloc_one(NULL, addr);
511 if (!pmd) {
512 kvm_err("Cannot allocate Hyp pmd\n");
513 return -ENOMEM;
514 }
515 pud_populate(NULL, pud, pmd);
516 get_page(virt_to_page(pud));
517 kvm_flush_dcache_to_poc(pud, sizeof(*pud));
518 }
519
520 next = pud_addr_end(addr, end);
521 ret = create_hyp_pmd_mappings(pud, addr, next, pfn, prot);
522 if (ret)
523 return ret;
524 pfn += (next - addr) >> PAGE_SHIFT;
525 } while (addr = next, addr != end);
526
527 return 0;
528}
529
6060df84
MZ
530static int __create_hyp_mappings(pgd_t *pgdp,
531 unsigned long start, unsigned long end,
532 unsigned long pfn, pgprot_t prot)
342cd0ab 533{
342cd0ab
CD
534 pgd_t *pgd;
535 pud_t *pud;
342cd0ab
CD
536 unsigned long addr, next;
537 int err = 0;
538
342cd0ab 539 mutex_lock(&kvm_hyp_pgd_mutex);
3562c76d
MZ
540 addr = start & PAGE_MASK;
541 end = PAGE_ALIGN(end);
542 do {
6060df84 543 pgd = pgdp + pgd_index(addr);
342cd0ab 544
38f791a4
CD
545 if (pgd_none(*pgd)) {
546 pud = pud_alloc_one(NULL, addr);
547 if (!pud) {
548 kvm_err("Cannot allocate Hyp pud\n");
342cd0ab
CD
549 err = -ENOMEM;
550 goto out;
551 }
38f791a4
CD
552 pgd_populate(NULL, pgd, pud);
553 get_page(virt_to_page(pgd));
554 kvm_flush_dcache_to_poc(pgd, sizeof(*pgd));
342cd0ab
CD
555 }
556
557 next = pgd_addr_end(addr, end);
38f791a4 558 err = create_hyp_pud_mappings(pgd, addr, next, pfn, prot);
342cd0ab
CD
559 if (err)
560 goto out;
6060df84 561 pfn += (next - addr) >> PAGE_SHIFT;
3562c76d 562 } while (addr = next, addr != end);
342cd0ab
CD
563out:
564 mutex_unlock(&kvm_hyp_pgd_mutex);
565 return err;
566}
567
40c2729b
CD
568static phys_addr_t kvm_kaddr_to_phys(void *kaddr)
569{
570 if (!is_vmalloc_addr(kaddr)) {
571 BUG_ON(!virt_addr_valid(kaddr));
572 return __pa(kaddr);
573 } else {
574 return page_to_phys(vmalloc_to_page(kaddr)) +
575 offset_in_page(kaddr);
576 }
577}
578
342cd0ab 579/**
06e8c3b0 580 * create_hyp_mappings - duplicate a kernel virtual address range in Hyp mode
342cd0ab
CD
581 * @from: The virtual kernel start address of the range
582 * @to: The virtual kernel end address of the range (exclusive)
583 *
06e8c3b0
MZ
584 * The same virtual address as the kernel virtual address is also used
585 * in Hyp-mode mapping (modulo HYP_PAGE_OFFSET) to the same underlying
586 * physical pages.
342cd0ab
CD
587 */
588int create_hyp_mappings(void *from, void *to)
589{
40c2729b
CD
590 phys_addr_t phys_addr;
591 unsigned long virt_addr;
6060df84
MZ
592 unsigned long start = KERN_TO_HYP((unsigned long)from);
593 unsigned long end = KERN_TO_HYP((unsigned long)to);
594
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CD
595 start = start & PAGE_MASK;
596 end = PAGE_ALIGN(end);
6060df84 597
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CD
598 for (virt_addr = start; virt_addr < end; virt_addr += PAGE_SIZE) {
599 int err;
6060df84 600
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CD
601 phys_addr = kvm_kaddr_to_phys(from + virt_addr - start);
602 err = __create_hyp_mappings(hyp_pgd, virt_addr,
603 virt_addr + PAGE_SIZE,
604 __phys_to_pfn(phys_addr),
605 PAGE_HYP);
606 if (err)
607 return err;
608 }
609
610 return 0;
342cd0ab
CD
611}
612
613/**
06e8c3b0
MZ
614 * create_hyp_io_mappings - duplicate a kernel IO mapping into Hyp mode
615 * @from: The kernel start VA of the range
616 * @to: The kernel end VA of the range (exclusive)
6060df84 617 * @phys_addr: The physical start address which gets mapped
06e8c3b0
MZ
618 *
619 * The resulting HYP VA is the same as the kernel VA, modulo
620 * HYP_PAGE_OFFSET.
342cd0ab 621 */
6060df84 622int create_hyp_io_mappings(void *from, void *to, phys_addr_t phys_addr)
342cd0ab 623{
6060df84
MZ
624 unsigned long start = KERN_TO_HYP((unsigned long)from);
625 unsigned long end = KERN_TO_HYP((unsigned long)to);
626
627 /* Check for a valid kernel IO mapping */
628 if (!is_vmalloc_addr(from) || !is_vmalloc_addr(to - 1))
629 return -EINVAL;
630
631 return __create_hyp_mappings(hyp_pgd, start, end,
632 __phys_to_pfn(phys_addr), PAGE_HYP_DEVICE);
342cd0ab
CD
633}
634
a987370f
MZ
635/* Free the HW pgd, one page at a time */
636static void kvm_free_hwpgd(void *hwpgd)
637{
638 free_pages_exact(hwpgd, kvm_get_hwpgd_size());
639}
640
641/* Allocate the HW PGD, making sure that each page gets its own refcount */
642static void *kvm_alloc_hwpgd(void)
643{
644 unsigned int size = kvm_get_hwpgd_size();
645
646 return alloc_pages_exact(size, GFP_KERNEL | __GFP_ZERO);
647}
648
d5d8184d
CD
649/**
650 * kvm_alloc_stage2_pgd - allocate level-1 table for stage-2 translation.
651 * @kvm: The KVM struct pointer for the VM.
652 *
653 * Allocates the 1st level table only of size defined by S2_PGD_ORDER (can
654 * support either full 40-bit input addresses or limited to 32-bit input
655 * addresses). Clears the allocated pages.
656 *
657 * Note we don't need locking here as this is only called when the VM is
658 * created, which can only be done once.
659 */
660int kvm_alloc_stage2_pgd(struct kvm *kvm)
661{
662 pgd_t *pgd;
a987370f 663 void *hwpgd;
d5d8184d
CD
664
665 if (kvm->arch.pgd != NULL) {
666 kvm_err("kvm_arch already initialized?\n");
667 return -EINVAL;
668 }
669
a987370f
MZ
670 hwpgd = kvm_alloc_hwpgd();
671 if (!hwpgd)
672 return -ENOMEM;
673
674 /* When the kernel uses more levels of page tables than the
675 * guest, we allocate a fake PGD and pre-populate it to point
676 * to the next-level page table, which will be the real
677 * initial page table pointed to by the VTTBR.
678 *
679 * When KVM_PREALLOC_LEVEL==2, we allocate a single page for
680 * the PMD and the kernel will use folded pud.
681 * When KVM_PREALLOC_LEVEL==1, we allocate 2 consecutive PUD
682 * pages.
683 */
38f791a4 684 if (KVM_PREALLOC_LEVEL > 0) {
a987370f
MZ
685 int i;
686
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CD
687 /*
688 * Allocate fake pgd for the page table manipulation macros to
689 * work. This is not used by the hardware and we have no
690 * alignment requirement for this allocation.
691 */
692 pgd = (pgd_t *)kmalloc(PTRS_PER_S2_PGD * sizeof(pgd_t),
693 GFP_KERNEL | __GFP_ZERO);
a987370f
MZ
694
695 if (!pgd) {
696 kvm_free_hwpgd(hwpgd);
697 return -ENOMEM;
698 }
699
700 /* Plug the HW PGD into the fake one. */
701 for (i = 0; i < PTRS_PER_S2_PGD; i++) {
702 if (KVM_PREALLOC_LEVEL == 1)
703 pgd_populate(NULL, pgd + i,
704 (pud_t *)hwpgd + i * PTRS_PER_PUD);
705 else if (KVM_PREALLOC_LEVEL == 2)
706 pud_populate(NULL, pud_offset(pgd, 0) + i,
707 (pmd_t *)hwpgd + i * PTRS_PER_PMD);
708 }
38f791a4
CD
709 } else {
710 /*
711 * Allocate actual first-level Stage-2 page table used by the
712 * hardware for Stage-2 page table walks.
713 */
a987370f 714 pgd = (pgd_t *)hwpgd;
38f791a4
CD
715 }
716
c62ee2b2 717 kvm_clean_pgd(pgd);
d5d8184d 718 kvm->arch.pgd = pgd;
d5d8184d
CD
719 return 0;
720}
721
d5d8184d
CD
722/**
723 * unmap_stage2_range -- Clear stage2 page table entries to unmap a range
724 * @kvm: The VM pointer
725 * @start: The intermediate physical base address of the range to unmap
726 * @size: The size of the area to unmap
727 *
728 * Clear a range of stage-2 mappings, lowering the various ref-counts. Must
729 * be called while holding mmu_lock (unless for freeing the stage2 pgd before
730 * destroying the VM), otherwise another faulting VCPU may come in and mess
731 * with things behind our backs.
732 */
733static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size)
734{
d4cb9df5 735 unmap_range(kvm, kvm->arch.pgd, start, size);
d5d8184d
CD
736}
737
957db105
CD
738static void stage2_unmap_memslot(struct kvm *kvm,
739 struct kvm_memory_slot *memslot)
740{
741 hva_t hva = memslot->userspace_addr;
742 phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
743 phys_addr_t size = PAGE_SIZE * memslot->npages;
744 hva_t reg_end = hva + size;
745
746 /*
747 * A memory region could potentially cover multiple VMAs, and any holes
748 * between them, so iterate over all of them to find out if we should
749 * unmap any of them.
750 *
751 * +--------------------------------------------+
752 * +---------------+----------------+ +----------------+
753 * | : VMA 1 | VMA 2 | | VMA 3 : |
754 * +---------------+----------------+ +----------------+
755 * | memory region |
756 * +--------------------------------------------+
757 */
758 do {
759 struct vm_area_struct *vma = find_vma(current->mm, hva);
760 hva_t vm_start, vm_end;
761
762 if (!vma || vma->vm_start >= reg_end)
763 break;
764
765 /*
766 * Take the intersection of this VMA with the memory region
767 */
768 vm_start = max(hva, vma->vm_start);
769 vm_end = min(reg_end, vma->vm_end);
770
771 if (!(vma->vm_flags & VM_PFNMAP)) {
772 gpa_t gpa = addr + (vm_start - memslot->userspace_addr);
773 unmap_stage2_range(kvm, gpa, vm_end - vm_start);
774 }
775 hva = vm_end;
776 } while (hva < reg_end);
777}
778
779/**
780 * stage2_unmap_vm - Unmap Stage-2 RAM mappings
781 * @kvm: The struct kvm pointer
782 *
783 * Go through the memregions and unmap any reguler RAM
784 * backing memory already mapped to the VM.
785 */
786void stage2_unmap_vm(struct kvm *kvm)
787{
788 struct kvm_memslots *slots;
789 struct kvm_memory_slot *memslot;
790 int idx;
791
792 idx = srcu_read_lock(&kvm->srcu);
793 spin_lock(&kvm->mmu_lock);
794
795 slots = kvm_memslots(kvm);
796 kvm_for_each_memslot(memslot, slots)
797 stage2_unmap_memslot(kvm, memslot);
798
799 spin_unlock(&kvm->mmu_lock);
800 srcu_read_unlock(&kvm->srcu, idx);
801}
802
d5d8184d
CD
803/**
804 * kvm_free_stage2_pgd - free all stage-2 tables
805 * @kvm: The KVM struct pointer for the VM.
806 *
807 * Walks the level-1 page table pointed to by kvm->arch.pgd and frees all
808 * underlying level-2 and level-3 tables before freeing the actual level-1 table
809 * and setting the struct pointer to NULL.
810 *
811 * Note we don't need locking here as this is only called when the VM is
812 * destroyed, which can only be done once.
813 */
814void kvm_free_stage2_pgd(struct kvm *kvm)
815{
816 if (kvm->arch.pgd == NULL)
817 return;
818
819 unmap_stage2_range(kvm, 0, KVM_PHYS_SIZE);
a987370f 820 kvm_free_hwpgd(kvm_get_hwpgd(kvm));
38f791a4
CD
821 if (KVM_PREALLOC_LEVEL > 0)
822 kfree(kvm->arch.pgd);
a987370f 823
d5d8184d
CD
824 kvm->arch.pgd = NULL;
825}
826
38f791a4 827static pud_t *stage2_get_pud(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
ad361f09 828 phys_addr_t addr)
d5d8184d
CD
829{
830 pgd_t *pgd;
831 pud_t *pud;
d5d8184d 832
04b8dc85 833 pgd = kvm->arch.pgd + kvm_pgd_index(addr);
38f791a4
CD
834 if (WARN_ON(pgd_none(*pgd))) {
835 if (!cache)
836 return NULL;
837 pud = mmu_memory_cache_alloc(cache);
838 pgd_populate(NULL, pgd, pud);
839 get_page(virt_to_page(pgd));
840 }
841
842 return pud_offset(pgd, addr);
843}
844
845static pmd_t *stage2_get_pmd(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
846 phys_addr_t addr)
847{
848 pud_t *pud;
849 pmd_t *pmd;
850
851 pud = stage2_get_pud(kvm, cache, addr);
d5d8184d
CD
852 if (pud_none(*pud)) {
853 if (!cache)
ad361f09 854 return NULL;
d5d8184d
CD
855 pmd = mmu_memory_cache_alloc(cache);
856 pud_populate(NULL, pud, pmd);
d5d8184d 857 get_page(virt_to_page(pud));
c62ee2b2
MZ
858 }
859
ad361f09
CD
860 return pmd_offset(pud, addr);
861}
862
863static int stage2_set_pmd_huge(struct kvm *kvm, struct kvm_mmu_memory_cache
864 *cache, phys_addr_t addr, const pmd_t *new_pmd)
865{
866 pmd_t *pmd, old_pmd;
867
868 pmd = stage2_get_pmd(kvm, cache, addr);
869 VM_BUG_ON(!pmd);
d5d8184d 870
ad361f09
CD
871 /*
872 * Mapping in huge pages should only happen through a fault. If a
873 * page is merged into a transparent huge page, the individual
874 * subpages of that huge page should be unmapped through MMU
875 * notifiers before we get here.
876 *
877 * Merging of CompoundPages is not supported; they should become
878 * splitting first, unmapped, merged, and mapped back in on-demand.
879 */
880 VM_BUG_ON(pmd_present(*pmd) && pmd_pfn(*pmd) != pmd_pfn(*new_pmd));
881
882 old_pmd = *pmd;
883 kvm_set_pmd(pmd, *new_pmd);
884 if (pmd_present(old_pmd))
885 kvm_tlb_flush_vmid_ipa(kvm, addr);
886 else
887 get_page(virt_to_page(pmd));
888 return 0;
889}
890
891static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
15a49a44
MS
892 phys_addr_t addr, const pte_t *new_pte,
893 unsigned long flags)
ad361f09
CD
894{
895 pmd_t *pmd;
896 pte_t *pte, old_pte;
15a49a44
MS
897 bool iomap = flags & KVM_S2PTE_FLAG_IS_IOMAP;
898 bool logging_active = flags & KVM_S2_FLAG_LOGGING_ACTIVE;
899
900 VM_BUG_ON(logging_active && !cache);
ad361f09 901
38f791a4 902 /* Create stage-2 page table mapping - Levels 0 and 1 */
ad361f09
CD
903 pmd = stage2_get_pmd(kvm, cache, addr);
904 if (!pmd) {
905 /*
906 * Ignore calls from kvm_set_spte_hva for unallocated
907 * address ranges.
908 */
909 return 0;
910 }
911
15a49a44
MS
912 /*
913 * While dirty page logging - dissolve huge PMD, then continue on to
914 * allocate page.
915 */
916 if (logging_active)
917 stage2_dissolve_pmd(kvm, addr, pmd);
918
ad361f09 919 /* Create stage-2 page mappings - Level 2 */
d5d8184d
CD
920 if (pmd_none(*pmd)) {
921 if (!cache)
922 return 0; /* ignore calls from kvm_set_spte_hva */
923 pte = mmu_memory_cache_alloc(cache);
c62ee2b2 924 kvm_clean_pte(pte);
d5d8184d 925 pmd_populate_kernel(NULL, pmd, pte);
d5d8184d 926 get_page(virt_to_page(pmd));
c62ee2b2
MZ
927 }
928
929 pte = pte_offset_kernel(pmd, addr);
d5d8184d
CD
930
931 if (iomap && pte_present(*pte))
932 return -EFAULT;
933
934 /* Create 2nd stage page table mapping - Level 3 */
935 old_pte = *pte;
936 kvm_set_pte(pte, *new_pte);
937 if (pte_present(old_pte))
48762767 938 kvm_tlb_flush_vmid_ipa(kvm, addr);
d5d8184d
CD
939 else
940 get_page(virt_to_page(pte));
941
942 return 0;
943}
944
945/**
946 * kvm_phys_addr_ioremap - map a device range to guest IPA
947 *
948 * @kvm: The KVM pointer
949 * @guest_ipa: The IPA at which to insert the mapping
950 * @pa: The physical address of the device
951 * @size: The size of the mapping
952 */
953int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
c40f2f8f 954 phys_addr_t pa, unsigned long size, bool writable)
d5d8184d
CD
955{
956 phys_addr_t addr, end;
957 int ret = 0;
958 unsigned long pfn;
959 struct kvm_mmu_memory_cache cache = { 0, };
960
961 end = (guest_ipa + size + PAGE_SIZE - 1) & PAGE_MASK;
962 pfn = __phys_to_pfn(pa);
963
964 for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) {
c62ee2b2 965 pte_t pte = pfn_pte(pfn, PAGE_S2_DEVICE);
d5d8184d 966
c40f2f8f
AB
967 if (writable)
968 kvm_set_s2pte_writable(&pte);
969
38f791a4
CD
970 ret = mmu_topup_memory_cache(&cache, KVM_MMU_CACHE_MIN_PAGES,
971 KVM_NR_MEM_OBJS);
d5d8184d
CD
972 if (ret)
973 goto out;
974 spin_lock(&kvm->mmu_lock);
15a49a44
MS
975 ret = stage2_set_pte(kvm, &cache, addr, &pte,
976 KVM_S2PTE_FLAG_IS_IOMAP);
d5d8184d
CD
977 spin_unlock(&kvm->mmu_lock);
978 if (ret)
979 goto out;
980
981 pfn++;
982 }
983
984out:
985 mmu_free_memory_cache(&cache);
986 return ret;
987}
988
9b5fdb97
CD
989static bool transparent_hugepage_adjust(pfn_t *pfnp, phys_addr_t *ipap)
990{
991 pfn_t pfn = *pfnp;
992 gfn_t gfn = *ipap >> PAGE_SHIFT;
993
994 if (PageTransCompound(pfn_to_page(pfn))) {
995 unsigned long mask;
996 /*
997 * The address we faulted on is backed by a transparent huge
998 * page. However, because we map the compound huge page and
999 * not the individual tail page, we need to transfer the
1000 * refcount to the head page. We have to be careful that the
1001 * THP doesn't start to split while we are adjusting the
1002 * refcounts.
1003 *
1004 * We are sure this doesn't happen, because mmu_notifier_retry
1005 * was successful and we are holding the mmu_lock, so if this
1006 * THP is trying to split, it will be blocked in the mmu
1007 * notifier before touching any of the pages, specifically
1008 * before being able to call __split_huge_page_refcount().
1009 *
1010 * We can therefore safely transfer the refcount from PG_tail
1011 * to PG_head and switch the pfn from a tail page to the head
1012 * page accordingly.
1013 */
1014 mask = PTRS_PER_PMD - 1;
1015 VM_BUG_ON((gfn & mask) != (pfn & mask));
1016 if (pfn & mask) {
1017 *ipap &= PMD_MASK;
1018 kvm_release_pfn_clean(pfn);
1019 pfn &= ~mask;
1020 kvm_get_pfn(pfn);
1021 *pfnp = pfn;
1022 }
1023
1024 return true;
1025 }
1026
1027 return false;
1028}
1029
a7d079ce
AB
1030static bool kvm_is_write_fault(struct kvm_vcpu *vcpu)
1031{
1032 if (kvm_vcpu_trap_is_iabt(vcpu))
1033 return false;
1034
1035 return kvm_vcpu_dabt_iswrite(vcpu);
1036}
1037
bb55e9b1
AB
1038static bool kvm_is_device_pfn(unsigned long pfn)
1039{
1040 return !pfn_valid(pfn);
1041}
1042
c6473555
MS
1043/**
1044 * stage2_wp_ptes - write protect PMD range
1045 * @pmd: pointer to pmd entry
1046 * @addr: range start address
1047 * @end: range end address
1048 */
1049static void stage2_wp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end)
1050{
1051 pte_t *pte;
1052
1053 pte = pte_offset_kernel(pmd, addr);
1054 do {
1055 if (!pte_none(*pte)) {
1056 if (!kvm_s2pte_readonly(pte))
1057 kvm_set_s2pte_readonly(pte);
1058 }
1059 } while (pte++, addr += PAGE_SIZE, addr != end);
1060}
1061
1062/**
1063 * stage2_wp_pmds - write protect PUD range
1064 * @pud: pointer to pud entry
1065 * @addr: range start address
1066 * @end: range end address
1067 */
1068static void stage2_wp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end)
1069{
1070 pmd_t *pmd;
1071 phys_addr_t next;
1072
1073 pmd = pmd_offset(pud, addr);
1074
1075 do {
1076 next = kvm_pmd_addr_end(addr, end);
1077 if (!pmd_none(*pmd)) {
1078 if (kvm_pmd_huge(*pmd)) {
1079 if (!kvm_s2pmd_readonly(pmd))
1080 kvm_set_s2pmd_readonly(pmd);
1081 } else {
1082 stage2_wp_ptes(pmd, addr, next);
1083 }
1084 }
1085 } while (pmd++, addr = next, addr != end);
1086}
1087
1088/**
1089 * stage2_wp_puds - write protect PGD range
1090 * @pgd: pointer to pgd entry
1091 * @addr: range start address
1092 * @end: range end address
1093 *
1094 * Process PUD entries, for a huge PUD we cause a panic.
1095 */
1096static void stage2_wp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end)
1097{
1098 pud_t *pud;
1099 phys_addr_t next;
1100
1101 pud = pud_offset(pgd, addr);
1102 do {
1103 next = kvm_pud_addr_end(addr, end);
1104 if (!pud_none(*pud)) {
1105 /* TODO:PUD not supported, revisit later if supported */
1106 BUG_ON(kvm_pud_huge(*pud));
1107 stage2_wp_pmds(pud, addr, next);
1108 }
1109 } while (pud++, addr = next, addr != end);
1110}
1111
1112/**
1113 * stage2_wp_range() - write protect stage2 memory region range
1114 * @kvm: The KVM pointer
1115 * @addr: Start address of range
1116 * @end: End address of range
1117 */
1118static void stage2_wp_range(struct kvm *kvm, phys_addr_t addr, phys_addr_t end)
1119{
1120 pgd_t *pgd;
1121 phys_addr_t next;
1122
04b8dc85 1123 pgd = kvm->arch.pgd + kvm_pgd_index(addr);
c6473555
MS
1124 do {
1125 /*
1126 * Release kvm_mmu_lock periodically if the memory region is
1127 * large. Otherwise, we may see kernel panics with
227ea818
CD
1128 * CONFIG_DETECT_HUNG_TASK, CONFIG_LOCKUP_DETECTOR,
1129 * CONFIG_LOCKDEP. Additionally, holding the lock too long
c6473555
MS
1130 * will also starve other vCPUs.
1131 */
1132 if (need_resched() || spin_needbreak(&kvm->mmu_lock))
1133 cond_resched_lock(&kvm->mmu_lock);
1134
1135 next = kvm_pgd_addr_end(addr, end);
1136 if (pgd_present(*pgd))
1137 stage2_wp_puds(pgd, addr, next);
1138 } while (pgd++, addr = next, addr != end);
1139}
1140
1141/**
1142 * kvm_mmu_wp_memory_region() - write protect stage 2 entries for memory slot
1143 * @kvm: The KVM pointer
1144 * @slot: The memory slot to write protect
1145 *
1146 * Called to start logging dirty pages after memory region
1147 * KVM_MEM_LOG_DIRTY_PAGES operation is called. After this function returns
1148 * all present PMD and PTEs are write protected in the memory region.
1149 * Afterwards read of dirty page log can be called.
1150 *
1151 * Acquires kvm_mmu_lock. Called with kvm->slots_lock mutex acquired,
1152 * serializing operations for VM memory regions.
1153 */
1154void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot)
1155{
1156 struct kvm_memory_slot *memslot = id_to_memslot(kvm->memslots, slot);
1157 phys_addr_t start = memslot->base_gfn << PAGE_SHIFT;
1158 phys_addr_t end = (memslot->base_gfn + memslot->npages) << PAGE_SHIFT;
1159
1160 spin_lock(&kvm->mmu_lock);
1161 stage2_wp_range(kvm, start, end);
1162 spin_unlock(&kvm->mmu_lock);
1163 kvm_flush_remote_tlbs(kvm);
1164}
53c810c3
MS
1165
1166/**
3b0f1d01 1167 * kvm_mmu_write_protect_pt_masked() - write protect dirty pages
53c810c3
MS
1168 * @kvm: The KVM pointer
1169 * @slot: The memory slot associated with mask
1170 * @gfn_offset: The gfn offset in memory slot
1171 * @mask: The mask of dirty pages at offset 'gfn_offset' in this memory
1172 * slot to be write protected
1173 *
1174 * Walks bits set in mask write protects the associated pte's. Caller must
1175 * acquire kvm_mmu_lock.
1176 */
3b0f1d01 1177static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
53c810c3
MS
1178 struct kvm_memory_slot *slot,
1179 gfn_t gfn_offset, unsigned long mask)
1180{
1181 phys_addr_t base_gfn = slot->base_gfn + gfn_offset;
1182 phys_addr_t start = (base_gfn + __ffs(mask)) << PAGE_SHIFT;
1183 phys_addr_t end = (base_gfn + __fls(mask) + 1) << PAGE_SHIFT;
1184
1185 stage2_wp_range(kvm, start, end);
1186}
c6473555 1187
3b0f1d01
KH
1188/*
1189 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1190 * dirty pages.
1191 *
1192 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1193 * enable dirty logging for them.
1194 */
1195void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
1196 struct kvm_memory_slot *slot,
1197 gfn_t gfn_offset, unsigned long mask)
1198{
1199 kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
1200}
1201
0d3e4d4f
MZ
1202static void coherent_cache_guest_page(struct kvm_vcpu *vcpu, pfn_t pfn,
1203 unsigned long size, bool uncached)
1204{
1205 __coherent_cache_guest_page(vcpu, pfn, size, uncached);
1206}
1207
94f8e641 1208static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
98047888 1209 struct kvm_memory_slot *memslot, unsigned long hva,
94f8e641
CD
1210 unsigned long fault_status)
1211{
94f8e641 1212 int ret;
9b5fdb97 1213 bool write_fault, writable, hugetlb = false, force_pte = false;
94f8e641 1214 unsigned long mmu_seq;
ad361f09 1215 gfn_t gfn = fault_ipa >> PAGE_SHIFT;
ad361f09 1216 struct kvm *kvm = vcpu->kvm;
94f8e641 1217 struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache;
ad361f09
CD
1218 struct vm_area_struct *vma;
1219 pfn_t pfn;
b8865767 1220 pgprot_t mem_type = PAGE_S2;
840f4bfb 1221 bool fault_ipa_uncached;
15a49a44
MS
1222 bool logging_active = memslot_is_logging(memslot);
1223 unsigned long flags = 0;
94f8e641 1224
a7d079ce 1225 write_fault = kvm_is_write_fault(vcpu);
94f8e641
CD
1226 if (fault_status == FSC_PERM && !write_fault) {
1227 kvm_err("Unexpected L2 read permission error\n");
1228 return -EFAULT;
1229 }
1230
ad361f09
CD
1231 /* Let's check if we will get back a huge page backed by hugetlbfs */
1232 down_read(&current->mm->mmap_sem);
1233 vma = find_vma_intersection(current->mm, hva, hva + 1);
37b54408
AB
1234 if (unlikely(!vma)) {
1235 kvm_err("Failed to find VMA for hva 0x%lx\n", hva);
1236 up_read(&current->mm->mmap_sem);
1237 return -EFAULT;
1238 }
1239
15a49a44 1240 if (is_vm_hugetlb_page(vma) && !logging_active) {
ad361f09
CD
1241 hugetlb = true;
1242 gfn = (fault_ipa & PMD_MASK) >> PAGE_SHIFT;
9b5fdb97
CD
1243 } else {
1244 /*
136d737f
MZ
1245 * Pages belonging to memslots that don't have the same
1246 * alignment for userspace and IPA cannot be mapped using
1247 * block descriptors even if the pages belong to a THP for
1248 * the process, because the stage-2 block descriptor will
1249 * cover more than a single THP and we loose atomicity for
1250 * unmapping, updates, and splits of the THP or other pages
1251 * in the stage-2 block range.
9b5fdb97 1252 */
136d737f
MZ
1253 if ((memslot->userspace_addr & ~PMD_MASK) !=
1254 ((memslot->base_gfn << PAGE_SHIFT) & ~PMD_MASK))
9b5fdb97 1255 force_pte = true;
ad361f09
CD
1256 }
1257 up_read(&current->mm->mmap_sem);
1258
94f8e641 1259 /* We need minimum second+third level pages */
38f791a4
CD
1260 ret = mmu_topup_memory_cache(memcache, KVM_MMU_CACHE_MIN_PAGES,
1261 KVM_NR_MEM_OBJS);
94f8e641
CD
1262 if (ret)
1263 return ret;
1264
1265 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1266 /*
1267 * Ensure the read of mmu_notifier_seq happens before we call
1268 * gfn_to_pfn_prot (which calls get_user_pages), so that we don't risk
1269 * the page we just got a reference to gets unmapped before we have a
1270 * chance to grab the mmu_lock, which ensure that if the page gets
1271 * unmapped afterwards, the call to kvm_unmap_hva will take it away
1272 * from us again properly. This smp_rmb() interacts with the smp_wmb()
1273 * in kvm_mmu_notifier_invalidate_<page|range_end>.
1274 */
1275 smp_rmb();
1276
ad361f09 1277 pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &writable);
94f8e641
CD
1278 if (is_error_pfn(pfn))
1279 return -EFAULT;
1280
15a49a44 1281 if (kvm_is_device_pfn(pfn)) {
b8865767 1282 mem_type = PAGE_S2_DEVICE;
15a49a44
MS
1283 flags |= KVM_S2PTE_FLAG_IS_IOMAP;
1284 } else if (logging_active) {
1285 /*
1286 * Faults on pages in a memslot with logging enabled
1287 * should not be mapped with huge pages (it introduces churn
1288 * and performance degradation), so force a pte mapping.
1289 */
1290 force_pte = true;
1291 flags |= KVM_S2_FLAG_LOGGING_ACTIVE;
1292
1293 /*
1294 * Only actually map the page as writable if this was a write
1295 * fault.
1296 */
1297 if (!write_fault)
1298 writable = false;
1299 }
b8865767 1300
ad361f09
CD
1301 spin_lock(&kvm->mmu_lock);
1302 if (mmu_notifier_retry(kvm, mmu_seq))
94f8e641 1303 goto out_unlock;
15a49a44 1304
9b5fdb97
CD
1305 if (!hugetlb && !force_pte)
1306 hugetlb = transparent_hugepage_adjust(&pfn, &fault_ipa);
ad361f09 1307
849260c7 1308 fault_ipa_uncached = memslot->flags & KVM_MEMSLOT_INCOHERENT;
840f4bfb 1309
ad361f09 1310 if (hugetlb) {
b8865767 1311 pmd_t new_pmd = pfn_pmd(pfn, mem_type);
ad361f09
CD
1312 new_pmd = pmd_mkhuge(new_pmd);
1313 if (writable) {
1314 kvm_set_s2pmd_writable(&new_pmd);
1315 kvm_set_pfn_dirty(pfn);
1316 }
0d3e4d4f 1317 coherent_cache_guest_page(vcpu, pfn, PMD_SIZE, fault_ipa_uncached);
ad361f09
CD
1318 ret = stage2_set_pmd_huge(kvm, memcache, fault_ipa, &new_pmd);
1319 } else {
b8865767 1320 pte_t new_pte = pfn_pte(pfn, mem_type);
15a49a44 1321
ad361f09
CD
1322 if (writable) {
1323 kvm_set_s2pte_writable(&new_pte);
1324 kvm_set_pfn_dirty(pfn);
15a49a44 1325 mark_page_dirty(kvm, gfn);
ad361f09 1326 }
0d3e4d4f 1327 coherent_cache_guest_page(vcpu, pfn, PAGE_SIZE, fault_ipa_uncached);
15a49a44 1328 ret = stage2_set_pte(kvm, memcache, fault_ipa, &new_pte, flags);
94f8e641 1329 }
ad361f09 1330
94f8e641 1331out_unlock:
ad361f09 1332 spin_unlock(&kvm->mmu_lock);
94f8e641 1333 kvm_release_pfn_clean(pfn);
ad361f09 1334 return ret;
94f8e641
CD
1335}
1336
1337/**
1338 * kvm_handle_guest_abort - handles all 2nd stage aborts
1339 * @vcpu: the VCPU pointer
1340 * @run: the kvm_run structure
1341 *
1342 * Any abort that gets to the host is almost guaranteed to be caused by a
1343 * missing second stage translation table entry, which can mean that either the
1344 * guest simply needs more memory and we must allocate an appropriate page or it
1345 * can mean that the guest tried to access I/O memory, which is emulated by user
1346 * space. The distinction is based on the IPA causing the fault and whether this
1347 * memory region has been registered as standard RAM by user space.
1348 */
342cd0ab
CD
1349int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run)
1350{
94f8e641
CD
1351 unsigned long fault_status;
1352 phys_addr_t fault_ipa;
1353 struct kvm_memory_slot *memslot;
98047888
CD
1354 unsigned long hva;
1355 bool is_iabt, write_fault, writable;
94f8e641
CD
1356 gfn_t gfn;
1357 int ret, idx;
1358
52d1dba9 1359 is_iabt = kvm_vcpu_trap_is_iabt(vcpu);
7393b599 1360 fault_ipa = kvm_vcpu_get_fault_ipa(vcpu);
94f8e641 1361
7393b599
MZ
1362 trace_kvm_guest_fault(*vcpu_pc(vcpu), kvm_vcpu_get_hsr(vcpu),
1363 kvm_vcpu_get_hfar(vcpu), fault_ipa);
94f8e641
CD
1364
1365 /* Check the stage-2 fault is trans. fault or write fault */
0496daa5 1366 fault_status = kvm_vcpu_trap_get_fault_type(vcpu);
94f8e641 1367 if (fault_status != FSC_FAULT && fault_status != FSC_PERM) {
0496daa5
CD
1368 kvm_err("Unsupported FSC: EC=%#x xFSC=%#lx ESR_EL2=%#lx\n",
1369 kvm_vcpu_trap_get_class(vcpu),
1370 (unsigned long)kvm_vcpu_trap_get_fault(vcpu),
1371 (unsigned long)kvm_vcpu_get_hsr(vcpu));
94f8e641
CD
1372 return -EFAULT;
1373 }
1374
1375 idx = srcu_read_lock(&vcpu->kvm->srcu);
1376
1377 gfn = fault_ipa >> PAGE_SHIFT;
98047888
CD
1378 memslot = gfn_to_memslot(vcpu->kvm, gfn);
1379 hva = gfn_to_hva_memslot_prot(memslot, gfn, &writable);
a7d079ce 1380 write_fault = kvm_is_write_fault(vcpu);
98047888 1381 if (kvm_is_error_hva(hva) || (write_fault && !writable)) {
94f8e641
CD
1382 if (is_iabt) {
1383 /* Prefetch Abort on I/O address */
7393b599 1384 kvm_inject_pabt(vcpu, kvm_vcpu_get_hfar(vcpu));
94f8e641
CD
1385 ret = 1;
1386 goto out_unlock;
1387 }
1388
cfe3950c
MZ
1389 /*
1390 * The IPA is reported as [MAX:12], so we need to
1391 * complement it with the bottom 12 bits from the
1392 * faulting VA. This is always 12 bits, irrespective
1393 * of the page size.
1394 */
1395 fault_ipa |= kvm_vcpu_get_hfar(vcpu) & ((1 << 12) - 1);
45e96ea6 1396 ret = io_mem_abort(vcpu, run, fault_ipa);
94f8e641
CD
1397 goto out_unlock;
1398 }
1399
c3058d5d
CD
1400 /* Userspace should not be able to register out-of-bounds IPAs */
1401 VM_BUG_ON(fault_ipa >= KVM_PHYS_SIZE);
1402
98047888 1403 ret = user_mem_abort(vcpu, fault_ipa, memslot, hva, fault_status);
94f8e641
CD
1404 if (ret == 0)
1405 ret = 1;
1406out_unlock:
1407 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1408 return ret;
342cd0ab
CD
1409}
1410
d5d8184d
CD
1411static void handle_hva_to_gpa(struct kvm *kvm,
1412 unsigned long start,
1413 unsigned long end,
1414 void (*handler)(struct kvm *kvm,
1415 gpa_t gpa, void *data),
1416 void *data)
1417{
1418 struct kvm_memslots *slots;
1419 struct kvm_memory_slot *memslot;
1420
1421 slots = kvm_memslots(kvm);
1422
1423 /* we only care about the pages that the guest sees */
1424 kvm_for_each_memslot(memslot, slots) {
1425 unsigned long hva_start, hva_end;
1426 gfn_t gfn, gfn_end;
1427
1428 hva_start = max(start, memslot->userspace_addr);
1429 hva_end = min(end, memslot->userspace_addr +
1430 (memslot->npages << PAGE_SHIFT));
1431 if (hva_start >= hva_end)
1432 continue;
1433
1434 /*
1435 * {gfn(page) | page intersects with [hva_start, hva_end)} =
1436 * {gfn_start, gfn_start+1, ..., gfn_end-1}.
1437 */
1438 gfn = hva_to_gfn_memslot(hva_start, memslot);
1439 gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
1440
1441 for (; gfn < gfn_end; ++gfn) {
1442 gpa_t gpa = gfn << PAGE_SHIFT;
1443 handler(kvm, gpa, data);
1444 }
1445 }
1446}
1447
1448static void kvm_unmap_hva_handler(struct kvm *kvm, gpa_t gpa, void *data)
1449{
1450 unmap_stage2_range(kvm, gpa, PAGE_SIZE);
d5d8184d
CD
1451}
1452
1453int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
1454{
1455 unsigned long end = hva + PAGE_SIZE;
1456
1457 if (!kvm->arch.pgd)
1458 return 0;
1459
1460 trace_kvm_unmap_hva(hva);
1461 handle_hva_to_gpa(kvm, hva, end, &kvm_unmap_hva_handler, NULL);
1462 return 0;
1463}
1464
1465int kvm_unmap_hva_range(struct kvm *kvm,
1466 unsigned long start, unsigned long end)
1467{
1468 if (!kvm->arch.pgd)
1469 return 0;
1470
1471 trace_kvm_unmap_hva_range(start, end);
1472 handle_hva_to_gpa(kvm, start, end, &kvm_unmap_hva_handler, NULL);
1473 return 0;
1474}
1475
1476static void kvm_set_spte_handler(struct kvm *kvm, gpa_t gpa, void *data)
1477{
1478 pte_t *pte = (pte_t *)data;
1479
15a49a44
MS
1480 /*
1481 * We can always call stage2_set_pte with KVM_S2PTE_FLAG_LOGGING_ACTIVE
1482 * flag clear because MMU notifiers will have unmapped a huge PMD before
1483 * calling ->change_pte() (which in turn calls kvm_set_spte_hva()) and
1484 * therefore stage2_set_pte() never needs to clear out a huge PMD
1485 * through this calling path.
1486 */
1487 stage2_set_pte(kvm, NULL, gpa, pte, 0);
d5d8184d
CD
1488}
1489
1490
1491void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
1492{
1493 unsigned long end = hva + PAGE_SIZE;
1494 pte_t stage2_pte;
1495
1496 if (!kvm->arch.pgd)
1497 return;
1498
1499 trace_kvm_set_spte_hva(hva);
1500 stage2_pte = pfn_pte(pte_pfn(pte), PAGE_S2);
1501 handle_hva_to_gpa(kvm, hva, end, &kvm_set_spte_handler, &stage2_pte);
1502}
1503
1504void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu)
1505{
1506 mmu_free_memory_cache(&vcpu->arch.mmu_page_cache);
1507}
1508
342cd0ab
CD
1509phys_addr_t kvm_mmu_get_httbr(void)
1510{
342cd0ab
CD
1511 return virt_to_phys(hyp_pgd);
1512}
1513
5a677ce0
MZ
1514phys_addr_t kvm_mmu_get_boot_httbr(void)
1515{
1516 return virt_to_phys(boot_hyp_pgd);
1517}
1518
1519phys_addr_t kvm_get_idmap_vector(void)
1520{
1521 return hyp_idmap_vector;
1522}
1523
342cd0ab
CD
1524int kvm_mmu_init(void)
1525{
2fb41059
MZ
1526 int err;
1527
4fda342c
SS
1528 hyp_idmap_start = kvm_virt_to_phys(__hyp_idmap_text_start);
1529 hyp_idmap_end = kvm_virt_to_phys(__hyp_idmap_text_end);
1530 hyp_idmap_vector = kvm_virt_to_phys(__kvm_hyp_init);
5a677ce0
MZ
1531
1532 if ((hyp_idmap_start ^ hyp_idmap_end) & PAGE_MASK) {
1533 /*
1534 * Our init code is crossing a page boundary. Allocate
1535 * a bounce page, copy the code over and use that.
1536 */
1537 size_t len = __hyp_idmap_text_end - __hyp_idmap_text_start;
1538 phys_addr_t phys_base;
1539
5d4e08c4 1540 init_bounce_page = (void *)__get_free_page(GFP_KERNEL);
5a677ce0
MZ
1541 if (!init_bounce_page) {
1542 kvm_err("Couldn't allocate HYP init bounce page\n");
1543 err = -ENOMEM;
1544 goto out;
1545 }
1546
1547 memcpy(init_bounce_page, __hyp_idmap_text_start, len);
1548 /*
1549 * Warning: the code we just copied to the bounce page
1550 * must be flushed to the point of coherency.
1551 * Otherwise, the data may be sitting in L2, and HYP
1552 * mode won't be able to observe it as it runs with
1553 * caches off at that point.
1554 */
1555 kvm_flush_dcache_to_poc(init_bounce_page, len);
1556
4fda342c 1557 phys_base = kvm_virt_to_phys(init_bounce_page);
5a677ce0
MZ
1558 hyp_idmap_vector += phys_base - hyp_idmap_start;
1559 hyp_idmap_start = phys_base;
1560 hyp_idmap_end = phys_base + len;
1561
1562 kvm_info("Using HYP init bounce page @%lx\n",
1563 (unsigned long)phys_base);
1564 }
1565
38f791a4
CD
1566 hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, hyp_pgd_order);
1567 boot_hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, hyp_pgd_order);
5d4e08c4 1568
5a677ce0 1569 if (!hyp_pgd || !boot_hyp_pgd) {
d5d8184d 1570 kvm_err("Hyp mode PGD not allocated\n");
2fb41059
MZ
1571 err = -ENOMEM;
1572 goto out;
1573 }
1574
1575 /* Create the idmap in the boot page tables */
1576 err = __create_hyp_mappings(boot_hyp_pgd,
1577 hyp_idmap_start, hyp_idmap_end,
1578 __phys_to_pfn(hyp_idmap_start),
1579 PAGE_HYP);
1580
1581 if (err) {
1582 kvm_err("Failed to idmap %lx-%lx\n",
1583 hyp_idmap_start, hyp_idmap_end);
1584 goto out;
d5d8184d
CD
1585 }
1586
5a677ce0
MZ
1587 /* Map the very same page at the trampoline VA */
1588 err = __create_hyp_mappings(boot_hyp_pgd,
1589 TRAMPOLINE_VA, TRAMPOLINE_VA + PAGE_SIZE,
1590 __phys_to_pfn(hyp_idmap_start),
1591 PAGE_HYP);
1592 if (err) {
1593 kvm_err("Failed to map trampoline @%lx into boot HYP pgd\n",
1594 TRAMPOLINE_VA);
1595 goto out;
1596 }
1597
1598 /* Map the same page again into the runtime page tables */
1599 err = __create_hyp_mappings(hyp_pgd,
1600 TRAMPOLINE_VA, TRAMPOLINE_VA + PAGE_SIZE,
1601 __phys_to_pfn(hyp_idmap_start),
1602 PAGE_HYP);
1603 if (err) {
1604 kvm_err("Failed to map trampoline @%lx into runtime HYP pgd\n",
1605 TRAMPOLINE_VA);
1606 goto out;
1607 }
1608
d5d8184d 1609 return 0;
2fb41059 1610out:
4f728276 1611 free_hyp_pgds();
2fb41059 1612 return err;
342cd0ab 1613}
df6ce24f
EA
1614
1615void kvm_arch_commit_memory_region(struct kvm *kvm,
1616 struct kvm_userspace_memory_region *mem,
1617 const struct kvm_memory_slot *old,
1618 enum kvm_mr_change change)
1619{
c6473555
MS
1620 /*
1621 * At this point memslot has been committed and there is an
1622 * allocated dirty_bitmap[], dirty pages will be be tracked while the
1623 * memory slot is write protected.
1624 */
1625 if (change != KVM_MR_DELETE && mem->flags & KVM_MEM_LOG_DIRTY_PAGES)
1626 kvm_mmu_wp_memory_region(kvm, mem->slot);
df6ce24f
EA
1627}
1628
1629int kvm_arch_prepare_memory_region(struct kvm *kvm,
1630 struct kvm_memory_slot *memslot,
1631 struct kvm_userspace_memory_region *mem,
1632 enum kvm_mr_change change)
1633{
8eef9123
AB
1634 hva_t hva = mem->userspace_addr;
1635 hva_t reg_end = hva + mem->memory_size;
1636 bool writable = !(mem->flags & KVM_MEM_READONLY);
1637 int ret = 0;
1638
15a49a44
MS
1639 if (change != KVM_MR_CREATE && change != KVM_MR_MOVE &&
1640 change != KVM_MR_FLAGS_ONLY)
8eef9123
AB
1641 return 0;
1642
c3058d5d
CD
1643 /*
1644 * Prevent userspace from creating a memory region outside of the IPA
1645 * space addressable by the KVM guest IPA space.
1646 */
1647 if (memslot->base_gfn + memslot->npages >=
1648 (KVM_PHYS_SIZE >> PAGE_SHIFT))
1649 return -EFAULT;
1650
8eef9123
AB
1651 /*
1652 * A memory region could potentially cover multiple VMAs, and any holes
1653 * between them, so iterate over all of them to find out if we can map
1654 * any of them right now.
1655 *
1656 * +--------------------------------------------+
1657 * +---------------+----------------+ +----------------+
1658 * | : VMA 1 | VMA 2 | | VMA 3 : |
1659 * +---------------+----------------+ +----------------+
1660 * | memory region |
1661 * +--------------------------------------------+
1662 */
1663 do {
1664 struct vm_area_struct *vma = find_vma(current->mm, hva);
1665 hva_t vm_start, vm_end;
1666
1667 if (!vma || vma->vm_start >= reg_end)
1668 break;
1669
1670 /*
1671 * Mapping a read-only VMA is only allowed if the
1672 * memory region is configured as read-only.
1673 */
1674 if (writable && !(vma->vm_flags & VM_WRITE)) {
1675 ret = -EPERM;
1676 break;
1677 }
1678
1679 /*
1680 * Take the intersection of this VMA with the memory region
1681 */
1682 vm_start = max(hva, vma->vm_start);
1683 vm_end = min(reg_end, vma->vm_end);
1684
1685 if (vma->vm_flags & VM_PFNMAP) {
1686 gpa_t gpa = mem->guest_phys_addr +
1687 (vm_start - mem->userspace_addr);
1688 phys_addr_t pa = (vma->vm_pgoff << PAGE_SHIFT) +
1689 vm_start - vma->vm_start;
1690
15a49a44
MS
1691 /* IO region dirty page logging not allowed */
1692 if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES)
1693 return -EINVAL;
1694
8eef9123
AB
1695 ret = kvm_phys_addr_ioremap(kvm, gpa, pa,
1696 vm_end - vm_start,
1697 writable);
1698 if (ret)
1699 break;
1700 }
1701 hva = vm_end;
1702 } while (hva < reg_end);
1703
15a49a44
MS
1704 if (change == KVM_MR_FLAGS_ONLY)
1705 return ret;
1706
849260c7
AB
1707 spin_lock(&kvm->mmu_lock);
1708 if (ret)
8eef9123 1709 unmap_stage2_range(kvm, mem->guest_phys_addr, mem->memory_size);
849260c7
AB
1710 else
1711 stage2_flush_memslot(kvm, memslot);
1712 spin_unlock(&kvm->mmu_lock);
8eef9123 1713 return ret;
df6ce24f
EA
1714}
1715
1716void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
1717 struct kvm_memory_slot *dont)
1718{
1719}
1720
1721int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
1722 unsigned long npages)
1723{
849260c7
AB
1724 /*
1725 * Readonly memslots are not incoherent with the caches by definition,
1726 * but in practice, they are used mostly to emulate ROMs or NOR flashes
1727 * that the guest may consider devices and hence map as uncached.
1728 * To prevent incoherency issues in these cases, tag all readonly
1729 * regions as incoherent.
1730 */
1731 if (slot->flags & KVM_MEM_READONLY)
1732 slot->flags |= KVM_MEMSLOT_INCOHERENT;
df6ce24f
EA
1733 return 0;
1734}
1735
1736void kvm_arch_memslots_updated(struct kvm *kvm)
1737{
1738}
1739
1740void kvm_arch_flush_shadow_all(struct kvm *kvm)
1741{
1742}
1743
1744void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
1745 struct kvm_memory_slot *slot)
1746{
8eef9123
AB
1747 gpa_t gpa = slot->base_gfn << PAGE_SHIFT;
1748 phys_addr_t size = slot->npages << PAGE_SHIFT;
1749
1750 spin_lock(&kvm->mmu_lock);
1751 unmap_stage2_range(kvm, gpa, size);
1752 spin_unlock(&kvm->mmu_lock);
df6ce24f 1753}
3c1e7165
MZ
1754
1755/*
1756 * See note at ARMv7 ARM B1.14.4 (TL;DR: S/W ops are not easily virtualized).
1757 *
1758 * Main problems:
1759 * - S/W ops are local to a CPU (not broadcast)
1760 * - We have line migration behind our back (speculation)
1761 * - System caches don't support S/W at all (damn!)
1762 *
1763 * In the face of the above, the best we can do is to try and convert
1764 * S/W ops to VA ops. Because the guest is not allowed to infer the
1765 * S/W to PA mapping, it can only use S/W to nuke the whole cache,
1766 * which is a rather good thing for us.
1767 *
1768 * Also, it is only used when turning caches on/off ("The expected
1769 * usage of the cache maintenance instructions that operate by set/way
1770 * is associated with the cache maintenance instructions associated
1771 * with the powerdown and powerup of caches, if this is required by
1772 * the implementation.").
1773 *
1774 * We use the following policy:
1775 *
1776 * - If we trap a S/W operation, we enable VM trapping to detect
1777 * caches being turned on/off, and do a full clean.
1778 *
1779 * - We flush the caches on both caches being turned on and off.
1780 *
1781 * - Once the caches are enabled, we stop trapping VM ops.
1782 */
1783void kvm_set_way_flush(struct kvm_vcpu *vcpu)
1784{
1785 unsigned long hcr = vcpu_get_hcr(vcpu);
1786
1787 /*
1788 * If this is the first time we do a S/W operation
1789 * (i.e. HCR_TVM not set) flush the whole memory, and set the
1790 * VM trapping.
1791 *
1792 * Otherwise, rely on the VM trapping to wait for the MMU +
1793 * Caches to be turned off. At that point, we'll be able to
1794 * clean the caches again.
1795 */
1796 if (!(hcr & HCR_TVM)) {
1797 trace_kvm_set_way_flush(*vcpu_pc(vcpu),
1798 vcpu_has_cache_enabled(vcpu));
1799 stage2_flush_vm(vcpu->kvm);
1800 vcpu_set_hcr(vcpu, hcr | HCR_TVM);
1801 }
1802}
1803
1804void kvm_toggle_cache(struct kvm_vcpu *vcpu, bool was_enabled)
1805{
1806 bool now_enabled = vcpu_has_cache_enabled(vcpu);
1807
1808 /*
1809 * If switching the MMU+caches on, need to invalidate the caches.
1810 * If switching it off, need to clean the caches.
1811 * Clean + invalidate does the trick always.
1812 */
1813 if (now_enabled != was_enabled)
1814 stage2_flush_vm(vcpu->kvm);
1815
1816 /* Caches are now on, stop trapping VM ops (until a S/W op) */
1817 if (now_enabled)
1818 vcpu_set_hcr(vcpu, vcpu_get_hcr(vcpu) & ~HCR_TVM);
1819
1820 trace_kvm_toggle_cache(*vcpu_pc(vcpu), was_enabled, now_enabled);
1821}