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1/*
2 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
3 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
17 */
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18
19#include <linux/mman.h>
20#include <linux/kvm_host.h>
21#include <linux/io.h>
ad361f09 22#include <linux/hugetlb.h>
45e96ea6 23#include <trace/events/kvm.h>
342cd0ab 24#include <asm/pgalloc.h>
94f8e641 25#include <asm/cacheflush.h>
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26#include <asm/kvm_arm.h>
27#include <asm/kvm_mmu.h>
45e96ea6 28#include <asm/kvm_mmio.h>
d5d8184d 29#include <asm/kvm_asm.h>
94f8e641 30#include <asm/kvm_emulate.h>
1e947bad 31#include <asm/virt.h>
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32
33#include "trace.h"
342cd0ab 34
5a677ce0 35static pgd_t *boot_hyp_pgd;
2fb41059 36static pgd_t *hyp_pgd;
e4c5a685 37static pgd_t *merged_hyp_pgd;
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38static DEFINE_MUTEX(kvm_hyp_pgd_mutex);
39
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40static unsigned long hyp_idmap_start;
41static unsigned long hyp_idmap_end;
42static phys_addr_t hyp_idmap_vector;
43
9163ee23 44#define S2_PGD_SIZE (PTRS_PER_S2_PGD * sizeof(pgd_t))
38f791a4 45#define hyp_pgd_order get_order(PTRS_PER_PGD * sizeof(pgd_t))
5d4e08c4 46
15a49a44
MS
47#define KVM_S2PTE_FLAG_IS_IOMAP (1UL << 0)
48#define KVM_S2_FLAG_LOGGING_ACTIVE (1UL << 1)
49
50static bool memslot_is_logging(struct kvm_memory_slot *memslot)
51{
15a49a44 52 return memslot->dirty_bitmap && !(memslot->flags & KVM_MEM_READONLY);
7276030a
MS
53}
54
55/**
56 * kvm_flush_remote_tlbs() - flush all VM TLB entries for v7/8
57 * @kvm: pointer to kvm structure.
58 *
59 * Interface to HYP function to flush all VM TLB entries
60 */
61void kvm_flush_remote_tlbs(struct kvm *kvm)
62{
63 kvm_call_hyp(__kvm_tlb_flush_vmid, kvm);
15a49a44 64}
ad361f09 65
48762767 66static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
d5d8184d 67{
8684e701 68 kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, kvm, ipa);
d5d8184d
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69}
70
363ef89f
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71/*
72 * D-Cache management functions. They take the page table entries by
73 * value, as they are flushing the cache using the kernel mapping (or
74 * kmap on 32bit).
75 */
76static void kvm_flush_dcache_pte(pte_t pte)
77{
78 __kvm_flush_dcache_pte(pte);
79}
80
81static void kvm_flush_dcache_pmd(pmd_t pmd)
82{
83 __kvm_flush_dcache_pmd(pmd);
84}
85
86static void kvm_flush_dcache_pud(pud_t pud)
87{
88 __kvm_flush_dcache_pud(pud);
89}
90
e6fab544
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91static bool kvm_is_device_pfn(unsigned long pfn)
92{
93 return !pfn_valid(pfn);
94}
95
15a49a44
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96/**
97 * stage2_dissolve_pmd() - clear and flush huge PMD entry
98 * @kvm: pointer to kvm structure.
99 * @addr: IPA
100 * @pmd: pmd pointer for IPA
101 *
102 * Function clears a PMD entry, flushes addr 1st and 2nd stage TLBs. Marks all
103 * pages in the range dirty.
104 */
105static void stage2_dissolve_pmd(struct kvm *kvm, phys_addr_t addr, pmd_t *pmd)
106{
bbb3b6b3 107 if (!pmd_thp_or_huge(*pmd))
15a49a44
MS
108 return;
109
110 pmd_clear(pmd);
111 kvm_tlb_flush_vmid_ipa(kvm, addr);
112 put_page(virt_to_page(pmd));
113}
114
d5d8184d
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115static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
116 int min, int max)
117{
118 void *page;
119
120 BUG_ON(max > KVM_NR_MEM_OBJS);
121 if (cache->nobjs >= min)
122 return 0;
123 while (cache->nobjs < max) {
124 page = (void *)__get_free_page(PGALLOC_GFP);
125 if (!page)
126 return -ENOMEM;
127 cache->objects[cache->nobjs++] = page;
128 }
129 return 0;
130}
131
132static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
133{
134 while (mc->nobjs)
135 free_page((unsigned long)mc->objects[--mc->nobjs]);
136}
137
138static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
139{
140 void *p;
141
142 BUG_ON(!mc || !mc->nobjs);
143 p = mc->objects[--mc->nobjs];
144 return p;
145}
146
7a1c831e 147static void clear_stage2_pgd_entry(struct kvm *kvm, pgd_t *pgd, phys_addr_t addr)
979acd5e 148{
7a1c831e
SP
149 pud_t *pud_table __maybe_unused = stage2_pud_offset(pgd, 0UL);
150 stage2_pgd_clear(pgd);
4f853a71 151 kvm_tlb_flush_vmid_ipa(kvm, addr);
7a1c831e 152 stage2_pud_free(pud_table);
4f853a71 153 put_page(virt_to_page(pgd));
979acd5e
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154}
155
7a1c831e 156static void clear_stage2_pud_entry(struct kvm *kvm, pud_t *pud, phys_addr_t addr)
342cd0ab 157{
7a1c831e
SP
158 pmd_t *pmd_table __maybe_unused = stage2_pmd_offset(pud, 0);
159 VM_BUG_ON(stage2_pud_huge(*pud));
160 stage2_pud_clear(pud);
4f853a71 161 kvm_tlb_flush_vmid_ipa(kvm, addr);
7a1c831e 162 stage2_pmd_free(pmd_table);
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163 put_page(virt_to_page(pud));
164}
342cd0ab 165
7a1c831e 166static void clear_stage2_pmd_entry(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr)
4f728276 167{
4f853a71 168 pte_t *pte_table = pte_offset_kernel(pmd, 0);
bbb3b6b3 169 VM_BUG_ON(pmd_thp_or_huge(*pmd));
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170 pmd_clear(pmd);
171 kvm_tlb_flush_vmid_ipa(kvm, addr);
172 pte_free_kernel(NULL, pte_table);
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173 put_page(virt_to_page(pmd));
174}
175
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176/*
177 * Unmapping vs dcache management:
178 *
179 * If a guest maps certain memory pages as uncached, all writes will
180 * bypass the data cache and go directly to RAM. However, the CPUs
181 * can still speculate reads (not writes) and fill cache lines with
182 * data.
183 *
184 * Those cache lines will be *clean* cache lines though, so a
185 * clean+invalidate operation is equivalent to an invalidate
186 * operation, because no cache lines are marked dirty.
187 *
188 * Those clean cache lines could be filled prior to an uncached write
189 * by the guest, and the cache coherent IO subsystem would therefore
190 * end up writing old data to disk.
191 *
192 * This is why right after unmapping a page/section and invalidating
193 * the corresponding TLBs, we call kvm_flush_dcache_p*() to make sure
194 * the IO subsystem will never hit in the cache.
195 */
7a1c831e 196static void unmap_stage2_ptes(struct kvm *kvm, pmd_t *pmd,
4f853a71 197 phys_addr_t addr, phys_addr_t end)
4f728276 198{
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199 phys_addr_t start_addr = addr;
200 pte_t *pte, *start_pte;
201
202 start_pte = pte = pte_offset_kernel(pmd, addr);
203 do {
204 if (!pte_none(*pte)) {
363ef89f
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205 pte_t old_pte = *pte;
206
4f853a71 207 kvm_set_pte(pte, __pte(0));
4f853a71 208 kvm_tlb_flush_vmid_ipa(kvm, addr);
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209
210 /* No need to invalidate the cache for device mappings */
0de58f85 211 if (!kvm_is_device_pfn(pte_pfn(old_pte)))
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212 kvm_flush_dcache_pte(old_pte);
213
214 put_page(virt_to_page(pte));
4f853a71
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215 }
216 } while (pte++, addr += PAGE_SIZE, addr != end);
217
7a1c831e
SP
218 if (stage2_pte_table_empty(start_pte))
219 clear_stage2_pmd_entry(kvm, pmd, start_addr);
342cd0ab
CD
220}
221
7a1c831e 222static void unmap_stage2_pmds(struct kvm *kvm, pud_t *pud,
4f853a71 223 phys_addr_t addr, phys_addr_t end)
000d3996 224{
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225 phys_addr_t next, start_addr = addr;
226 pmd_t *pmd, *start_pmd;
000d3996 227
7a1c831e 228 start_pmd = pmd = stage2_pmd_offset(pud, addr);
4f853a71 229 do {
7a1c831e 230 next = stage2_pmd_addr_end(addr, end);
4f853a71 231 if (!pmd_none(*pmd)) {
bbb3b6b3 232 if (pmd_thp_or_huge(*pmd)) {
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233 pmd_t old_pmd = *pmd;
234
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235 pmd_clear(pmd);
236 kvm_tlb_flush_vmid_ipa(kvm, addr);
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237
238 kvm_flush_dcache_pmd(old_pmd);
239
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CD
240 put_page(virt_to_page(pmd));
241 } else {
7a1c831e 242 unmap_stage2_ptes(kvm, pmd, addr, next);
4f853a71 243 }
ad361f09 244 }
4f853a71 245 } while (pmd++, addr = next, addr != end);
ad361f09 246
7a1c831e
SP
247 if (stage2_pmd_table_empty(start_pmd))
248 clear_stage2_pud_entry(kvm, pud, start_addr);
4f853a71 249}
000d3996 250
7a1c831e 251static void unmap_stage2_puds(struct kvm *kvm, pgd_t *pgd,
4f853a71
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252 phys_addr_t addr, phys_addr_t end)
253{
254 phys_addr_t next, start_addr = addr;
255 pud_t *pud, *start_pud;
4f728276 256
7a1c831e 257 start_pud = pud = stage2_pud_offset(pgd, addr);
4f853a71 258 do {
7a1c831e
SP
259 next = stage2_pud_addr_end(addr, end);
260 if (!stage2_pud_none(*pud)) {
261 if (stage2_pud_huge(*pud)) {
363ef89f
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262 pud_t old_pud = *pud;
263
7a1c831e 264 stage2_pud_clear(pud);
4f853a71 265 kvm_tlb_flush_vmid_ipa(kvm, addr);
363ef89f 266 kvm_flush_dcache_pud(old_pud);
4f853a71
CD
267 put_page(virt_to_page(pud));
268 } else {
7a1c831e 269 unmap_stage2_pmds(kvm, pud, addr, next);
4f728276
MZ
270 }
271 }
4f853a71 272 } while (pud++, addr = next, addr != end);
4f728276 273
7a1c831e
SP
274 if (stage2_pud_table_empty(start_pud))
275 clear_stage2_pgd_entry(kvm, pgd, start_addr);
4f853a71
CD
276}
277
7a1c831e
SP
278/**
279 * unmap_stage2_range -- Clear stage2 page table entries to unmap a range
280 * @kvm: The VM pointer
281 * @start: The intermediate physical base address of the range to unmap
282 * @size: The size of the area to unmap
283 *
284 * Clear a range of stage-2 mappings, lowering the various ref-counts. Must
285 * be called while holding mmu_lock (unless for freeing the stage2 pgd before
286 * destroying the VM), otherwise another faulting VCPU may come in and mess
287 * with things behind our backs.
288 */
289static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size)
4f853a71
CD
290{
291 pgd_t *pgd;
292 phys_addr_t addr = start, end = start + size;
293 phys_addr_t next;
294
8b3405e3 295 assert_spin_locked(&kvm->mmu_lock);
7a1c831e 296 pgd = kvm->arch.pgd + stage2_pgd_index(addr);
4f853a71 297 do {
7a1c831e
SP
298 next = stage2_pgd_addr_end(addr, end);
299 if (!stage2_pgd_none(*pgd))
300 unmap_stage2_puds(kvm, pgd, addr, next);
8b3405e3
SP
301 /*
302 * If the range is too large, release the kvm->mmu_lock
303 * to prevent starvation and lockup detector warnings.
304 */
305 if (next != end)
306 cond_resched_lock(&kvm->mmu_lock);
4f853a71 307 } while (pgd++, addr = next, addr != end);
000d3996
MZ
308}
309
9d218a1f
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310static void stage2_flush_ptes(struct kvm *kvm, pmd_t *pmd,
311 phys_addr_t addr, phys_addr_t end)
312{
313 pte_t *pte;
314
315 pte = pte_offset_kernel(pmd, addr);
316 do {
0de58f85 317 if (!pte_none(*pte) && !kvm_is_device_pfn(pte_pfn(*pte)))
363ef89f 318 kvm_flush_dcache_pte(*pte);
9d218a1f
MZ
319 } while (pte++, addr += PAGE_SIZE, addr != end);
320}
321
322static void stage2_flush_pmds(struct kvm *kvm, pud_t *pud,
323 phys_addr_t addr, phys_addr_t end)
324{
325 pmd_t *pmd;
326 phys_addr_t next;
327
70fd1906 328 pmd = stage2_pmd_offset(pud, addr);
9d218a1f 329 do {
70fd1906 330 next = stage2_pmd_addr_end(addr, end);
9d218a1f 331 if (!pmd_none(*pmd)) {
bbb3b6b3 332 if (pmd_thp_or_huge(*pmd))
363ef89f
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333 kvm_flush_dcache_pmd(*pmd);
334 else
9d218a1f 335 stage2_flush_ptes(kvm, pmd, addr, next);
9d218a1f
MZ
336 }
337 } while (pmd++, addr = next, addr != end);
338}
339
340static void stage2_flush_puds(struct kvm *kvm, pgd_t *pgd,
341 phys_addr_t addr, phys_addr_t end)
342{
343 pud_t *pud;
344 phys_addr_t next;
345
70fd1906 346 pud = stage2_pud_offset(pgd, addr);
9d218a1f 347 do {
70fd1906
SP
348 next = stage2_pud_addr_end(addr, end);
349 if (!stage2_pud_none(*pud)) {
350 if (stage2_pud_huge(*pud))
363ef89f
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351 kvm_flush_dcache_pud(*pud);
352 else
9d218a1f 353 stage2_flush_pmds(kvm, pud, addr, next);
9d218a1f
MZ
354 }
355 } while (pud++, addr = next, addr != end);
356}
357
358static void stage2_flush_memslot(struct kvm *kvm,
359 struct kvm_memory_slot *memslot)
360{
361 phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
362 phys_addr_t end = addr + PAGE_SIZE * memslot->npages;
363 phys_addr_t next;
364 pgd_t *pgd;
365
70fd1906 366 pgd = kvm->arch.pgd + stage2_pgd_index(addr);
9d218a1f 367 do {
70fd1906 368 next = stage2_pgd_addr_end(addr, end);
9d218a1f
MZ
369 stage2_flush_puds(kvm, pgd, addr, next);
370 } while (pgd++, addr = next, addr != end);
371}
372
373/**
374 * stage2_flush_vm - Invalidate cache for pages mapped in stage 2
375 * @kvm: The struct kvm pointer
376 *
377 * Go through the stage 2 page tables and invalidate any cache lines
378 * backing memory already mapped to the VM.
379 */
3c1e7165 380static void stage2_flush_vm(struct kvm *kvm)
9d218a1f
MZ
381{
382 struct kvm_memslots *slots;
383 struct kvm_memory_slot *memslot;
384 int idx;
385
386 idx = srcu_read_lock(&kvm->srcu);
387 spin_lock(&kvm->mmu_lock);
388
389 slots = kvm_memslots(kvm);
390 kvm_for_each_memslot(memslot, slots)
391 stage2_flush_memslot(kvm, memslot);
392
393 spin_unlock(&kvm->mmu_lock);
394 srcu_read_unlock(&kvm->srcu, idx);
395}
396
64f32497
SP
397static void clear_hyp_pgd_entry(pgd_t *pgd)
398{
399 pud_t *pud_table __maybe_unused = pud_offset(pgd, 0UL);
400 pgd_clear(pgd);
401 pud_free(NULL, pud_table);
402 put_page(virt_to_page(pgd));
403}
404
405static void clear_hyp_pud_entry(pud_t *pud)
406{
407 pmd_t *pmd_table __maybe_unused = pmd_offset(pud, 0);
408 VM_BUG_ON(pud_huge(*pud));
409 pud_clear(pud);
410 pmd_free(NULL, pmd_table);
411 put_page(virt_to_page(pud));
412}
413
414static void clear_hyp_pmd_entry(pmd_t *pmd)
415{
416 pte_t *pte_table = pte_offset_kernel(pmd, 0);
417 VM_BUG_ON(pmd_thp_or_huge(*pmd));
418 pmd_clear(pmd);
419 pte_free_kernel(NULL, pte_table);
420 put_page(virt_to_page(pmd));
421}
422
423static void unmap_hyp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end)
424{
425 pte_t *pte, *start_pte;
426
427 start_pte = pte = pte_offset_kernel(pmd, addr);
428 do {
429 if (!pte_none(*pte)) {
430 kvm_set_pte(pte, __pte(0));
431 put_page(virt_to_page(pte));
432 }
433 } while (pte++, addr += PAGE_SIZE, addr != end);
434
435 if (hyp_pte_table_empty(start_pte))
436 clear_hyp_pmd_entry(pmd);
437}
438
439static void unmap_hyp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end)
440{
441 phys_addr_t next;
442 pmd_t *pmd, *start_pmd;
443
444 start_pmd = pmd = pmd_offset(pud, addr);
445 do {
446 next = pmd_addr_end(addr, end);
447 /* Hyp doesn't use huge pmds */
448 if (!pmd_none(*pmd))
449 unmap_hyp_ptes(pmd, addr, next);
450 } while (pmd++, addr = next, addr != end);
451
452 if (hyp_pmd_table_empty(start_pmd))
453 clear_hyp_pud_entry(pud);
454}
455
456static void unmap_hyp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end)
457{
458 phys_addr_t next;
459 pud_t *pud, *start_pud;
460
461 start_pud = pud = pud_offset(pgd, addr);
462 do {
463 next = pud_addr_end(addr, end);
464 /* Hyp doesn't use huge puds */
465 if (!pud_none(*pud))
466 unmap_hyp_pmds(pud, addr, next);
467 } while (pud++, addr = next, addr != end);
468
469 if (hyp_pud_table_empty(start_pud))
470 clear_hyp_pgd_entry(pgd);
471}
472
473static void unmap_hyp_range(pgd_t *pgdp, phys_addr_t start, u64 size)
474{
475 pgd_t *pgd;
476 phys_addr_t addr = start, end = start + size;
477 phys_addr_t next;
478
479 /*
480 * We don't unmap anything from HYP, except at the hyp tear down.
481 * Hence, we don't have to invalidate the TLBs here.
482 */
483 pgd = pgdp + pgd_index(addr);
484 do {
485 next = pgd_addr_end(addr, end);
486 if (!pgd_none(*pgd))
487 unmap_hyp_puds(pgd, addr, next);
488 } while (pgd++, addr = next, addr != end);
489}
490
342cd0ab 491/**
4f728276 492 * free_hyp_pgds - free Hyp-mode page tables
342cd0ab 493 *
5a677ce0
MZ
494 * Assumes hyp_pgd is a page table used strictly in Hyp-mode and
495 * therefore contains either mappings in the kernel memory area (above
496 * PAGE_OFFSET), or device mappings in the vmalloc range (from
497 * VMALLOC_START to VMALLOC_END).
498 *
499 * boot_hyp_pgd should only map two pages for the init code.
342cd0ab 500 */
4f728276 501void free_hyp_pgds(void)
342cd0ab 502{
342cd0ab
CD
503 unsigned long addr;
504
d157f4a5 505 mutex_lock(&kvm_hyp_pgd_mutex);
5a677ce0 506
26781f9c
MZ
507 if (boot_hyp_pgd) {
508 unmap_hyp_range(boot_hyp_pgd, hyp_idmap_start, PAGE_SIZE);
509 free_pages((unsigned long)boot_hyp_pgd, hyp_pgd_order);
510 boot_hyp_pgd = NULL;
511 }
512
4f728276 513 if (hyp_pgd) {
26781f9c 514 unmap_hyp_range(hyp_pgd, hyp_idmap_start, PAGE_SIZE);
4f728276 515 for (addr = PAGE_OFFSET; virt_addr_valid(addr); addr += PGDIR_SIZE)
6c41a413 516 unmap_hyp_range(hyp_pgd, kern_hyp_va(addr), PGDIR_SIZE);
4f728276 517 for (addr = VMALLOC_START; is_vmalloc_addr((void*)addr); addr += PGDIR_SIZE)
6c41a413 518 unmap_hyp_range(hyp_pgd, kern_hyp_va(addr), PGDIR_SIZE);
d4cb9df5 519
38f791a4 520 free_pages((unsigned long)hyp_pgd, hyp_pgd_order);
d157f4a5 521 hyp_pgd = NULL;
4f728276 522 }
e4c5a685
AB
523 if (merged_hyp_pgd) {
524 clear_page(merged_hyp_pgd);
525 free_page((unsigned long)merged_hyp_pgd);
526 merged_hyp_pgd = NULL;
527 }
4f728276 528
342cd0ab
CD
529 mutex_unlock(&kvm_hyp_pgd_mutex);
530}
531
532static void create_hyp_pte_mappings(pmd_t *pmd, unsigned long start,
6060df84
MZ
533 unsigned long end, unsigned long pfn,
534 pgprot_t prot)
342cd0ab
CD
535{
536 pte_t *pte;
537 unsigned long addr;
342cd0ab 538
3562c76d
MZ
539 addr = start;
540 do {
6060df84
MZ
541 pte = pte_offset_kernel(pmd, addr);
542 kvm_set_pte(pte, pfn_pte(pfn, prot));
4f728276 543 get_page(virt_to_page(pte));
5a677ce0 544 kvm_flush_dcache_to_poc(pte, sizeof(*pte));
6060df84 545 pfn++;
3562c76d 546 } while (addr += PAGE_SIZE, addr != end);
342cd0ab
CD
547}
548
549static int create_hyp_pmd_mappings(pud_t *pud, unsigned long start,
6060df84
MZ
550 unsigned long end, unsigned long pfn,
551 pgprot_t prot)
342cd0ab
CD
552{
553 pmd_t *pmd;
554 pte_t *pte;
555 unsigned long addr, next;
556
3562c76d
MZ
557 addr = start;
558 do {
6060df84 559 pmd = pmd_offset(pud, addr);
342cd0ab
CD
560
561 BUG_ON(pmd_sect(*pmd));
562
563 if (pmd_none(*pmd)) {
6060df84 564 pte = pte_alloc_one_kernel(NULL, addr);
342cd0ab
CD
565 if (!pte) {
566 kvm_err("Cannot allocate Hyp pte\n");
567 return -ENOMEM;
568 }
569 pmd_populate_kernel(NULL, pmd, pte);
4f728276 570 get_page(virt_to_page(pmd));
5a677ce0 571 kvm_flush_dcache_to_poc(pmd, sizeof(*pmd));
342cd0ab
CD
572 }
573
574 next = pmd_addr_end(addr, end);
575
6060df84
MZ
576 create_hyp_pte_mappings(pmd, addr, next, pfn, prot);
577 pfn += (next - addr) >> PAGE_SHIFT;
3562c76d 578 } while (addr = next, addr != end);
342cd0ab
CD
579
580 return 0;
581}
582
38f791a4
CD
583static int create_hyp_pud_mappings(pgd_t *pgd, unsigned long start,
584 unsigned long end, unsigned long pfn,
585 pgprot_t prot)
586{
587 pud_t *pud;
588 pmd_t *pmd;
589 unsigned long addr, next;
590 int ret;
591
592 addr = start;
593 do {
594 pud = pud_offset(pgd, addr);
595
596 if (pud_none_or_clear_bad(pud)) {
597 pmd = pmd_alloc_one(NULL, addr);
598 if (!pmd) {
599 kvm_err("Cannot allocate Hyp pmd\n");
600 return -ENOMEM;
601 }
602 pud_populate(NULL, pud, pmd);
603 get_page(virt_to_page(pud));
604 kvm_flush_dcache_to_poc(pud, sizeof(*pud));
605 }
606
607 next = pud_addr_end(addr, end);
608 ret = create_hyp_pmd_mappings(pud, addr, next, pfn, prot);
609 if (ret)
610 return ret;
611 pfn += (next - addr) >> PAGE_SHIFT;
612 } while (addr = next, addr != end);
613
614 return 0;
615}
616
6060df84
MZ
617static int __create_hyp_mappings(pgd_t *pgdp,
618 unsigned long start, unsigned long end,
619 unsigned long pfn, pgprot_t prot)
342cd0ab 620{
342cd0ab
CD
621 pgd_t *pgd;
622 pud_t *pud;
342cd0ab
CD
623 unsigned long addr, next;
624 int err = 0;
625
342cd0ab 626 mutex_lock(&kvm_hyp_pgd_mutex);
3562c76d
MZ
627 addr = start & PAGE_MASK;
628 end = PAGE_ALIGN(end);
629 do {
6060df84 630 pgd = pgdp + pgd_index(addr);
342cd0ab 631
38f791a4
CD
632 if (pgd_none(*pgd)) {
633 pud = pud_alloc_one(NULL, addr);
634 if (!pud) {
635 kvm_err("Cannot allocate Hyp pud\n");
342cd0ab
CD
636 err = -ENOMEM;
637 goto out;
638 }
38f791a4
CD
639 pgd_populate(NULL, pgd, pud);
640 get_page(virt_to_page(pgd));
641 kvm_flush_dcache_to_poc(pgd, sizeof(*pgd));
342cd0ab
CD
642 }
643
644 next = pgd_addr_end(addr, end);
38f791a4 645 err = create_hyp_pud_mappings(pgd, addr, next, pfn, prot);
342cd0ab
CD
646 if (err)
647 goto out;
6060df84 648 pfn += (next - addr) >> PAGE_SHIFT;
3562c76d 649 } while (addr = next, addr != end);
342cd0ab
CD
650out:
651 mutex_unlock(&kvm_hyp_pgd_mutex);
652 return err;
653}
654
40c2729b
CD
655static phys_addr_t kvm_kaddr_to_phys(void *kaddr)
656{
657 if (!is_vmalloc_addr(kaddr)) {
658 BUG_ON(!virt_addr_valid(kaddr));
659 return __pa(kaddr);
660 } else {
661 return page_to_phys(vmalloc_to_page(kaddr)) +
662 offset_in_page(kaddr);
663 }
664}
665
342cd0ab 666/**
06e8c3b0 667 * create_hyp_mappings - duplicate a kernel virtual address range in Hyp mode
342cd0ab
CD
668 * @from: The virtual kernel start address of the range
669 * @to: The virtual kernel end address of the range (exclusive)
c8dddecd 670 * @prot: The protection to be applied to this range
342cd0ab 671 *
06e8c3b0
MZ
672 * The same virtual address as the kernel virtual address is also used
673 * in Hyp-mode mapping (modulo HYP_PAGE_OFFSET) to the same underlying
674 * physical pages.
342cd0ab 675 */
c8dddecd 676int create_hyp_mappings(void *from, void *to, pgprot_t prot)
342cd0ab 677{
40c2729b
CD
678 phys_addr_t phys_addr;
679 unsigned long virt_addr;
6c41a413
MZ
680 unsigned long start = kern_hyp_va((unsigned long)from);
681 unsigned long end = kern_hyp_va((unsigned long)to);
6060df84 682
1e947bad
MZ
683 if (is_kernel_in_hyp_mode())
684 return 0;
685
40c2729b
CD
686 start = start & PAGE_MASK;
687 end = PAGE_ALIGN(end);
6060df84 688
40c2729b
CD
689 for (virt_addr = start; virt_addr < end; virt_addr += PAGE_SIZE) {
690 int err;
6060df84 691
40c2729b
CD
692 phys_addr = kvm_kaddr_to_phys(from + virt_addr - start);
693 err = __create_hyp_mappings(hyp_pgd, virt_addr,
694 virt_addr + PAGE_SIZE,
695 __phys_to_pfn(phys_addr),
c8dddecd 696 prot);
40c2729b
CD
697 if (err)
698 return err;
699 }
700
701 return 0;
342cd0ab
CD
702}
703
704/**
06e8c3b0
MZ
705 * create_hyp_io_mappings - duplicate a kernel IO mapping into Hyp mode
706 * @from: The kernel start VA of the range
707 * @to: The kernel end VA of the range (exclusive)
6060df84 708 * @phys_addr: The physical start address which gets mapped
06e8c3b0
MZ
709 *
710 * The resulting HYP VA is the same as the kernel VA, modulo
711 * HYP_PAGE_OFFSET.
342cd0ab 712 */
6060df84 713int create_hyp_io_mappings(void *from, void *to, phys_addr_t phys_addr)
342cd0ab 714{
6c41a413
MZ
715 unsigned long start = kern_hyp_va((unsigned long)from);
716 unsigned long end = kern_hyp_va((unsigned long)to);
6060df84 717
1e947bad
MZ
718 if (is_kernel_in_hyp_mode())
719 return 0;
720
6060df84
MZ
721 /* Check for a valid kernel IO mapping */
722 if (!is_vmalloc_addr(from) || !is_vmalloc_addr(to - 1))
723 return -EINVAL;
724
725 return __create_hyp_mappings(hyp_pgd, start, end,
726 __phys_to_pfn(phys_addr), PAGE_HYP_DEVICE);
342cd0ab
CD
727}
728
d5d8184d
CD
729/**
730 * kvm_alloc_stage2_pgd - allocate level-1 table for stage-2 translation.
731 * @kvm: The KVM struct pointer for the VM.
732 *
9d4dc688
VM
733 * Allocates only the stage-2 HW PGD level table(s) (can support either full
734 * 40-bit input addresses or limited to 32-bit input addresses). Clears the
735 * allocated pages.
d5d8184d
CD
736 *
737 * Note we don't need locking here as this is only called when the VM is
738 * created, which can only be done once.
739 */
740int kvm_alloc_stage2_pgd(struct kvm *kvm)
741{
742 pgd_t *pgd;
743
744 if (kvm->arch.pgd != NULL) {
745 kvm_err("kvm_arch already initialized?\n");
746 return -EINVAL;
747 }
748
9163ee23
SP
749 /* Allocate the HW PGD, making sure that each page gets its own refcount */
750 pgd = alloc_pages_exact(S2_PGD_SIZE, GFP_KERNEL | __GFP_ZERO);
751 if (!pgd)
a987370f
MZ
752 return -ENOMEM;
753
d5d8184d 754 kvm->arch.pgd = pgd;
d5d8184d
CD
755 return 0;
756}
757
957db105
CD
758static void stage2_unmap_memslot(struct kvm *kvm,
759 struct kvm_memory_slot *memslot)
760{
761 hva_t hva = memslot->userspace_addr;
762 phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
763 phys_addr_t size = PAGE_SIZE * memslot->npages;
764 hva_t reg_end = hva + size;
765
766 /*
767 * A memory region could potentially cover multiple VMAs, and any holes
768 * between them, so iterate over all of them to find out if we should
769 * unmap any of them.
770 *
771 * +--------------------------------------------+
772 * +---------------+----------------+ +----------------+
773 * | : VMA 1 | VMA 2 | | VMA 3 : |
774 * +---------------+----------------+ +----------------+
775 * | memory region |
776 * +--------------------------------------------+
777 */
778 do {
779 struct vm_area_struct *vma = find_vma(current->mm, hva);
780 hva_t vm_start, vm_end;
781
782 if (!vma || vma->vm_start >= reg_end)
783 break;
784
785 /*
786 * Take the intersection of this VMA with the memory region
787 */
788 vm_start = max(hva, vma->vm_start);
789 vm_end = min(reg_end, vma->vm_end);
790
791 if (!(vma->vm_flags & VM_PFNMAP)) {
792 gpa_t gpa = addr + (vm_start - memslot->userspace_addr);
793 unmap_stage2_range(kvm, gpa, vm_end - vm_start);
794 }
795 hva = vm_end;
796 } while (hva < reg_end);
797}
798
799/**
800 * stage2_unmap_vm - Unmap Stage-2 RAM mappings
801 * @kvm: The struct kvm pointer
802 *
803 * Go through the memregions and unmap any reguler RAM
804 * backing memory already mapped to the VM.
805 */
806void stage2_unmap_vm(struct kvm *kvm)
807{
808 struct kvm_memslots *slots;
809 struct kvm_memory_slot *memslot;
810 int idx;
811
812 idx = srcu_read_lock(&kvm->srcu);
90f6e150 813 down_read(&current->mm->mmap_sem);
957db105
CD
814 spin_lock(&kvm->mmu_lock);
815
816 slots = kvm_memslots(kvm);
817 kvm_for_each_memslot(memslot, slots)
818 stage2_unmap_memslot(kvm, memslot);
819
820 spin_unlock(&kvm->mmu_lock);
90f6e150 821 up_read(&current->mm->mmap_sem);
957db105
CD
822 srcu_read_unlock(&kvm->srcu, idx);
823}
824
d5d8184d
CD
825/**
826 * kvm_free_stage2_pgd - free all stage-2 tables
827 * @kvm: The KVM struct pointer for the VM.
828 *
829 * Walks the level-1 page table pointed to by kvm->arch.pgd and frees all
830 * underlying level-2 and level-3 tables before freeing the actual level-1 table
831 * and setting the struct pointer to NULL.
832 *
833 * Note we don't need locking here as this is only called when the VM is
834 * destroyed, which can only be done once.
835 */
836void kvm_free_stage2_pgd(struct kvm *kvm)
837{
838 if (kvm->arch.pgd == NULL)
839 return;
840
8b3405e3 841 spin_lock(&kvm->mmu_lock);
d5d8184d 842 unmap_stage2_range(kvm, 0, KVM_PHYS_SIZE);
8b3405e3
SP
843 spin_unlock(&kvm->mmu_lock);
844
9163ee23
SP
845 /* Free the HW pgd, one page at a time */
846 free_pages_exact(kvm->arch.pgd, S2_PGD_SIZE);
d5d8184d
CD
847 kvm->arch.pgd = NULL;
848}
849
38f791a4 850static pud_t *stage2_get_pud(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
ad361f09 851 phys_addr_t addr)
d5d8184d
CD
852{
853 pgd_t *pgd;
854 pud_t *pud;
d5d8184d 855
70fd1906
SP
856 pgd = kvm->arch.pgd + stage2_pgd_index(addr);
857 if (WARN_ON(stage2_pgd_none(*pgd))) {
38f791a4
CD
858 if (!cache)
859 return NULL;
860 pud = mmu_memory_cache_alloc(cache);
70fd1906 861 stage2_pgd_populate(pgd, pud);
38f791a4
CD
862 get_page(virt_to_page(pgd));
863 }
864
70fd1906 865 return stage2_pud_offset(pgd, addr);
38f791a4
CD
866}
867
868static pmd_t *stage2_get_pmd(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
869 phys_addr_t addr)
870{
871 pud_t *pud;
872 pmd_t *pmd;
873
874 pud = stage2_get_pud(kvm, cache, addr);
70fd1906 875 if (stage2_pud_none(*pud)) {
d5d8184d 876 if (!cache)
ad361f09 877 return NULL;
d5d8184d 878 pmd = mmu_memory_cache_alloc(cache);
70fd1906 879 stage2_pud_populate(pud, pmd);
d5d8184d 880 get_page(virt_to_page(pud));
c62ee2b2
MZ
881 }
882
70fd1906 883 return stage2_pmd_offset(pud, addr);
ad361f09
CD
884}
885
886static int stage2_set_pmd_huge(struct kvm *kvm, struct kvm_mmu_memory_cache
887 *cache, phys_addr_t addr, const pmd_t *new_pmd)
888{
889 pmd_t *pmd, old_pmd;
890
891 pmd = stage2_get_pmd(kvm, cache, addr);
892 VM_BUG_ON(!pmd);
d5d8184d 893
ad361f09
CD
894 /*
895 * Mapping in huge pages should only happen through a fault. If a
896 * page is merged into a transparent huge page, the individual
897 * subpages of that huge page should be unmapped through MMU
898 * notifiers before we get here.
899 *
900 * Merging of CompoundPages is not supported; they should become
901 * splitting first, unmapped, merged, and mapped back in on-demand.
902 */
903 VM_BUG_ON(pmd_present(*pmd) && pmd_pfn(*pmd) != pmd_pfn(*new_pmd));
904
905 old_pmd = *pmd;
d4b9e079
MZ
906 if (pmd_present(old_pmd)) {
907 pmd_clear(pmd);
ad361f09 908 kvm_tlb_flush_vmid_ipa(kvm, addr);
d4b9e079 909 } else {
ad361f09 910 get_page(virt_to_page(pmd));
d4b9e079
MZ
911 }
912
913 kvm_set_pmd(pmd, *new_pmd);
ad361f09
CD
914 return 0;
915}
916
917static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
15a49a44
MS
918 phys_addr_t addr, const pte_t *new_pte,
919 unsigned long flags)
ad361f09
CD
920{
921 pmd_t *pmd;
922 pte_t *pte, old_pte;
15a49a44
MS
923 bool iomap = flags & KVM_S2PTE_FLAG_IS_IOMAP;
924 bool logging_active = flags & KVM_S2_FLAG_LOGGING_ACTIVE;
925
926 VM_BUG_ON(logging_active && !cache);
ad361f09 927
38f791a4 928 /* Create stage-2 page table mapping - Levels 0 and 1 */
ad361f09
CD
929 pmd = stage2_get_pmd(kvm, cache, addr);
930 if (!pmd) {
931 /*
932 * Ignore calls from kvm_set_spte_hva for unallocated
933 * address ranges.
934 */
935 return 0;
936 }
937
15a49a44
MS
938 /*
939 * While dirty page logging - dissolve huge PMD, then continue on to
940 * allocate page.
941 */
942 if (logging_active)
943 stage2_dissolve_pmd(kvm, addr, pmd);
944
ad361f09 945 /* Create stage-2 page mappings - Level 2 */
d5d8184d
CD
946 if (pmd_none(*pmd)) {
947 if (!cache)
948 return 0; /* ignore calls from kvm_set_spte_hva */
949 pte = mmu_memory_cache_alloc(cache);
d5d8184d 950 pmd_populate_kernel(NULL, pmd, pte);
d5d8184d 951 get_page(virt_to_page(pmd));
c62ee2b2
MZ
952 }
953
954 pte = pte_offset_kernel(pmd, addr);
d5d8184d
CD
955
956 if (iomap && pte_present(*pte))
957 return -EFAULT;
958
959 /* Create 2nd stage page table mapping - Level 3 */
960 old_pte = *pte;
d4b9e079
MZ
961 if (pte_present(old_pte)) {
962 kvm_set_pte(pte, __pte(0));
48762767 963 kvm_tlb_flush_vmid_ipa(kvm, addr);
d4b9e079 964 } else {
d5d8184d 965 get_page(virt_to_page(pte));
d4b9e079 966 }
d5d8184d 967
d4b9e079 968 kvm_set_pte(pte, *new_pte);
d5d8184d
CD
969 return 0;
970}
d5d8184d 971
06485053
CM
972#ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
973static int stage2_ptep_test_and_clear_young(pte_t *pte)
974{
975 if (pte_young(*pte)) {
976 *pte = pte_mkold(*pte);
977 return 1;
978 }
d5d8184d
CD
979 return 0;
980}
06485053
CM
981#else
982static int stage2_ptep_test_and_clear_young(pte_t *pte)
983{
984 return __ptep_test_and_clear_young(pte);
985}
986#endif
987
988static int stage2_pmdp_test_and_clear_young(pmd_t *pmd)
989{
990 return stage2_ptep_test_and_clear_young((pte_t *)pmd);
991}
d5d8184d
CD
992
993/**
994 * kvm_phys_addr_ioremap - map a device range to guest IPA
995 *
996 * @kvm: The KVM pointer
997 * @guest_ipa: The IPA at which to insert the mapping
998 * @pa: The physical address of the device
999 * @size: The size of the mapping
1000 */
1001int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
c40f2f8f 1002 phys_addr_t pa, unsigned long size, bool writable)
d5d8184d
CD
1003{
1004 phys_addr_t addr, end;
1005 int ret = 0;
1006 unsigned long pfn;
1007 struct kvm_mmu_memory_cache cache = { 0, };
1008
1009 end = (guest_ipa + size + PAGE_SIZE - 1) & PAGE_MASK;
1010 pfn = __phys_to_pfn(pa);
1011
1012 for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) {
c62ee2b2 1013 pte_t pte = pfn_pte(pfn, PAGE_S2_DEVICE);
d5d8184d 1014
c40f2f8f 1015 if (writable)
06485053 1016 pte = kvm_s2pte_mkwrite(pte);
c40f2f8f 1017
38f791a4
CD
1018 ret = mmu_topup_memory_cache(&cache, KVM_MMU_CACHE_MIN_PAGES,
1019 KVM_NR_MEM_OBJS);
d5d8184d
CD
1020 if (ret)
1021 goto out;
1022 spin_lock(&kvm->mmu_lock);
15a49a44
MS
1023 ret = stage2_set_pte(kvm, &cache, addr, &pte,
1024 KVM_S2PTE_FLAG_IS_IOMAP);
d5d8184d
CD
1025 spin_unlock(&kvm->mmu_lock);
1026 if (ret)
1027 goto out;
1028
1029 pfn++;
1030 }
1031
1032out:
1033 mmu_free_memory_cache(&cache);
1034 return ret;
1035}
1036
ba049e93 1037static bool transparent_hugepage_adjust(kvm_pfn_t *pfnp, phys_addr_t *ipap)
9b5fdb97 1038{
ba049e93 1039 kvm_pfn_t pfn = *pfnp;
9b5fdb97
CD
1040 gfn_t gfn = *ipap >> PAGE_SHIFT;
1041
127393fb 1042 if (PageTransCompoundMap(pfn_to_page(pfn))) {
9b5fdb97
CD
1043 unsigned long mask;
1044 /*
1045 * The address we faulted on is backed by a transparent huge
1046 * page. However, because we map the compound huge page and
1047 * not the individual tail page, we need to transfer the
1048 * refcount to the head page. We have to be careful that the
1049 * THP doesn't start to split while we are adjusting the
1050 * refcounts.
1051 *
1052 * We are sure this doesn't happen, because mmu_notifier_retry
1053 * was successful and we are holding the mmu_lock, so if this
1054 * THP is trying to split, it will be blocked in the mmu
1055 * notifier before touching any of the pages, specifically
1056 * before being able to call __split_huge_page_refcount().
1057 *
1058 * We can therefore safely transfer the refcount from PG_tail
1059 * to PG_head and switch the pfn from a tail page to the head
1060 * page accordingly.
1061 */
1062 mask = PTRS_PER_PMD - 1;
1063 VM_BUG_ON((gfn & mask) != (pfn & mask));
1064 if (pfn & mask) {
1065 *ipap &= PMD_MASK;
1066 kvm_release_pfn_clean(pfn);
1067 pfn &= ~mask;
1068 kvm_get_pfn(pfn);
1069 *pfnp = pfn;
1070 }
1071
1072 return true;
1073 }
1074
1075 return false;
1076}
1077
a7d079ce
AB
1078static bool kvm_is_write_fault(struct kvm_vcpu *vcpu)
1079{
1080 if (kvm_vcpu_trap_is_iabt(vcpu))
1081 return false;
1082
1083 return kvm_vcpu_dabt_iswrite(vcpu);
1084}
1085
c6473555
MS
1086/**
1087 * stage2_wp_ptes - write protect PMD range
1088 * @pmd: pointer to pmd entry
1089 * @addr: range start address
1090 * @end: range end address
1091 */
1092static void stage2_wp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end)
1093{
1094 pte_t *pte;
1095
1096 pte = pte_offset_kernel(pmd, addr);
1097 do {
1098 if (!pte_none(*pte)) {
1099 if (!kvm_s2pte_readonly(pte))
1100 kvm_set_s2pte_readonly(pte);
1101 }
1102 } while (pte++, addr += PAGE_SIZE, addr != end);
1103}
1104
1105/**
1106 * stage2_wp_pmds - write protect PUD range
1107 * @pud: pointer to pud entry
1108 * @addr: range start address
1109 * @end: range end address
1110 */
1111static void stage2_wp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end)
1112{
1113 pmd_t *pmd;
1114 phys_addr_t next;
1115
70fd1906 1116 pmd = stage2_pmd_offset(pud, addr);
c6473555
MS
1117
1118 do {
70fd1906 1119 next = stage2_pmd_addr_end(addr, end);
c6473555 1120 if (!pmd_none(*pmd)) {
bbb3b6b3 1121 if (pmd_thp_or_huge(*pmd)) {
c6473555
MS
1122 if (!kvm_s2pmd_readonly(pmd))
1123 kvm_set_s2pmd_readonly(pmd);
1124 } else {
1125 stage2_wp_ptes(pmd, addr, next);
1126 }
1127 }
1128 } while (pmd++, addr = next, addr != end);
1129}
1130
1131/**
1132 * stage2_wp_puds - write protect PGD range
1133 * @pgd: pointer to pgd entry
1134 * @addr: range start address
1135 * @end: range end address
1136 *
1137 * Process PUD entries, for a huge PUD we cause a panic.
1138 */
1139static void stage2_wp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end)
1140{
1141 pud_t *pud;
1142 phys_addr_t next;
1143
70fd1906 1144 pud = stage2_pud_offset(pgd, addr);
c6473555 1145 do {
70fd1906
SP
1146 next = stage2_pud_addr_end(addr, end);
1147 if (!stage2_pud_none(*pud)) {
c6473555 1148 /* TODO:PUD not supported, revisit later if supported */
70fd1906 1149 BUG_ON(stage2_pud_huge(*pud));
c6473555
MS
1150 stage2_wp_pmds(pud, addr, next);
1151 }
1152 } while (pud++, addr = next, addr != end);
1153}
1154
1155/**
1156 * stage2_wp_range() - write protect stage2 memory region range
1157 * @kvm: The KVM pointer
1158 * @addr: Start address of range
1159 * @end: End address of range
1160 */
1161static void stage2_wp_range(struct kvm *kvm, phys_addr_t addr, phys_addr_t end)
1162{
1163 pgd_t *pgd;
1164 phys_addr_t next;
1165
70fd1906 1166 pgd = kvm->arch.pgd + stage2_pgd_index(addr);
c6473555
MS
1167 do {
1168 /*
1169 * Release kvm_mmu_lock periodically if the memory region is
1170 * large. Otherwise, we may see kernel panics with
227ea818
CD
1171 * CONFIG_DETECT_HUNG_TASK, CONFIG_LOCKUP_DETECTOR,
1172 * CONFIG_LOCKDEP. Additionally, holding the lock too long
c6473555
MS
1173 * will also starve other vCPUs.
1174 */
1175 if (need_resched() || spin_needbreak(&kvm->mmu_lock))
1176 cond_resched_lock(&kvm->mmu_lock);
1177
70fd1906
SP
1178 next = stage2_pgd_addr_end(addr, end);
1179 if (stage2_pgd_present(*pgd))
c6473555
MS
1180 stage2_wp_puds(pgd, addr, next);
1181 } while (pgd++, addr = next, addr != end);
1182}
1183
1184/**
1185 * kvm_mmu_wp_memory_region() - write protect stage 2 entries for memory slot
1186 * @kvm: The KVM pointer
1187 * @slot: The memory slot to write protect
1188 *
1189 * Called to start logging dirty pages after memory region
1190 * KVM_MEM_LOG_DIRTY_PAGES operation is called. After this function returns
1191 * all present PMD and PTEs are write protected in the memory region.
1192 * Afterwards read of dirty page log can be called.
1193 *
1194 * Acquires kvm_mmu_lock. Called with kvm->slots_lock mutex acquired,
1195 * serializing operations for VM memory regions.
1196 */
1197void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot)
1198{
9f6b8029
PB
1199 struct kvm_memslots *slots = kvm_memslots(kvm);
1200 struct kvm_memory_slot *memslot = id_to_memslot(slots, slot);
c6473555
MS
1201 phys_addr_t start = memslot->base_gfn << PAGE_SHIFT;
1202 phys_addr_t end = (memslot->base_gfn + memslot->npages) << PAGE_SHIFT;
1203
1204 spin_lock(&kvm->mmu_lock);
1205 stage2_wp_range(kvm, start, end);
1206 spin_unlock(&kvm->mmu_lock);
1207 kvm_flush_remote_tlbs(kvm);
1208}
53c810c3
MS
1209
1210/**
3b0f1d01 1211 * kvm_mmu_write_protect_pt_masked() - write protect dirty pages
53c810c3
MS
1212 * @kvm: The KVM pointer
1213 * @slot: The memory slot associated with mask
1214 * @gfn_offset: The gfn offset in memory slot
1215 * @mask: The mask of dirty pages at offset 'gfn_offset' in this memory
1216 * slot to be write protected
1217 *
1218 * Walks bits set in mask write protects the associated pte's. Caller must
1219 * acquire kvm_mmu_lock.
1220 */
3b0f1d01 1221static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
53c810c3
MS
1222 struct kvm_memory_slot *slot,
1223 gfn_t gfn_offset, unsigned long mask)
1224{
1225 phys_addr_t base_gfn = slot->base_gfn + gfn_offset;
1226 phys_addr_t start = (base_gfn + __ffs(mask)) << PAGE_SHIFT;
1227 phys_addr_t end = (base_gfn + __fls(mask) + 1) << PAGE_SHIFT;
1228
1229 stage2_wp_range(kvm, start, end);
1230}
c6473555 1231
3b0f1d01
KH
1232/*
1233 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1234 * dirty pages.
1235 *
1236 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1237 * enable dirty logging for them.
1238 */
1239void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
1240 struct kvm_memory_slot *slot,
1241 gfn_t gfn_offset, unsigned long mask)
1242{
1243 kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
1244}
1245
ba049e93 1246static void coherent_cache_guest_page(struct kvm_vcpu *vcpu, kvm_pfn_t pfn,
13b7756c 1247 unsigned long size)
0d3e4d4f 1248{
13b7756c 1249 __coherent_cache_guest_page(vcpu, pfn, size);
0d3e4d4f
MZ
1250}
1251
94f8e641 1252static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
98047888 1253 struct kvm_memory_slot *memslot, unsigned long hva,
94f8e641
CD
1254 unsigned long fault_status)
1255{
94f8e641 1256 int ret;
9b5fdb97 1257 bool write_fault, writable, hugetlb = false, force_pte = false;
94f8e641 1258 unsigned long mmu_seq;
ad361f09 1259 gfn_t gfn = fault_ipa >> PAGE_SHIFT;
ad361f09 1260 struct kvm *kvm = vcpu->kvm;
94f8e641 1261 struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache;
ad361f09 1262 struct vm_area_struct *vma;
ba049e93 1263 kvm_pfn_t pfn;
b8865767 1264 pgprot_t mem_type = PAGE_S2;
15a49a44
MS
1265 bool logging_active = memslot_is_logging(memslot);
1266 unsigned long flags = 0;
94f8e641 1267
a7d079ce 1268 write_fault = kvm_is_write_fault(vcpu);
94f8e641
CD
1269 if (fault_status == FSC_PERM && !write_fault) {
1270 kvm_err("Unexpected L2 read permission error\n");
1271 return -EFAULT;
1272 }
1273
ad361f09
CD
1274 /* Let's check if we will get back a huge page backed by hugetlbfs */
1275 down_read(&current->mm->mmap_sem);
1276 vma = find_vma_intersection(current->mm, hva, hva + 1);
37b54408
AB
1277 if (unlikely(!vma)) {
1278 kvm_err("Failed to find VMA for hva 0x%lx\n", hva);
1279 up_read(&current->mm->mmap_sem);
1280 return -EFAULT;
1281 }
1282
15a49a44 1283 if (is_vm_hugetlb_page(vma) && !logging_active) {
ad361f09
CD
1284 hugetlb = true;
1285 gfn = (fault_ipa & PMD_MASK) >> PAGE_SHIFT;
9b5fdb97
CD
1286 } else {
1287 /*
136d737f
MZ
1288 * Pages belonging to memslots that don't have the same
1289 * alignment for userspace and IPA cannot be mapped using
1290 * block descriptors even if the pages belong to a THP for
1291 * the process, because the stage-2 block descriptor will
1292 * cover more than a single THP and we loose atomicity for
1293 * unmapping, updates, and splits of the THP or other pages
1294 * in the stage-2 block range.
9b5fdb97 1295 */
136d737f
MZ
1296 if ((memslot->userspace_addr & ~PMD_MASK) !=
1297 ((memslot->base_gfn << PAGE_SHIFT) & ~PMD_MASK))
9b5fdb97 1298 force_pte = true;
ad361f09
CD
1299 }
1300 up_read(&current->mm->mmap_sem);
1301
94f8e641 1302 /* We need minimum second+third level pages */
38f791a4
CD
1303 ret = mmu_topup_memory_cache(memcache, KVM_MMU_CACHE_MIN_PAGES,
1304 KVM_NR_MEM_OBJS);
94f8e641
CD
1305 if (ret)
1306 return ret;
1307
1308 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1309 /*
1310 * Ensure the read of mmu_notifier_seq happens before we call
1311 * gfn_to_pfn_prot (which calls get_user_pages), so that we don't risk
1312 * the page we just got a reference to gets unmapped before we have a
1313 * chance to grab the mmu_lock, which ensure that if the page gets
1314 * unmapped afterwards, the call to kvm_unmap_hva will take it away
1315 * from us again properly. This smp_rmb() interacts with the smp_wmb()
1316 * in kvm_mmu_notifier_invalidate_<page|range_end>.
1317 */
1318 smp_rmb();
1319
ad361f09 1320 pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &writable);
9ac71595 1321 if (is_error_noslot_pfn(pfn))
94f8e641
CD
1322 return -EFAULT;
1323
15a49a44 1324 if (kvm_is_device_pfn(pfn)) {
b8865767 1325 mem_type = PAGE_S2_DEVICE;
15a49a44
MS
1326 flags |= KVM_S2PTE_FLAG_IS_IOMAP;
1327 } else if (logging_active) {
1328 /*
1329 * Faults on pages in a memslot with logging enabled
1330 * should not be mapped with huge pages (it introduces churn
1331 * and performance degradation), so force a pte mapping.
1332 */
1333 force_pte = true;
1334 flags |= KVM_S2_FLAG_LOGGING_ACTIVE;
1335
1336 /*
1337 * Only actually map the page as writable if this was a write
1338 * fault.
1339 */
1340 if (!write_fault)
1341 writable = false;
1342 }
b8865767 1343
ad361f09
CD
1344 spin_lock(&kvm->mmu_lock);
1345 if (mmu_notifier_retry(kvm, mmu_seq))
94f8e641 1346 goto out_unlock;
15a49a44 1347
9b5fdb97
CD
1348 if (!hugetlb && !force_pte)
1349 hugetlb = transparent_hugepage_adjust(&pfn, &fault_ipa);
ad361f09
CD
1350
1351 if (hugetlb) {
b8865767 1352 pmd_t new_pmd = pfn_pmd(pfn, mem_type);
ad361f09
CD
1353 new_pmd = pmd_mkhuge(new_pmd);
1354 if (writable) {
06485053 1355 new_pmd = kvm_s2pmd_mkwrite(new_pmd);
ad361f09
CD
1356 kvm_set_pfn_dirty(pfn);
1357 }
13b7756c 1358 coherent_cache_guest_page(vcpu, pfn, PMD_SIZE);
ad361f09
CD
1359 ret = stage2_set_pmd_huge(kvm, memcache, fault_ipa, &new_pmd);
1360 } else {
b8865767 1361 pte_t new_pte = pfn_pte(pfn, mem_type);
15a49a44 1362
ad361f09 1363 if (writable) {
06485053 1364 new_pte = kvm_s2pte_mkwrite(new_pte);
ad361f09 1365 kvm_set_pfn_dirty(pfn);
15a49a44 1366 mark_page_dirty(kvm, gfn);
ad361f09 1367 }
13b7756c 1368 coherent_cache_guest_page(vcpu, pfn, PAGE_SIZE);
15a49a44 1369 ret = stage2_set_pte(kvm, memcache, fault_ipa, &new_pte, flags);
94f8e641 1370 }
ad361f09 1371
94f8e641 1372out_unlock:
ad361f09 1373 spin_unlock(&kvm->mmu_lock);
35307b9a 1374 kvm_set_pfn_accessed(pfn);
94f8e641 1375 kvm_release_pfn_clean(pfn);
ad361f09 1376 return ret;
94f8e641
CD
1377}
1378
aeda9130
MZ
1379/*
1380 * Resolve the access fault by making the page young again.
1381 * Note that because the faulting entry is guaranteed not to be
1382 * cached in the TLB, we don't need to invalidate anything.
06485053
CM
1383 * Only the HW Access Flag updates are supported for Stage 2 (no DBM),
1384 * so there is no need for atomic (pte|pmd)_mkyoung operations.
aeda9130
MZ
1385 */
1386static void handle_access_fault(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa)
1387{
1388 pmd_t *pmd;
1389 pte_t *pte;
ba049e93 1390 kvm_pfn_t pfn;
aeda9130
MZ
1391 bool pfn_valid = false;
1392
1393 trace_kvm_access_fault(fault_ipa);
1394
1395 spin_lock(&vcpu->kvm->mmu_lock);
1396
1397 pmd = stage2_get_pmd(vcpu->kvm, NULL, fault_ipa);
1398 if (!pmd || pmd_none(*pmd)) /* Nothing there */
1399 goto out;
1400
bbb3b6b3 1401 if (pmd_thp_or_huge(*pmd)) { /* THP, HugeTLB */
aeda9130
MZ
1402 *pmd = pmd_mkyoung(*pmd);
1403 pfn = pmd_pfn(*pmd);
1404 pfn_valid = true;
1405 goto out;
1406 }
1407
1408 pte = pte_offset_kernel(pmd, fault_ipa);
1409 if (pte_none(*pte)) /* Nothing there either */
1410 goto out;
1411
1412 *pte = pte_mkyoung(*pte); /* Just a page... */
1413 pfn = pte_pfn(*pte);
1414 pfn_valid = true;
1415out:
1416 spin_unlock(&vcpu->kvm->mmu_lock);
1417 if (pfn_valid)
1418 kvm_set_pfn_accessed(pfn);
1419}
1420
94f8e641
CD
1421/**
1422 * kvm_handle_guest_abort - handles all 2nd stage aborts
1423 * @vcpu: the VCPU pointer
1424 * @run: the kvm_run structure
1425 *
1426 * Any abort that gets to the host is almost guaranteed to be caused by a
1427 * missing second stage translation table entry, which can mean that either the
1428 * guest simply needs more memory and we must allocate an appropriate page or it
1429 * can mean that the guest tried to access I/O memory, which is emulated by user
1430 * space. The distinction is based on the IPA causing the fault and whether this
1431 * memory region has been registered as standard RAM by user space.
1432 */
342cd0ab
CD
1433int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run)
1434{
94f8e641
CD
1435 unsigned long fault_status;
1436 phys_addr_t fault_ipa;
1437 struct kvm_memory_slot *memslot;
98047888
CD
1438 unsigned long hva;
1439 bool is_iabt, write_fault, writable;
94f8e641
CD
1440 gfn_t gfn;
1441 int ret, idx;
1442
52d1dba9 1443 is_iabt = kvm_vcpu_trap_is_iabt(vcpu);
4055710b
MZ
1444 if (unlikely(!is_iabt && kvm_vcpu_dabt_isextabt(vcpu))) {
1445 kvm_inject_vabt(vcpu);
1446 return 1;
1447 }
1448
7393b599 1449 fault_ipa = kvm_vcpu_get_fault_ipa(vcpu);
94f8e641 1450
7393b599
MZ
1451 trace_kvm_guest_fault(*vcpu_pc(vcpu), kvm_vcpu_get_hsr(vcpu),
1452 kvm_vcpu_get_hfar(vcpu), fault_ipa);
94f8e641
CD
1453
1454 /* Check the stage-2 fault is trans. fault or write fault */
0496daa5 1455 fault_status = kvm_vcpu_trap_get_fault_type(vcpu);
35307b9a
MZ
1456 if (fault_status != FSC_FAULT && fault_status != FSC_PERM &&
1457 fault_status != FSC_ACCESS) {
0496daa5
CD
1458 kvm_err("Unsupported FSC: EC=%#x xFSC=%#lx ESR_EL2=%#lx\n",
1459 kvm_vcpu_trap_get_class(vcpu),
1460 (unsigned long)kvm_vcpu_trap_get_fault(vcpu),
1461 (unsigned long)kvm_vcpu_get_hsr(vcpu));
94f8e641
CD
1462 return -EFAULT;
1463 }
1464
1465 idx = srcu_read_lock(&vcpu->kvm->srcu);
1466
1467 gfn = fault_ipa >> PAGE_SHIFT;
98047888
CD
1468 memslot = gfn_to_memslot(vcpu->kvm, gfn);
1469 hva = gfn_to_hva_memslot_prot(memslot, gfn, &writable);
a7d079ce 1470 write_fault = kvm_is_write_fault(vcpu);
98047888 1471 if (kvm_is_error_hva(hva) || (write_fault && !writable)) {
94f8e641
CD
1472 if (is_iabt) {
1473 /* Prefetch Abort on I/O address */
7393b599 1474 kvm_inject_pabt(vcpu, kvm_vcpu_get_hfar(vcpu));
94f8e641
CD
1475 ret = 1;
1476 goto out_unlock;
1477 }
1478
57c841f1
MZ
1479 /*
1480 * Check for a cache maintenance operation. Since we
1481 * ended-up here, we know it is outside of any memory
1482 * slot. But we can't find out if that is for a device,
1483 * or if the guest is just being stupid. The only thing
1484 * we know for sure is that this range cannot be cached.
1485 *
1486 * So let's assume that the guest is just being
1487 * cautious, and skip the instruction.
1488 */
1489 if (kvm_vcpu_dabt_is_cm(vcpu)) {
1490 kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
1491 ret = 1;
1492 goto out_unlock;
1493 }
1494
cfe3950c
MZ
1495 /*
1496 * The IPA is reported as [MAX:12], so we need to
1497 * complement it with the bottom 12 bits from the
1498 * faulting VA. This is always 12 bits, irrespective
1499 * of the page size.
1500 */
1501 fault_ipa |= kvm_vcpu_get_hfar(vcpu) & ((1 << 12) - 1);
45e96ea6 1502 ret = io_mem_abort(vcpu, run, fault_ipa);
94f8e641
CD
1503 goto out_unlock;
1504 }
1505
c3058d5d
CD
1506 /* Userspace should not be able to register out-of-bounds IPAs */
1507 VM_BUG_ON(fault_ipa >= KVM_PHYS_SIZE);
1508
aeda9130
MZ
1509 if (fault_status == FSC_ACCESS) {
1510 handle_access_fault(vcpu, fault_ipa);
1511 ret = 1;
1512 goto out_unlock;
1513 }
1514
98047888 1515 ret = user_mem_abort(vcpu, fault_ipa, memslot, hva, fault_status);
94f8e641
CD
1516 if (ret == 0)
1517 ret = 1;
1518out_unlock:
1519 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1520 return ret;
342cd0ab
CD
1521}
1522
1d2ebacc
MZ
1523static int handle_hva_to_gpa(struct kvm *kvm,
1524 unsigned long start,
1525 unsigned long end,
1526 int (*handler)(struct kvm *kvm,
1527 gpa_t gpa, void *data),
1528 void *data)
d5d8184d
CD
1529{
1530 struct kvm_memslots *slots;
1531 struct kvm_memory_slot *memslot;
1d2ebacc 1532 int ret = 0;
d5d8184d
CD
1533
1534 slots = kvm_memslots(kvm);
1535
1536 /* we only care about the pages that the guest sees */
1537 kvm_for_each_memslot(memslot, slots) {
1538 unsigned long hva_start, hva_end;
1539 gfn_t gfn, gfn_end;
1540
1541 hva_start = max(start, memslot->userspace_addr);
1542 hva_end = min(end, memslot->userspace_addr +
1543 (memslot->npages << PAGE_SHIFT));
1544 if (hva_start >= hva_end)
1545 continue;
1546
1547 /*
1548 * {gfn(page) | page intersects with [hva_start, hva_end)} =
1549 * {gfn_start, gfn_start+1, ..., gfn_end-1}.
1550 */
1551 gfn = hva_to_gfn_memslot(hva_start, memslot);
1552 gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
1553
1554 for (; gfn < gfn_end; ++gfn) {
1555 gpa_t gpa = gfn << PAGE_SHIFT;
1d2ebacc 1556 ret |= handler(kvm, gpa, data);
d5d8184d
CD
1557 }
1558 }
1d2ebacc
MZ
1559
1560 return ret;
d5d8184d
CD
1561}
1562
1d2ebacc 1563static int kvm_unmap_hva_handler(struct kvm *kvm, gpa_t gpa, void *data)
d5d8184d
CD
1564{
1565 unmap_stage2_range(kvm, gpa, PAGE_SIZE);
1d2ebacc 1566 return 0;
d5d8184d
CD
1567}
1568
1569int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
1570{
1571 unsigned long end = hva + PAGE_SIZE;
1572
1573 if (!kvm->arch.pgd)
1574 return 0;
1575
1576 trace_kvm_unmap_hva(hva);
1577 handle_hva_to_gpa(kvm, hva, end, &kvm_unmap_hva_handler, NULL);
1578 return 0;
1579}
1580
1581int kvm_unmap_hva_range(struct kvm *kvm,
1582 unsigned long start, unsigned long end)
1583{
1584 if (!kvm->arch.pgd)
1585 return 0;
1586
1587 trace_kvm_unmap_hva_range(start, end);
1588 handle_hva_to_gpa(kvm, start, end, &kvm_unmap_hva_handler, NULL);
1589 return 0;
1590}
1591
1d2ebacc 1592static int kvm_set_spte_handler(struct kvm *kvm, gpa_t gpa, void *data)
d5d8184d
CD
1593{
1594 pte_t *pte = (pte_t *)data;
1595
15a49a44
MS
1596 /*
1597 * We can always call stage2_set_pte with KVM_S2PTE_FLAG_LOGGING_ACTIVE
1598 * flag clear because MMU notifiers will have unmapped a huge PMD before
1599 * calling ->change_pte() (which in turn calls kvm_set_spte_hva()) and
1600 * therefore stage2_set_pte() never needs to clear out a huge PMD
1601 * through this calling path.
1602 */
1603 stage2_set_pte(kvm, NULL, gpa, pte, 0);
1d2ebacc 1604 return 0;
d5d8184d
CD
1605}
1606
1607
1608void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
1609{
1610 unsigned long end = hva + PAGE_SIZE;
1611 pte_t stage2_pte;
1612
1613 if (!kvm->arch.pgd)
1614 return;
1615
1616 trace_kvm_set_spte_hva(hva);
1617 stage2_pte = pfn_pte(pte_pfn(pte), PAGE_S2);
1618 handle_hva_to_gpa(kvm, hva, end, &kvm_set_spte_handler, &stage2_pte);
1619}
1620
35307b9a
MZ
1621static int kvm_age_hva_handler(struct kvm *kvm, gpa_t gpa, void *data)
1622{
1623 pmd_t *pmd;
1624 pte_t *pte;
1625
1626 pmd = stage2_get_pmd(kvm, NULL, gpa);
1627 if (!pmd || pmd_none(*pmd)) /* Nothing there */
1628 return 0;
1629
06485053
CM
1630 if (pmd_thp_or_huge(*pmd)) /* THP, HugeTLB */
1631 return stage2_pmdp_test_and_clear_young(pmd);
35307b9a
MZ
1632
1633 pte = pte_offset_kernel(pmd, gpa);
1634 if (pte_none(*pte))
1635 return 0;
1636
06485053 1637 return stage2_ptep_test_and_clear_young(pte);
35307b9a
MZ
1638}
1639
1640static int kvm_test_age_hva_handler(struct kvm *kvm, gpa_t gpa, void *data)
1641{
1642 pmd_t *pmd;
1643 pte_t *pte;
1644
1645 pmd = stage2_get_pmd(kvm, NULL, gpa);
1646 if (!pmd || pmd_none(*pmd)) /* Nothing there */
1647 return 0;
1648
bbb3b6b3 1649 if (pmd_thp_or_huge(*pmd)) /* THP, HugeTLB */
35307b9a
MZ
1650 return pmd_young(*pmd);
1651
1652 pte = pte_offset_kernel(pmd, gpa);
1653 if (!pte_none(*pte)) /* Just a page... */
1654 return pte_young(*pte);
1655
1656 return 0;
1657}
1658
1659int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
1660{
1661 trace_kvm_age_hva(start, end);
1662 return handle_hva_to_gpa(kvm, start, end, kvm_age_hva_handler, NULL);
1663}
1664
1665int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
1666{
1667 trace_kvm_test_age_hva(hva);
1668 return handle_hva_to_gpa(kvm, hva, hva, kvm_test_age_hva_handler, NULL);
1669}
1670
d5d8184d
CD
1671void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu)
1672{
1673 mmu_free_memory_cache(&vcpu->arch.mmu_page_cache);
1674}
1675
342cd0ab
CD
1676phys_addr_t kvm_mmu_get_httbr(void)
1677{
e4c5a685
AB
1678 if (__kvm_cpu_uses_extended_idmap())
1679 return virt_to_phys(merged_hyp_pgd);
1680 else
1681 return virt_to_phys(hyp_pgd);
342cd0ab
CD
1682}
1683
5a677ce0
MZ
1684phys_addr_t kvm_get_idmap_vector(void)
1685{
1686 return hyp_idmap_vector;
1687}
1688
67f69197
AT
1689phys_addr_t kvm_get_idmap_start(void)
1690{
1691 return hyp_idmap_start;
1692}
1693
0535a3e2
MZ
1694static int kvm_map_idmap_text(pgd_t *pgd)
1695{
1696 int err;
1697
1698 /* Create the idmap in the boot page tables */
1699 err = __create_hyp_mappings(pgd,
1700 hyp_idmap_start, hyp_idmap_end,
1701 __phys_to_pfn(hyp_idmap_start),
1702 PAGE_HYP_EXEC);
1703 if (err)
1704 kvm_err("Failed to idmap %lx-%lx\n",
1705 hyp_idmap_start, hyp_idmap_end);
1706
1707 return err;
1708}
1709
342cd0ab
CD
1710int kvm_mmu_init(void)
1711{
2fb41059
MZ
1712 int err;
1713
4fda342c
SS
1714 hyp_idmap_start = kvm_virt_to_phys(__hyp_idmap_text_start);
1715 hyp_idmap_end = kvm_virt_to_phys(__hyp_idmap_text_end);
1716 hyp_idmap_vector = kvm_virt_to_phys(__kvm_hyp_init);
5a677ce0 1717
06f75a1f
AB
1718 /*
1719 * We rely on the linker script to ensure at build time that the HYP
1720 * init code does not cross a page boundary.
1721 */
1722 BUG_ON((hyp_idmap_start ^ (hyp_idmap_end - 1)) & PAGE_MASK);
5a677ce0 1723
eac378a9
MZ
1724 kvm_info("IDMAP page: %lx\n", hyp_idmap_start);
1725 kvm_info("HYP VA range: %lx:%lx\n",
6c41a413 1726 kern_hyp_va(PAGE_OFFSET), kern_hyp_va(~0UL));
eac378a9 1727
6c41a413 1728 if (hyp_idmap_start >= kern_hyp_va(PAGE_OFFSET) &&
d2896d4b
MZ
1729 hyp_idmap_start < kern_hyp_va(~0UL) &&
1730 hyp_idmap_start != (unsigned long)__hyp_idmap_text_start) {
eac378a9
MZ
1731 /*
1732 * The idmap page is intersecting with the VA space,
1733 * it is not safe to continue further.
1734 */
1735 kvm_err("IDMAP intersecting with HYP VA, unable to continue\n");
1736 err = -EINVAL;
1737 goto out;
1738 }
1739
38f791a4 1740 hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, hyp_pgd_order);
0535a3e2 1741 if (!hyp_pgd) {
d5d8184d 1742 kvm_err("Hyp mode PGD not allocated\n");
2fb41059
MZ
1743 err = -ENOMEM;
1744 goto out;
1745 }
1746
0535a3e2
MZ
1747 if (__kvm_cpu_uses_extended_idmap()) {
1748 boot_hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
1749 hyp_pgd_order);
1750 if (!boot_hyp_pgd) {
1751 kvm_err("Hyp boot PGD not allocated\n");
1752 err = -ENOMEM;
1753 goto out;
1754 }
2fb41059 1755
0535a3e2
MZ
1756 err = kvm_map_idmap_text(boot_hyp_pgd);
1757 if (err)
1758 goto out;
d5d8184d 1759
e4c5a685
AB
1760 merged_hyp_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1761 if (!merged_hyp_pgd) {
1762 kvm_err("Failed to allocate extra HYP pgd\n");
1763 goto out;
1764 }
1765 __kvm_extend_hypmap(boot_hyp_pgd, hyp_pgd, merged_hyp_pgd,
1766 hyp_idmap_start);
0535a3e2
MZ
1767 } else {
1768 err = kvm_map_idmap_text(hyp_pgd);
1769 if (err)
1770 goto out;
5a677ce0
MZ
1771 }
1772
d5d8184d 1773 return 0;
2fb41059 1774out:
4f728276 1775 free_hyp_pgds();
2fb41059 1776 return err;
342cd0ab 1777}
df6ce24f
EA
1778
1779void kvm_arch_commit_memory_region(struct kvm *kvm,
09170a49 1780 const struct kvm_userspace_memory_region *mem,
df6ce24f 1781 const struct kvm_memory_slot *old,
f36f3f28 1782 const struct kvm_memory_slot *new,
df6ce24f
EA
1783 enum kvm_mr_change change)
1784{
c6473555
MS
1785 /*
1786 * At this point memslot has been committed and there is an
1787 * allocated dirty_bitmap[], dirty pages will be be tracked while the
1788 * memory slot is write protected.
1789 */
1790 if (change != KVM_MR_DELETE && mem->flags & KVM_MEM_LOG_DIRTY_PAGES)
1791 kvm_mmu_wp_memory_region(kvm, mem->slot);
df6ce24f
EA
1792}
1793
1794int kvm_arch_prepare_memory_region(struct kvm *kvm,
1795 struct kvm_memory_slot *memslot,
09170a49 1796 const struct kvm_userspace_memory_region *mem,
df6ce24f
EA
1797 enum kvm_mr_change change)
1798{
8eef9123
AB
1799 hva_t hva = mem->userspace_addr;
1800 hva_t reg_end = hva + mem->memory_size;
1801 bool writable = !(mem->flags & KVM_MEM_READONLY);
1802 int ret = 0;
1803
15a49a44
MS
1804 if (change != KVM_MR_CREATE && change != KVM_MR_MOVE &&
1805 change != KVM_MR_FLAGS_ONLY)
8eef9123
AB
1806 return 0;
1807
c3058d5d
CD
1808 /*
1809 * Prevent userspace from creating a memory region outside of the IPA
1810 * space addressable by the KVM guest IPA space.
1811 */
1812 if (memslot->base_gfn + memslot->npages >=
1813 (KVM_PHYS_SIZE >> PAGE_SHIFT))
1814 return -EFAULT;
1815
72f31048 1816 down_read(&current->mm->mmap_sem);
8eef9123
AB
1817 /*
1818 * A memory region could potentially cover multiple VMAs, and any holes
1819 * between them, so iterate over all of them to find out if we can map
1820 * any of them right now.
1821 *
1822 * +--------------------------------------------+
1823 * +---------------+----------------+ +----------------+
1824 * | : VMA 1 | VMA 2 | | VMA 3 : |
1825 * +---------------+----------------+ +----------------+
1826 * | memory region |
1827 * +--------------------------------------------+
1828 */
1829 do {
1830 struct vm_area_struct *vma = find_vma(current->mm, hva);
1831 hva_t vm_start, vm_end;
1832
1833 if (!vma || vma->vm_start >= reg_end)
1834 break;
1835
1836 /*
1837 * Mapping a read-only VMA is only allowed if the
1838 * memory region is configured as read-only.
1839 */
1840 if (writable && !(vma->vm_flags & VM_WRITE)) {
1841 ret = -EPERM;
1842 break;
1843 }
1844
1845 /*
1846 * Take the intersection of this VMA with the memory region
1847 */
1848 vm_start = max(hva, vma->vm_start);
1849 vm_end = min(reg_end, vma->vm_end);
1850
1851 if (vma->vm_flags & VM_PFNMAP) {
1852 gpa_t gpa = mem->guest_phys_addr +
1853 (vm_start - mem->userspace_addr);
ca09f02f
MM
1854 phys_addr_t pa;
1855
1856 pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT;
1857 pa += vm_start - vma->vm_start;
8eef9123 1858
15a49a44 1859 /* IO region dirty page logging not allowed */
72f31048
MZ
1860 if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES) {
1861 ret = -EINVAL;
1862 goto out;
1863 }
15a49a44 1864
8eef9123
AB
1865 ret = kvm_phys_addr_ioremap(kvm, gpa, pa,
1866 vm_end - vm_start,
1867 writable);
1868 if (ret)
1869 break;
1870 }
1871 hva = vm_end;
1872 } while (hva < reg_end);
1873
15a49a44 1874 if (change == KVM_MR_FLAGS_ONLY)
72f31048 1875 goto out;
15a49a44 1876
849260c7
AB
1877 spin_lock(&kvm->mmu_lock);
1878 if (ret)
8eef9123 1879 unmap_stage2_range(kvm, mem->guest_phys_addr, mem->memory_size);
849260c7
AB
1880 else
1881 stage2_flush_memslot(kvm, memslot);
1882 spin_unlock(&kvm->mmu_lock);
72f31048
MZ
1883out:
1884 up_read(&current->mm->mmap_sem);
8eef9123 1885 return ret;
df6ce24f
EA
1886}
1887
1888void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
1889 struct kvm_memory_slot *dont)
1890{
1891}
1892
1893int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
1894 unsigned long npages)
1895{
1896 return 0;
1897}
1898
15f46015 1899void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
df6ce24f
EA
1900{
1901}
1902
1903void kvm_arch_flush_shadow_all(struct kvm *kvm)
1904{
293f2936 1905 kvm_free_stage2_pgd(kvm);
df6ce24f
EA
1906}
1907
1908void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
1909 struct kvm_memory_slot *slot)
1910{
8eef9123
AB
1911 gpa_t gpa = slot->base_gfn << PAGE_SHIFT;
1912 phys_addr_t size = slot->npages << PAGE_SHIFT;
1913
1914 spin_lock(&kvm->mmu_lock);
1915 unmap_stage2_range(kvm, gpa, size);
1916 spin_unlock(&kvm->mmu_lock);
df6ce24f 1917}
3c1e7165
MZ
1918
1919/*
1920 * See note at ARMv7 ARM B1.14.4 (TL;DR: S/W ops are not easily virtualized).
1921 *
1922 * Main problems:
1923 * - S/W ops are local to a CPU (not broadcast)
1924 * - We have line migration behind our back (speculation)
1925 * - System caches don't support S/W at all (damn!)
1926 *
1927 * In the face of the above, the best we can do is to try and convert
1928 * S/W ops to VA ops. Because the guest is not allowed to infer the
1929 * S/W to PA mapping, it can only use S/W to nuke the whole cache,
1930 * which is a rather good thing for us.
1931 *
1932 * Also, it is only used when turning caches on/off ("The expected
1933 * usage of the cache maintenance instructions that operate by set/way
1934 * is associated with the cache maintenance instructions associated
1935 * with the powerdown and powerup of caches, if this is required by
1936 * the implementation.").
1937 *
1938 * We use the following policy:
1939 *
1940 * - If we trap a S/W operation, we enable VM trapping to detect
1941 * caches being turned on/off, and do a full clean.
1942 *
1943 * - We flush the caches on both caches being turned on and off.
1944 *
1945 * - Once the caches are enabled, we stop trapping VM ops.
1946 */
1947void kvm_set_way_flush(struct kvm_vcpu *vcpu)
1948{
1949 unsigned long hcr = vcpu_get_hcr(vcpu);
1950
1951 /*
1952 * If this is the first time we do a S/W operation
1953 * (i.e. HCR_TVM not set) flush the whole memory, and set the
1954 * VM trapping.
1955 *
1956 * Otherwise, rely on the VM trapping to wait for the MMU +
1957 * Caches to be turned off. At that point, we'll be able to
1958 * clean the caches again.
1959 */
1960 if (!(hcr & HCR_TVM)) {
1961 trace_kvm_set_way_flush(*vcpu_pc(vcpu),
1962 vcpu_has_cache_enabled(vcpu));
1963 stage2_flush_vm(vcpu->kvm);
1964 vcpu_set_hcr(vcpu, hcr | HCR_TVM);
1965 }
1966}
1967
1968void kvm_toggle_cache(struct kvm_vcpu *vcpu, bool was_enabled)
1969{
1970 bool now_enabled = vcpu_has_cache_enabled(vcpu);
1971
1972 /*
1973 * If switching the MMU+caches on, need to invalidate the caches.
1974 * If switching it off, need to clean the caches.
1975 * Clean + invalidate does the trick always.
1976 */
1977 if (now_enabled != was_enabled)
1978 stage2_flush_vm(vcpu->kvm);
1979
1980 /* Caches are now on, stop trapping VM ops (until a S/W op) */
1981 if (now_enabled)
1982 vcpu_set_hcr(vcpu, vcpu_get_hcr(vcpu) & ~HCR_TVM);
1983
1984 trace_kvm_toggle_cache(*vcpu_pc(vcpu), was_enabled, now_enabled);
1985}