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arm/arm64: KVM: add guest SEA support
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1/*
2 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
3 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
17 */
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18
19#include <linux/mman.h>
20#include <linux/kvm_host.h>
21#include <linux/io.h>
ad361f09 22#include <linux/hugetlb.h>
45e96ea6 23#include <trace/events/kvm.h>
342cd0ab 24#include <asm/pgalloc.h>
94f8e641 25#include <asm/cacheflush.h>
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26#include <asm/kvm_arm.h>
27#include <asm/kvm_mmu.h>
45e96ea6 28#include <asm/kvm_mmio.h>
d5d8184d 29#include <asm/kvm_asm.h>
94f8e641 30#include <asm/kvm_emulate.h>
1e947bad 31#include <asm/virt.h>
6633b457 32#include <asm/system_misc.h>
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33
34#include "trace.h"
342cd0ab 35
5a677ce0 36static pgd_t *boot_hyp_pgd;
2fb41059 37static pgd_t *hyp_pgd;
e4c5a685 38static pgd_t *merged_hyp_pgd;
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39static DEFINE_MUTEX(kvm_hyp_pgd_mutex);
40
5a677ce0
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41static unsigned long hyp_idmap_start;
42static unsigned long hyp_idmap_end;
43static phys_addr_t hyp_idmap_vector;
44
9163ee23 45#define S2_PGD_SIZE (PTRS_PER_S2_PGD * sizeof(pgd_t))
38f791a4 46#define hyp_pgd_order get_order(PTRS_PER_PGD * sizeof(pgd_t))
5d4e08c4 47
15a49a44
MS
48#define KVM_S2PTE_FLAG_IS_IOMAP (1UL << 0)
49#define KVM_S2_FLAG_LOGGING_ACTIVE (1UL << 1)
50
51static bool memslot_is_logging(struct kvm_memory_slot *memslot)
52{
15a49a44 53 return memslot->dirty_bitmap && !(memslot->flags & KVM_MEM_READONLY);
7276030a
MS
54}
55
56/**
57 * kvm_flush_remote_tlbs() - flush all VM TLB entries for v7/8
58 * @kvm: pointer to kvm structure.
59 *
60 * Interface to HYP function to flush all VM TLB entries
61 */
62void kvm_flush_remote_tlbs(struct kvm *kvm)
63{
64 kvm_call_hyp(__kvm_tlb_flush_vmid, kvm);
15a49a44 65}
ad361f09 66
48762767 67static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
d5d8184d 68{
8684e701 69 kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, kvm, ipa);
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70}
71
363ef89f
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72/*
73 * D-Cache management functions. They take the page table entries by
74 * value, as they are flushing the cache using the kernel mapping (or
75 * kmap on 32bit).
76 */
77static void kvm_flush_dcache_pte(pte_t pte)
78{
79 __kvm_flush_dcache_pte(pte);
80}
81
82static void kvm_flush_dcache_pmd(pmd_t pmd)
83{
84 __kvm_flush_dcache_pmd(pmd);
85}
86
87static void kvm_flush_dcache_pud(pud_t pud)
88{
89 __kvm_flush_dcache_pud(pud);
90}
91
e6fab544
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92static bool kvm_is_device_pfn(unsigned long pfn)
93{
94 return !pfn_valid(pfn);
95}
96
15a49a44
MS
97/**
98 * stage2_dissolve_pmd() - clear and flush huge PMD entry
99 * @kvm: pointer to kvm structure.
100 * @addr: IPA
101 * @pmd: pmd pointer for IPA
102 *
103 * Function clears a PMD entry, flushes addr 1st and 2nd stage TLBs. Marks all
104 * pages in the range dirty.
105 */
106static void stage2_dissolve_pmd(struct kvm *kvm, phys_addr_t addr, pmd_t *pmd)
107{
bbb3b6b3 108 if (!pmd_thp_or_huge(*pmd))
15a49a44
MS
109 return;
110
111 pmd_clear(pmd);
112 kvm_tlb_flush_vmid_ipa(kvm, addr);
113 put_page(virt_to_page(pmd));
114}
115
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116static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
117 int min, int max)
118{
119 void *page;
120
121 BUG_ON(max > KVM_NR_MEM_OBJS);
122 if (cache->nobjs >= min)
123 return 0;
124 while (cache->nobjs < max) {
125 page = (void *)__get_free_page(PGALLOC_GFP);
126 if (!page)
127 return -ENOMEM;
128 cache->objects[cache->nobjs++] = page;
129 }
130 return 0;
131}
132
133static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
134{
135 while (mc->nobjs)
136 free_page((unsigned long)mc->objects[--mc->nobjs]);
137}
138
139static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
140{
141 void *p;
142
143 BUG_ON(!mc || !mc->nobjs);
144 p = mc->objects[--mc->nobjs];
145 return p;
146}
147
7a1c831e 148static void clear_stage2_pgd_entry(struct kvm *kvm, pgd_t *pgd, phys_addr_t addr)
979acd5e 149{
7a1c831e
SP
150 pud_t *pud_table __maybe_unused = stage2_pud_offset(pgd, 0UL);
151 stage2_pgd_clear(pgd);
4f853a71 152 kvm_tlb_flush_vmid_ipa(kvm, addr);
7a1c831e 153 stage2_pud_free(pud_table);
4f853a71 154 put_page(virt_to_page(pgd));
979acd5e
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155}
156
7a1c831e 157static void clear_stage2_pud_entry(struct kvm *kvm, pud_t *pud, phys_addr_t addr)
342cd0ab 158{
7a1c831e
SP
159 pmd_t *pmd_table __maybe_unused = stage2_pmd_offset(pud, 0);
160 VM_BUG_ON(stage2_pud_huge(*pud));
161 stage2_pud_clear(pud);
4f853a71 162 kvm_tlb_flush_vmid_ipa(kvm, addr);
7a1c831e 163 stage2_pmd_free(pmd_table);
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164 put_page(virt_to_page(pud));
165}
342cd0ab 166
7a1c831e 167static void clear_stage2_pmd_entry(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr)
4f728276 168{
4f853a71 169 pte_t *pte_table = pte_offset_kernel(pmd, 0);
bbb3b6b3 170 VM_BUG_ON(pmd_thp_or_huge(*pmd));
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171 pmd_clear(pmd);
172 kvm_tlb_flush_vmid_ipa(kvm, addr);
173 pte_free_kernel(NULL, pte_table);
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174 put_page(virt_to_page(pmd));
175}
176
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177/*
178 * Unmapping vs dcache management:
179 *
180 * If a guest maps certain memory pages as uncached, all writes will
181 * bypass the data cache and go directly to RAM. However, the CPUs
182 * can still speculate reads (not writes) and fill cache lines with
183 * data.
184 *
185 * Those cache lines will be *clean* cache lines though, so a
186 * clean+invalidate operation is equivalent to an invalidate
187 * operation, because no cache lines are marked dirty.
188 *
189 * Those clean cache lines could be filled prior to an uncached write
190 * by the guest, and the cache coherent IO subsystem would therefore
191 * end up writing old data to disk.
192 *
193 * This is why right after unmapping a page/section and invalidating
194 * the corresponding TLBs, we call kvm_flush_dcache_p*() to make sure
195 * the IO subsystem will never hit in the cache.
196 */
7a1c831e 197static void unmap_stage2_ptes(struct kvm *kvm, pmd_t *pmd,
4f853a71 198 phys_addr_t addr, phys_addr_t end)
4f728276 199{
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200 phys_addr_t start_addr = addr;
201 pte_t *pte, *start_pte;
202
203 start_pte = pte = pte_offset_kernel(pmd, addr);
204 do {
205 if (!pte_none(*pte)) {
363ef89f
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206 pte_t old_pte = *pte;
207
4f853a71 208 kvm_set_pte(pte, __pte(0));
4f853a71 209 kvm_tlb_flush_vmid_ipa(kvm, addr);
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210
211 /* No need to invalidate the cache for device mappings */
0de58f85 212 if (!kvm_is_device_pfn(pte_pfn(old_pte)))
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213 kvm_flush_dcache_pte(old_pte);
214
215 put_page(virt_to_page(pte));
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216 }
217 } while (pte++, addr += PAGE_SIZE, addr != end);
218
7a1c831e
SP
219 if (stage2_pte_table_empty(start_pte))
220 clear_stage2_pmd_entry(kvm, pmd, start_addr);
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CD
221}
222
7a1c831e 223static void unmap_stage2_pmds(struct kvm *kvm, pud_t *pud,
4f853a71 224 phys_addr_t addr, phys_addr_t end)
000d3996 225{
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226 phys_addr_t next, start_addr = addr;
227 pmd_t *pmd, *start_pmd;
000d3996 228
7a1c831e 229 start_pmd = pmd = stage2_pmd_offset(pud, addr);
4f853a71 230 do {
7a1c831e 231 next = stage2_pmd_addr_end(addr, end);
4f853a71 232 if (!pmd_none(*pmd)) {
bbb3b6b3 233 if (pmd_thp_or_huge(*pmd)) {
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234 pmd_t old_pmd = *pmd;
235
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236 pmd_clear(pmd);
237 kvm_tlb_flush_vmid_ipa(kvm, addr);
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238
239 kvm_flush_dcache_pmd(old_pmd);
240
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CD
241 put_page(virt_to_page(pmd));
242 } else {
7a1c831e 243 unmap_stage2_ptes(kvm, pmd, addr, next);
4f853a71 244 }
ad361f09 245 }
4f853a71 246 } while (pmd++, addr = next, addr != end);
ad361f09 247
7a1c831e
SP
248 if (stage2_pmd_table_empty(start_pmd))
249 clear_stage2_pud_entry(kvm, pud, start_addr);
4f853a71 250}
000d3996 251
7a1c831e 252static void unmap_stage2_puds(struct kvm *kvm, pgd_t *pgd,
4f853a71
CD
253 phys_addr_t addr, phys_addr_t end)
254{
255 phys_addr_t next, start_addr = addr;
256 pud_t *pud, *start_pud;
4f728276 257
7a1c831e 258 start_pud = pud = stage2_pud_offset(pgd, addr);
4f853a71 259 do {
7a1c831e
SP
260 next = stage2_pud_addr_end(addr, end);
261 if (!stage2_pud_none(*pud)) {
262 if (stage2_pud_huge(*pud)) {
363ef89f
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263 pud_t old_pud = *pud;
264
7a1c831e 265 stage2_pud_clear(pud);
4f853a71 266 kvm_tlb_flush_vmid_ipa(kvm, addr);
363ef89f 267 kvm_flush_dcache_pud(old_pud);
4f853a71
CD
268 put_page(virt_to_page(pud));
269 } else {
7a1c831e 270 unmap_stage2_pmds(kvm, pud, addr, next);
4f728276
MZ
271 }
272 }
4f853a71 273 } while (pud++, addr = next, addr != end);
4f728276 274
7a1c831e
SP
275 if (stage2_pud_table_empty(start_pud))
276 clear_stage2_pgd_entry(kvm, pgd, start_addr);
4f853a71
CD
277}
278
7a1c831e
SP
279/**
280 * unmap_stage2_range -- Clear stage2 page table entries to unmap a range
281 * @kvm: The VM pointer
282 * @start: The intermediate physical base address of the range to unmap
283 * @size: The size of the area to unmap
284 *
285 * Clear a range of stage-2 mappings, lowering the various ref-counts. Must
286 * be called while holding mmu_lock (unless for freeing the stage2 pgd before
287 * destroying the VM), otherwise another faulting VCPU may come in and mess
288 * with things behind our backs.
289 */
290static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size)
4f853a71
CD
291{
292 pgd_t *pgd;
293 phys_addr_t addr = start, end = start + size;
294 phys_addr_t next;
295
3c5cdffd 296 assert_spin_locked(&kvm->mmu_lock);
7a1c831e 297 pgd = kvm->arch.pgd + stage2_pgd_index(addr);
4f853a71 298 do {
7a1c831e
SP
299 next = stage2_pgd_addr_end(addr, end);
300 if (!stage2_pgd_none(*pgd))
301 unmap_stage2_puds(kvm, pgd, addr, next);
3c5cdffd
SP
302 /*
303 * If the range is too large, release the kvm->mmu_lock
304 * to prevent starvation and lockup detector warnings.
305 */
306 if (next != end)
307 cond_resched_lock(&kvm->mmu_lock);
4f853a71 308 } while (pgd++, addr = next, addr != end);
000d3996
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309}
310
9d218a1f
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311static void stage2_flush_ptes(struct kvm *kvm, pmd_t *pmd,
312 phys_addr_t addr, phys_addr_t end)
313{
314 pte_t *pte;
315
316 pte = pte_offset_kernel(pmd, addr);
317 do {
0de58f85 318 if (!pte_none(*pte) && !kvm_is_device_pfn(pte_pfn(*pte)))
363ef89f 319 kvm_flush_dcache_pte(*pte);
9d218a1f
MZ
320 } while (pte++, addr += PAGE_SIZE, addr != end);
321}
322
323static void stage2_flush_pmds(struct kvm *kvm, pud_t *pud,
324 phys_addr_t addr, phys_addr_t end)
325{
326 pmd_t *pmd;
327 phys_addr_t next;
328
70fd1906 329 pmd = stage2_pmd_offset(pud, addr);
9d218a1f 330 do {
70fd1906 331 next = stage2_pmd_addr_end(addr, end);
9d218a1f 332 if (!pmd_none(*pmd)) {
bbb3b6b3 333 if (pmd_thp_or_huge(*pmd))
363ef89f
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334 kvm_flush_dcache_pmd(*pmd);
335 else
9d218a1f 336 stage2_flush_ptes(kvm, pmd, addr, next);
9d218a1f
MZ
337 }
338 } while (pmd++, addr = next, addr != end);
339}
340
341static void stage2_flush_puds(struct kvm *kvm, pgd_t *pgd,
342 phys_addr_t addr, phys_addr_t end)
343{
344 pud_t *pud;
345 phys_addr_t next;
346
70fd1906 347 pud = stage2_pud_offset(pgd, addr);
9d218a1f 348 do {
70fd1906
SP
349 next = stage2_pud_addr_end(addr, end);
350 if (!stage2_pud_none(*pud)) {
351 if (stage2_pud_huge(*pud))
363ef89f
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352 kvm_flush_dcache_pud(*pud);
353 else
9d218a1f 354 stage2_flush_pmds(kvm, pud, addr, next);
9d218a1f
MZ
355 }
356 } while (pud++, addr = next, addr != end);
357}
358
359static void stage2_flush_memslot(struct kvm *kvm,
360 struct kvm_memory_slot *memslot)
361{
362 phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
363 phys_addr_t end = addr + PAGE_SIZE * memslot->npages;
364 phys_addr_t next;
365 pgd_t *pgd;
366
70fd1906 367 pgd = kvm->arch.pgd + stage2_pgd_index(addr);
9d218a1f 368 do {
70fd1906 369 next = stage2_pgd_addr_end(addr, end);
9d218a1f
MZ
370 stage2_flush_puds(kvm, pgd, addr, next);
371 } while (pgd++, addr = next, addr != end);
372}
373
374/**
375 * stage2_flush_vm - Invalidate cache for pages mapped in stage 2
376 * @kvm: The struct kvm pointer
377 *
378 * Go through the stage 2 page tables and invalidate any cache lines
379 * backing memory already mapped to the VM.
380 */
3c1e7165 381static void stage2_flush_vm(struct kvm *kvm)
9d218a1f
MZ
382{
383 struct kvm_memslots *slots;
384 struct kvm_memory_slot *memslot;
385 int idx;
386
387 idx = srcu_read_lock(&kvm->srcu);
388 spin_lock(&kvm->mmu_lock);
389
390 slots = kvm_memslots(kvm);
391 kvm_for_each_memslot(memslot, slots)
392 stage2_flush_memslot(kvm, memslot);
393
394 spin_unlock(&kvm->mmu_lock);
395 srcu_read_unlock(&kvm->srcu, idx);
396}
397
64f32497
SP
398static void clear_hyp_pgd_entry(pgd_t *pgd)
399{
400 pud_t *pud_table __maybe_unused = pud_offset(pgd, 0UL);
401 pgd_clear(pgd);
402 pud_free(NULL, pud_table);
403 put_page(virt_to_page(pgd));
404}
405
406static void clear_hyp_pud_entry(pud_t *pud)
407{
408 pmd_t *pmd_table __maybe_unused = pmd_offset(pud, 0);
409 VM_BUG_ON(pud_huge(*pud));
410 pud_clear(pud);
411 pmd_free(NULL, pmd_table);
412 put_page(virt_to_page(pud));
413}
414
415static void clear_hyp_pmd_entry(pmd_t *pmd)
416{
417 pte_t *pte_table = pte_offset_kernel(pmd, 0);
418 VM_BUG_ON(pmd_thp_or_huge(*pmd));
419 pmd_clear(pmd);
420 pte_free_kernel(NULL, pte_table);
421 put_page(virt_to_page(pmd));
422}
423
424static void unmap_hyp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end)
425{
426 pte_t *pte, *start_pte;
427
428 start_pte = pte = pte_offset_kernel(pmd, addr);
429 do {
430 if (!pte_none(*pte)) {
431 kvm_set_pte(pte, __pte(0));
432 put_page(virt_to_page(pte));
433 }
434 } while (pte++, addr += PAGE_SIZE, addr != end);
435
436 if (hyp_pte_table_empty(start_pte))
437 clear_hyp_pmd_entry(pmd);
438}
439
440static void unmap_hyp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end)
441{
442 phys_addr_t next;
443 pmd_t *pmd, *start_pmd;
444
445 start_pmd = pmd = pmd_offset(pud, addr);
446 do {
447 next = pmd_addr_end(addr, end);
448 /* Hyp doesn't use huge pmds */
449 if (!pmd_none(*pmd))
450 unmap_hyp_ptes(pmd, addr, next);
451 } while (pmd++, addr = next, addr != end);
452
453 if (hyp_pmd_table_empty(start_pmd))
454 clear_hyp_pud_entry(pud);
455}
456
457static void unmap_hyp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end)
458{
459 phys_addr_t next;
460 pud_t *pud, *start_pud;
461
462 start_pud = pud = pud_offset(pgd, addr);
463 do {
464 next = pud_addr_end(addr, end);
465 /* Hyp doesn't use huge puds */
466 if (!pud_none(*pud))
467 unmap_hyp_pmds(pud, addr, next);
468 } while (pud++, addr = next, addr != end);
469
470 if (hyp_pud_table_empty(start_pud))
471 clear_hyp_pgd_entry(pgd);
472}
473
474static void unmap_hyp_range(pgd_t *pgdp, phys_addr_t start, u64 size)
475{
476 pgd_t *pgd;
477 phys_addr_t addr = start, end = start + size;
478 phys_addr_t next;
479
480 /*
481 * We don't unmap anything from HYP, except at the hyp tear down.
482 * Hence, we don't have to invalidate the TLBs here.
483 */
484 pgd = pgdp + pgd_index(addr);
485 do {
486 next = pgd_addr_end(addr, end);
487 if (!pgd_none(*pgd))
488 unmap_hyp_puds(pgd, addr, next);
489 } while (pgd++, addr = next, addr != end);
490}
491
342cd0ab 492/**
4f728276 493 * free_hyp_pgds - free Hyp-mode page tables
342cd0ab 494 *
5a677ce0
MZ
495 * Assumes hyp_pgd is a page table used strictly in Hyp-mode and
496 * therefore contains either mappings in the kernel memory area (above
497 * PAGE_OFFSET), or device mappings in the vmalloc range (from
498 * VMALLOC_START to VMALLOC_END).
499 *
500 * boot_hyp_pgd should only map two pages for the init code.
342cd0ab 501 */
4f728276 502void free_hyp_pgds(void)
342cd0ab 503{
342cd0ab
CD
504 unsigned long addr;
505
d157f4a5 506 mutex_lock(&kvm_hyp_pgd_mutex);
5a677ce0 507
26781f9c
MZ
508 if (boot_hyp_pgd) {
509 unmap_hyp_range(boot_hyp_pgd, hyp_idmap_start, PAGE_SIZE);
510 free_pages((unsigned long)boot_hyp_pgd, hyp_pgd_order);
511 boot_hyp_pgd = NULL;
512 }
513
4f728276 514 if (hyp_pgd) {
26781f9c 515 unmap_hyp_range(hyp_pgd, hyp_idmap_start, PAGE_SIZE);
4f728276 516 for (addr = PAGE_OFFSET; virt_addr_valid(addr); addr += PGDIR_SIZE)
6c41a413 517 unmap_hyp_range(hyp_pgd, kern_hyp_va(addr), PGDIR_SIZE);
4f728276 518 for (addr = VMALLOC_START; is_vmalloc_addr((void*)addr); addr += PGDIR_SIZE)
6c41a413 519 unmap_hyp_range(hyp_pgd, kern_hyp_va(addr), PGDIR_SIZE);
d4cb9df5 520
38f791a4 521 free_pages((unsigned long)hyp_pgd, hyp_pgd_order);
d157f4a5 522 hyp_pgd = NULL;
4f728276 523 }
e4c5a685
AB
524 if (merged_hyp_pgd) {
525 clear_page(merged_hyp_pgd);
526 free_page((unsigned long)merged_hyp_pgd);
527 merged_hyp_pgd = NULL;
528 }
4f728276 529
342cd0ab
CD
530 mutex_unlock(&kvm_hyp_pgd_mutex);
531}
532
533static void create_hyp_pte_mappings(pmd_t *pmd, unsigned long start,
6060df84
MZ
534 unsigned long end, unsigned long pfn,
535 pgprot_t prot)
342cd0ab
CD
536{
537 pte_t *pte;
538 unsigned long addr;
342cd0ab 539
3562c76d
MZ
540 addr = start;
541 do {
6060df84
MZ
542 pte = pte_offset_kernel(pmd, addr);
543 kvm_set_pte(pte, pfn_pte(pfn, prot));
4f728276 544 get_page(virt_to_page(pte));
5a677ce0 545 kvm_flush_dcache_to_poc(pte, sizeof(*pte));
6060df84 546 pfn++;
3562c76d 547 } while (addr += PAGE_SIZE, addr != end);
342cd0ab
CD
548}
549
550static int create_hyp_pmd_mappings(pud_t *pud, unsigned long start,
6060df84
MZ
551 unsigned long end, unsigned long pfn,
552 pgprot_t prot)
342cd0ab
CD
553{
554 pmd_t *pmd;
555 pte_t *pte;
556 unsigned long addr, next;
557
3562c76d
MZ
558 addr = start;
559 do {
6060df84 560 pmd = pmd_offset(pud, addr);
342cd0ab
CD
561
562 BUG_ON(pmd_sect(*pmd));
563
564 if (pmd_none(*pmd)) {
6060df84 565 pte = pte_alloc_one_kernel(NULL, addr);
342cd0ab
CD
566 if (!pte) {
567 kvm_err("Cannot allocate Hyp pte\n");
568 return -ENOMEM;
569 }
570 pmd_populate_kernel(NULL, pmd, pte);
4f728276 571 get_page(virt_to_page(pmd));
5a677ce0 572 kvm_flush_dcache_to_poc(pmd, sizeof(*pmd));
342cd0ab
CD
573 }
574
575 next = pmd_addr_end(addr, end);
576
6060df84
MZ
577 create_hyp_pte_mappings(pmd, addr, next, pfn, prot);
578 pfn += (next - addr) >> PAGE_SHIFT;
3562c76d 579 } while (addr = next, addr != end);
342cd0ab
CD
580
581 return 0;
582}
583
38f791a4
CD
584static int create_hyp_pud_mappings(pgd_t *pgd, unsigned long start,
585 unsigned long end, unsigned long pfn,
586 pgprot_t prot)
587{
588 pud_t *pud;
589 pmd_t *pmd;
590 unsigned long addr, next;
591 int ret;
592
593 addr = start;
594 do {
595 pud = pud_offset(pgd, addr);
596
597 if (pud_none_or_clear_bad(pud)) {
598 pmd = pmd_alloc_one(NULL, addr);
599 if (!pmd) {
600 kvm_err("Cannot allocate Hyp pmd\n");
601 return -ENOMEM;
602 }
603 pud_populate(NULL, pud, pmd);
604 get_page(virt_to_page(pud));
605 kvm_flush_dcache_to_poc(pud, sizeof(*pud));
606 }
607
608 next = pud_addr_end(addr, end);
609 ret = create_hyp_pmd_mappings(pud, addr, next, pfn, prot);
610 if (ret)
611 return ret;
612 pfn += (next - addr) >> PAGE_SHIFT;
613 } while (addr = next, addr != end);
614
615 return 0;
616}
617
6060df84
MZ
618static int __create_hyp_mappings(pgd_t *pgdp,
619 unsigned long start, unsigned long end,
620 unsigned long pfn, pgprot_t prot)
342cd0ab 621{
342cd0ab
CD
622 pgd_t *pgd;
623 pud_t *pud;
342cd0ab
CD
624 unsigned long addr, next;
625 int err = 0;
626
342cd0ab 627 mutex_lock(&kvm_hyp_pgd_mutex);
3562c76d
MZ
628 addr = start & PAGE_MASK;
629 end = PAGE_ALIGN(end);
630 do {
6060df84 631 pgd = pgdp + pgd_index(addr);
342cd0ab 632
38f791a4
CD
633 if (pgd_none(*pgd)) {
634 pud = pud_alloc_one(NULL, addr);
635 if (!pud) {
636 kvm_err("Cannot allocate Hyp pud\n");
342cd0ab
CD
637 err = -ENOMEM;
638 goto out;
639 }
38f791a4
CD
640 pgd_populate(NULL, pgd, pud);
641 get_page(virt_to_page(pgd));
642 kvm_flush_dcache_to_poc(pgd, sizeof(*pgd));
342cd0ab
CD
643 }
644
645 next = pgd_addr_end(addr, end);
38f791a4 646 err = create_hyp_pud_mappings(pgd, addr, next, pfn, prot);
342cd0ab
CD
647 if (err)
648 goto out;
6060df84 649 pfn += (next - addr) >> PAGE_SHIFT;
3562c76d 650 } while (addr = next, addr != end);
342cd0ab
CD
651out:
652 mutex_unlock(&kvm_hyp_pgd_mutex);
653 return err;
654}
655
40c2729b
CD
656static phys_addr_t kvm_kaddr_to_phys(void *kaddr)
657{
658 if (!is_vmalloc_addr(kaddr)) {
659 BUG_ON(!virt_addr_valid(kaddr));
660 return __pa(kaddr);
661 } else {
662 return page_to_phys(vmalloc_to_page(kaddr)) +
663 offset_in_page(kaddr);
664 }
665}
666
342cd0ab 667/**
06e8c3b0 668 * create_hyp_mappings - duplicate a kernel virtual address range in Hyp mode
342cd0ab
CD
669 * @from: The virtual kernel start address of the range
670 * @to: The virtual kernel end address of the range (exclusive)
c8dddecd 671 * @prot: The protection to be applied to this range
342cd0ab 672 *
06e8c3b0
MZ
673 * The same virtual address as the kernel virtual address is also used
674 * in Hyp-mode mapping (modulo HYP_PAGE_OFFSET) to the same underlying
675 * physical pages.
342cd0ab 676 */
c8dddecd 677int create_hyp_mappings(void *from, void *to, pgprot_t prot)
342cd0ab 678{
40c2729b
CD
679 phys_addr_t phys_addr;
680 unsigned long virt_addr;
6c41a413
MZ
681 unsigned long start = kern_hyp_va((unsigned long)from);
682 unsigned long end = kern_hyp_va((unsigned long)to);
6060df84 683
1e947bad
MZ
684 if (is_kernel_in_hyp_mode())
685 return 0;
686
40c2729b
CD
687 start = start & PAGE_MASK;
688 end = PAGE_ALIGN(end);
6060df84 689
40c2729b
CD
690 for (virt_addr = start; virt_addr < end; virt_addr += PAGE_SIZE) {
691 int err;
6060df84 692
40c2729b
CD
693 phys_addr = kvm_kaddr_to_phys(from + virt_addr - start);
694 err = __create_hyp_mappings(hyp_pgd, virt_addr,
695 virt_addr + PAGE_SIZE,
696 __phys_to_pfn(phys_addr),
c8dddecd 697 prot);
40c2729b
CD
698 if (err)
699 return err;
700 }
701
702 return 0;
342cd0ab
CD
703}
704
705/**
06e8c3b0
MZ
706 * create_hyp_io_mappings - duplicate a kernel IO mapping into Hyp mode
707 * @from: The kernel start VA of the range
708 * @to: The kernel end VA of the range (exclusive)
6060df84 709 * @phys_addr: The physical start address which gets mapped
06e8c3b0
MZ
710 *
711 * The resulting HYP VA is the same as the kernel VA, modulo
712 * HYP_PAGE_OFFSET.
342cd0ab 713 */
6060df84 714int create_hyp_io_mappings(void *from, void *to, phys_addr_t phys_addr)
342cd0ab 715{
6c41a413
MZ
716 unsigned long start = kern_hyp_va((unsigned long)from);
717 unsigned long end = kern_hyp_va((unsigned long)to);
6060df84 718
1e947bad
MZ
719 if (is_kernel_in_hyp_mode())
720 return 0;
721
6060df84
MZ
722 /* Check for a valid kernel IO mapping */
723 if (!is_vmalloc_addr(from) || !is_vmalloc_addr(to - 1))
724 return -EINVAL;
725
726 return __create_hyp_mappings(hyp_pgd, start, end,
727 __phys_to_pfn(phys_addr), PAGE_HYP_DEVICE);
342cd0ab
CD
728}
729
d5d8184d
CD
730/**
731 * kvm_alloc_stage2_pgd - allocate level-1 table for stage-2 translation.
732 * @kvm: The KVM struct pointer for the VM.
733 *
9d4dc688
VM
734 * Allocates only the stage-2 HW PGD level table(s) (can support either full
735 * 40-bit input addresses or limited to 32-bit input addresses). Clears the
736 * allocated pages.
d5d8184d
CD
737 *
738 * Note we don't need locking here as this is only called when the VM is
739 * created, which can only be done once.
740 */
741int kvm_alloc_stage2_pgd(struct kvm *kvm)
742{
743 pgd_t *pgd;
744
745 if (kvm->arch.pgd != NULL) {
746 kvm_err("kvm_arch already initialized?\n");
747 return -EINVAL;
748 }
749
9163ee23
SP
750 /* Allocate the HW PGD, making sure that each page gets its own refcount */
751 pgd = alloc_pages_exact(S2_PGD_SIZE, GFP_KERNEL | __GFP_ZERO);
752 if (!pgd)
a987370f
MZ
753 return -ENOMEM;
754
d5d8184d 755 kvm->arch.pgd = pgd;
d5d8184d
CD
756 return 0;
757}
758
957db105
CD
759static void stage2_unmap_memslot(struct kvm *kvm,
760 struct kvm_memory_slot *memslot)
761{
762 hva_t hva = memslot->userspace_addr;
763 phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
764 phys_addr_t size = PAGE_SIZE * memslot->npages;
765 hva_t reg_end = hva + size;
766
767 /*
768 * A memory region could potentially cover multiple VMAs, and any holes
769 * between them, so iterate over all of them to find out if we should
770 * unmap any of them.
771 *
772 * +--------------------------------------------+
773 * +---------------+----------------+ +----------------+
774 * | : VMA 1 | VMA 2 | | VMA 3 : |
775 * +---------------+----------------+ +----------------+
776 * | memory region |
777 * +--------------------------------------------+
778 */
779 do {
780 struct vm_area_struct *vma = find_vma(current->mm, hva);
781 hva_t vm_start, vm_end;
782
783 if (!vma || vma->vm_start >= reg_end)
784 break;
785
786 /*
787 * Take the intersection of this VMA with the memory region
788 */
789 vm_start = max(hva, vma->vm_start);
790 vm_end = min(reg_end, vma->vm_end);
791
792 if (!(vma->vm_flags & VM_PFNMAP)) {
793 gpa_t gpa = addr + (vm_start - memslot->userspace_addr);
794 unmap_stage2_range(kvm, gpa, vm_end - vm_start);
795 }
796 hva = vm_end;
797 } while (hva < reg_end);
798}
799
800/**
801 * stage2_unmap_vm - Unmap Stage-2 RAM mappings
802 * @kvm: The struct kvm pointer
803 *
804 * Go through the memregions and unmap any reguler RAM
805 * backing memory already mapped to the VM.
806 */
807void stage2_unmap_vm(struct kvm *kvm)
808{
809 struct kvm_memslots *slots;
810 struct kvm_memory_slot *memslot;
811 int idx;
812
813 idx = srcu_read_lock(&kvm->srcu);
3f5d9f06 814 down_read(&current->mm->mmap_sem);
957db105
CD
815 spin_lock(&kvm->mmu_lock);
816
817 slots = kvm_memslots(kvm);
818 kvm_for_each_memslot(memslot, slots)
819 stage2_unmap_memslot(kvm, memslot);
820
821 spin_unlock(&kvm->mmu_lock);
3f5d9f06 822 up_read(&current->mm->mmap_sem);
957db105
CD
823 srcu_read_unlock(&kvm->srcu, idx);
824}
825
d5d8184d
CD
826/**
827 * kvm_free_stage2_pgd - free all stage-2 tables
828 * @kvm: The KVM struct pointer for the VM.
829 *
830 * Walks the level-1 page table pointed to by kvm->arch.pgd and frees all
831 * underlying level-2 and level-3 tables before freeing the actual level-1 table
832 * and setting the struct pointer to NULL.
833 *
834 * Note we don't need locking here as this is only called when the VM is
835 * destroyed, which can only be done once.
836 */
837void kvm_free_stage2_pgd(struct kvm *kvm)
838{
839 if (kvm->arch.pgd == NULL)
840 return;
841
3c5cdffd 842 spin_lock(&kvm->mmu_lock);
d5d8184d 843 unmap_stage2_range(kvm, 0, KVM_PHYS_SIZE);
3c5cdffd
SP
844 spin_unlock(&kvm->mmu_lock);
845
9163ee23
SP
846 /* Free the HW pgd, one page at a time */
847 free_pages_exact(kvm->arch.pgd, S2_PGD_SIZE);
d5d8184d
CD
848 kvm->arch.pgd = NULL;
849}
850
38f791a4 851static pud_t *stage2_get_pud(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
ad361f09 852 phys_addr_t addr)
d5d8184d
CD
853{
854 pgd_t *pgd;
855 pud_t *pud;
d5d8184d 856
70fd1906
SP
857 pgd = kvm->arch.pgd + stage2_pgd_index(addr);
858 if (WARN_ON(stage2_pgd_none(*pgd))) {
38f791a4
CD
859 if (!cache)
860 return NULL;
861 pud = mmu_memory_cache_alloc(cache);
70fd1906 862 stage2_pgd_populate(pgd, pud);
38f791a4
CD
863 get_page(virt_to_page(pgd));
864 }
865
70fd1906 866 return stage2_pud_offset(pgd, addr);
38f791a4
CD
867}
868
869static pmd_t *stage2_get_pmd(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
870 phys_addr_t addr)
871{
872 pud_t *pud;
873 pmd_t *pmd;
874
875 pud = stage2_get_pud(kvm, cache, addr);
70fd1906 876 if (stage2_pud_none(*pud)) {
d5d8184d 877 if (!cache)
ad361f09 878 return NULL;
d5d8184d 879 pmd = mmu_memory_cache_alloc(cache);
70fd1906 880 stage2_pud_populate(pud, pmd);
d5d8184d 881 get_page(virt_to_page(pud));
c62ee2b2
MZ
882 }
883
70fd1906 884 return stage2_pmd_offset(pud, addr);
ad361f09
CD
885}
886
887static int stage2_set_pmd_huge(struct kvm *kvm, struct kvm_mmu_memory_cache
888 *cache, phys_addr_t addr, const pmd_t *new_pmd)
889{
890 pmd_t *pmd, old_pmd;
891
892 pmd = stage2_get_pmd(kvm, cache, addr);
893 VM_BUG_ON(!pmd);
d5d8184d 894
ad361f09
CD
895 /*
896 * Mapping in huge pages should only happen through a fault. If a
897 * page is merged into a transparent huge page, the individual
898 * subpages of that huge page should be unmapped through MMU
899 * notifiers before we get here.
900 *
901 * Merging of CompoundPages is not supported; they should become
902 * splitting first, unmapped, merged, and mapped back in on-demand.
903 */
904 VM_BUG_ON(pmd_present(*pmd) && pmd_pfn(*pmd) != pmd_pfn(*new_pmd));
905
906 old_pmd = *pmd;
d4b9e079
MZ
907 if (pmd_present(old_pmd)) {
908 pmd_clear(pmd);
ad361f09 909 kvm_tlb_flush_vmid_ipa(kvm, addr);
d4b9e079 910 } else {
ad361f09 911 get_page(virt_to_page(pmd));
d4b9e079
MZ
912 }
913
914 kvm_set_pmd(pmd, *new_pmd);
ad361f09
CD
915 return 0;
916}
917
918static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
15a49a44
MS
919 phys_addr_t addr, const pte_t *new_pte,
920 unsigned long flags)
ad361f09
CD
921{
922 pmd_t *pmd;
923 pte_t *pte, old_pte;
15a49a44
MS
924 bool iomap = flags & KVM_S2PTE_FLAG_IS_IOMAP;
925 bool logging_active = flags & KVM_S2_FLAG_LOGGING_ACTIVE;
926
927 VM_BUG_ON(logging_active && !cache);
ad361f09 928
38f791a4 929 /* Create stage-2 page table mapping - Levels 0 and 1 */
ad361f09
CD
930 pmd = stage2_get_pmd(kvm, cache, addr);
931 if (!pmd) {
932 /*
933 * Ignore calls from kvm_set_spte_hva for unallocated
934 * address ranges.
935 */
936 return 0;
937 }
938
15a49a44
MS
939 /*
940 * While dirty page logging - dissolve huge PMD, then continue on to
941 * allocate page.
942 */
943 if (logging_active)
944 stage2_dissolve_pmd(kvm, addr, pmd);
945
ad361f09 946 /* Create stage-2 page mappings - Level 2 */
d5d8184d
CD
947 if (pmd_none(*pmd)) {
948 if (!cache)
949 return 0; /* ignore calls from kvm_set_spte_hva */
950 pte = mmu_memory_cache_alloc(cache);
d5d8184d 951 pmd_populate_kernel(NULL, pmd, pte);
d5d8184d 952 get_page(virt_to_page(pmd));
c62ee2b2
MZ
953 }
954
955 pte = pte_offset_kernel(pmd, addr);
d5d8184d
CD
956
957 if (iomap && pte_present(*pte))
958 return -EFAULT;
959
960 /* Create 2nd stage page table mapping - Level 3 */
961 old_pte = *pte;
d4b9e079
MZ
962 if (pte_present(old_pte)) {
963 kvm_set_pte(pte, __pte(0));
48762767 964 kvm_tlb_flush_vmid_ipa(kvm, addr);
d4b9e079 965 } else {
d5d8184d 966 get_page(virt_to_page(pte));
d4b9e079 967 }
d5d8184d 968
d4b9e079 969 kvm_set_pte(pte, *new_pte);
d5d8184d
CD
970 return 0;
971}
d5d8184d 972
06485053
CM
973#ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
974static int stage2_ptep_test_and_clear_young(pte_t *pte)
975{
976 if (pte_young(*pte)) {
977 *pte = pte_mkold(*pte);
978 return 1;
979 }
d5d8184d
CD
980 return 0;
981}
06485053
CM
982#else
983static int stage2_ptep_test_and_clear_young(pte_t *pte)
984{
985 return __ptep_test_and_clear_young(pte);
986}
987#endif
988
989static int stage2_pmdp_test_and_clear_young(pmd_t *pmd)
990{
991 return stage2_ptep_test_and_clear_young((pte_t *)pmd);
992}
d5d8184d
CD
993
994/**
995 * kvm_phys_addr_ioremap - map a device range to guest IPA
996 *
997 * @kvm: The KVM pointer
998 * @guest_ipa: The IPA at which to insert the mapping
999 * @pa: The physical address of the device
1000 * @size: The size of the mapping
1001 */
1002int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
c40f2f8f 1003 phys_addr_t pa, unsigned long size, bool writable)
d5d8184d
CD
1004{
1005 phys_addr_t addr, end;
1006 int ret = 0;
1007 unsigned long pfn;
1008 struct kvm_mmu_memory_cache cache = { 0, };
1009
1010 end = (guest_ipa + size + PAGE_SIZE - 1) & PAGE_MASK;
1011 pfn = __phys_to_pfn(pa);
1012
1013 for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) {
c62ee2b2 1014 pte_t pte = pfn_pte(pfn, PAGE_S2_DEVICE);
d5d8184d 1015
c40f2f8f 1016 if (writable)
06485053 1017 pte = kvm_s2pte_mkwrite(pte);
c40f2f8f 1018
38f791a4
CD
1019 ret = mmu_topup_memory_cache(&cache, KVM_MMU_CACHE_MIN_PAGES,
1020 KVM_NR_MEM_OBJS);
d5d8184d
CD
1021 if (ret)
1022 goto out;
1023 spin_lock(&kvm->mmu_lock);
15a49a44
MS
1024 ret = stage2_set_pte(kvm, &cache, addr, &pte,
1025 KVM_S2PTE_FLAG_IS_IOMAP);
d5d8184d
CD
1026 spin_unlock(&kvm->mmu_lock);
1027 if (ret)
1028 goto out;
1029
1030 pfn++;
1031 }
1032
1033out:
1034 mmu_free_memory_cache(&cache);
1035 return ret;
1036}
1037
ba049e93 1038static bool transparent_hugepage_adjust(kvm_pfn_t *pfnp, phys_addr_t *ipap)
9b5fdb97 1039{
ba049e93 1040 kvm_pfn_t pfn = *pfnp;
9b5fdb97
CD
1041 gfn_t gfn = *ipap >> PAGE_SHIFT;
1042
127393fb 1043 if (PageTransCompoundMap(pfn_to_page(pfn))) {
9b5fdb97
CD
1044 unsigned long mask;
1045 /*
1046 * The address we faulted on is backed by a transparent huge
1047 * page. However, because we map the compound huge page and
1048 * not the individual tail page, we need to transfer the
1049 * refcount to the head page. We have to be careful that the
1050 * THP doesn't start to split while we are adjusting the
1051 * refcounts.
1052 *
1053 * We are sure this doesn't happen, because mmu_notifier_retry
1054 * was successful and we are holding the mmu_lock, so if this
1055 * THP is trying to split, it will be blocked in the mmu
1056 * notifier before touching any of the pages, specifically
1057 * before being able to call __split_huge_page_refcount().
1058 *
1059 * We can therefore safely transfer the refcount from PG_tail
1060 * to PG_head and switch the pfn from a tail page to the head
1061 * page accordingly.
1062 */
1063 mask = PTRS_PER_PMD - 1;
1064 VM_BUG_ON((gfn & mask) != (pfn & mask));
1065 if (pfn & mask) {
1066 *ipap &= PMD_MASK;
1067 kvm_release_pfn_clean(pfn);
1068 pfn &= ~mask;
1069 kvm_get_pfn(pfn);
1070 *pfnp = pfn;
1071 }
1072
1073 return true;
1074 }
1075
1076 return false;
1077}
1078
a7d079ce
AB
1079static bool kvm_is_write_fault(struct kvm_vcpu *vcpu)
1080{
1081 if (kvm_vcpu_trap_is_iabt(vcpu))
1082 return false;
1083
1084 return kvm_vcpu_dabt_iswrite(vcpu);
1085}
1086
c6473555
MS
1087/**
1088 * stage2_wp_ptes - write protect PMD range
1089 * @pmd: pointer to pmd entry
1090 * @addr: range start address
1091 * @end: range end address
1092 */
1093static void stage2_wp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end)
1094{
1095 pte_t *pte;
1096
1097 pte = pte_offset_kernel(pmd, addr);
1098 do {
1099 if (!pte_none(*pte)) {
1100 if (!kvm_s2pte_readonly(pte))
1101 kvm_set_s2pte_readonly(pte);
1102 }
1103 } while (pte++, addr += PAGE_SIZE, addr != end);
1104}
1105
1106/**
1107 * stage2_wp_pmds - write protect PUD range
1108 * @pud: pointer to pud entry
1109 * @addr: range start address
1110 * @end: range end address
1111 */
1112static void stage2_wp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end)
1113{
1114 pmd_t *pmd;
1115 phys_addr_t next;
1116
70fd1906 1117 pmd = stage2_pmd_offset(pud, addr);
c6473555
MS
1118
1119 do {
70fd1906 1120 next = stage2_pmd_addr_end(addr, end);
c6473555 1121 if (!pmd_none(*pmd)) {
bbb3b6b3 1122 if (pmd_thp_or_huge(*pmd)) {
c6473555
MS
1123 if (!kvm_s2pmd_readonly(pmd))
1124 kvm_set_s2pmd_readonly(pmd);
1125 } else {
1126 stage2_wp_ptes(pmd, addr, next);
1127 }
1128 }
1129 } while (pmd++, addr = next, addr != end);
1130}
1131
1132/**
1133 * stage2_wp_puds - write protect PGD range
1134 * @pgd: pointer to pgd entry
1135 * @addr: range start address
1136 * @end: range end address
1137 *
1138 * Process PUD entries, for a huge PUD we cause a panic.
1139 */
1140static void stage2_wp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end)
1141{
1142 pud_t *pud;
1143 phys_addr_t next;
1144
70fd1906 1145 pud = stage2_pud_offset(pgd, addr);
c6473555 1146 do {
70fd1906
SP
1147 next = stage2_pud_addr_end(addr, end);
1148 if (!stage2_pud_none(*pud)) {
c6473555 1149 /* TODO:PUD not supported, revisit later if supported */
70fd1906 1150 BUG_ON(stage2_pud_huge(*pud));
c6473555
MS
1151 stage2_wp_pmds(pud, addr, next);
1152 }
1153 } while (pud++, addr = next, addr != end);
1154}
1155
1156/**
1157 * stage2_wp_range() - write protect stage2 memory region range
1158 * @kvm: The KVM pointer
1159 * @addr: Start address of range
1160 * @end: End address of range
1161 */
1162static void stage2_wp_range(struct kvm *kvm, phys_addr_t addr, phys_addr_t end)
1163{
1164 pgd_t *pgd;
1165 phys_addr_t next;
1166
70fd1906 1167 pgd = kvm->arch.pgd + stage2_pgd_index(addr);
c6473555
MS
1168 do {
1169 /*
1170 * Release kvm_mmu_lock periodically if the memory region is
1171 * large. Otherwise, we may see kernel panics with
227ea818
CD
1172 * CONFIG_DETECT_HUNG_TASK, CONFIG_LOCKUP_DETECTOR,
1173 * CONFIG_LOCKDEP. Additionally, holding the lock too long
c6473555
MS
1174 * will also starve other vCPUs.
1175 */
1176 if (need_resched() || spin_needbreak(&kvm->mmu_lock))
1177 cond_resched_lock(&kvm->mmu_lock);
1178
70fd1906
SP
1179 next = stage2_pgd_addr_end(addr, end);
1180 if (stage2_pgd_present(*pgd))
c6473555
MS
1181 stage2_wp_puds(pgd, addr, next);
1182 } while (pgd++, addr = next, addr != end);
1183}
1184
1185/**
1186 * kvm_mmu_wp_memory_region() - write protect stage 2 entries for memory slot
1187 * @kvm: The KVM pointer
1188 * @slot: The memory slot to write protect
1189 *
1190 * Called to start logging dirty pages after memory region
1191 * KVM_MEM_LOG_DIRTY_PAGES operation is called. After this function returns
1192 * all present PMD and PTEs are write protected in the memory region.
1193 * Afterwards read of dirty page log can be called.
1194 *
1195 * Acquires kvm_mmu_lock. Called with kvm->slots_lock mutex acquired,
1196 * serializing operations for VM memory regions.
1197 */
1198void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot)
1199{
9f6b8029
PB
1200 struct kvm_memslots *slots = kvm_memslots(kvm);
1201 struct kvm_memory_slot *memslot = id_to_memslot(slots, slot);
c6473555
MS
1202 phys_addr_t start = memslot->base_gfn << PAGE_SHIFT;
1203 phys_addr_t end = (memslot->base_gfn + memslot->npages) << PAGE_SHIFT;
1204
1205 spin_lock(&kvm->mmu_lock);
1206 stage2_wp_range(kvm, start, end);
1207 spin_unlock(&kvm->mmu_lock);
1208 kvm_flush_remote_tlbs(kvm);
1209}
53c810c3
MS
1210
1211/**
3b0f1d01 1212 * kvm_mmu_write_protect_pt_masked() - write protect dirty pages
53c810c3
MS
1213 * @kvm: The KVM pointer
1214 * @slot: The memory slot associated with mask
1215 * @gfn_offset: The gfn offset in memory slot
1216 * @mask: The mask of dirty pages at offset 'gfn_offset' in this memory
1217 * slot to be write protected
1218 *
1219 * Walks bits set in mask write protects the associated pte's. Caller must
1220 * acquire kvm_mmu_lock.
1221 */
3b0f1d01 1222static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
53c810c3
MS
1223 struct kvm_memory_slot *slot,
1224 gfn_t gfn_offset, unsigned long mask)
1225{
1226 phys_addr_t base_gfn = slot->base_gfn + gfn_offset;
1227 phys_addr_t start = (base_gfn + __ffs(mask)) << PAGE_SHIFT;
1228 phys_addr_t end = (base_gfn + __fls(mask) + 1) << PAGE_SHIFT;
1229
1230 stage2_wp_range(kvm, start, end);
1231}
c6473555 1232
3b0f1d01
KH
1233/*
1234 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1235 * dirty pages.
1236 *
1237 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1238 * enable dirty logging for them.
1239 */
1240void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
1241 struct kvm_memory_slot *slot,
1242 gfn_t gfn_offset, unsigned long mask)
1243{
1244 kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
1245}
1246
ba049e93 1247static void coherent_cache_guest_page(struct kvm_vcpu *vcpu, kvm_pfn_t pfn,
0d3e4d4f
MZ
1248 unsigned long size, bool uncached)
1249{
1250 __coherent_cache_guest_page(vcpu, pfn, size, uncached);
1251}
1252
94f8e641 1253static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
98047888 1254 struct kvm_memory_slot *memslot, unsigned long hva,
94f8e641
CD
1255 unsigned long fault_status)
1256{
94f8e641 1257 int ret;
9b5fdb97 1258 bool write_fault, writable, hugetlb = false, force_pte = false;
94f8e641 1259 unsigned long mmu_seq;
ad361f09 1260 gfn_t gfn = fault_ipa >> PAGE_SHIFT;
ad361f09 1261 struct kvm *kvm = vcpu->kvm;
94f8e641 1262 struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache;
ad361f09 1263 struct vm_area_struct *vma;
ba049e93 1264 kvm_pfn_t pfn;
b8865767 1265 pgprot_t mem_type = PAGE_S2;
840f4bfb 1266 bool fault_ipa_uncached;
15a49a44
MS
1267 bool logging_active = memslot_is_logging(memslot);
1268 unsigned long flags = 0;
94f8e641 1269
a7d079ce 1270 write_fault = kvm_is_write_fault(vcpu);
94f8e641
CD
1271 if (fault_status == FSC_PERM && !write_fault) {
1272 kvm_err("Unexpected L2 read permission error\n");
1273 return -EFAULT;
1274 }
1275
ad361f09
CD
1276 /* Let's check if we will get back a huge page backed by hugetlbfs */
1277 down_read(&current->mm->mmap_sem);
1278 vma = find_vma_intersection(current->mm, hva, hva + 1);
37b54408
AB
1279 if (unlikely(!vma)) {
1280 kvm_err("Failed to find VMA for hva 0x%lx\n", hva);
1281 up_read(&current->mm->mmap_sem);
1282 return -EFAULT;
1283 }
1284
15a49a44 1285 if (is_vm_hugetlb_page(vma) && !logging_active) {
ad361f09
CD
1286 hugetlb = true;
1287 gfn = (fault_ipa & PMD_MASK) >> PAGE_SHIFT;
9b5fdb97
CD
1288 } else {
1289 /*
136d737f
MZ
1290 * Pages belonging to memslots that don't have the same
1291 * alignment for userspace and IPA cannot be mapped using
1292 * block descriptors even if the pages belong to a THP for
1293 * the process, because the stage-2 block descriptor will
1294 * cover more than a single THP and we loose atomicity for
1295 * unmapping, updates, and splits of the THP or other pages
1296 * in the stage-2 block range.
9b5fdb97 1297 */
136d737f
MZ
1298 if ((memslot->userspace_addr & ~PMD_MASK) !=
1299 ((memslot->base_gfn << PAGE_SHIFT) & ~PMD_MASK))
9b5fdb97 1300 force_pte = true;
ad361f09
CD
1301 }
1302 up_read(&current->mm->mmap_sem);
1303
94f8e641 1304 /* We need minimum second+third level pages */
38f791a4
CD
1305 ret = mmu_topup_memory_cache(memcache, KVM_MMU_CACHE_MIN_PAGES,
1306 KVM_NR_MEM_OBJS);
94f8e641
CD
1307 if (ret)
1308 return ret;
1309
1310 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1311 /*
1312 * Ensure the read of mmu_notifier_seq happens before we call
1313 * gfn_to_pfn_prot (which calls get_user_pages), so that we don't risk
1314 * the page we just got a reference to gets unmapped before we have a
1315 * chance to grab the mmu_lock, which ensure that if the page gets
1316 * unmapped afterwards, the call to kvm_unmap_hva will take it away
1317 * from us again properly. This smp_rmb() interacts with the smp_wmb()
1318 * in kvm_mmu_notifier_invalidate_<page|range_end>.
1319 */
1320 smp_rmb();
1321
ad361f09 1322 pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &writable);
9ac71595 1323 if (is_error_noslot_pfn(pfn))
94f8e641
CD
1324 return -EFAULT;
1325
15a49a44 1326 if (kvm_is_device_pfn(pfn)) {
b8865767 1327 mem_type = PAGE_S2_DEVICE;
15a49a44
MS
1328 flags |= KVM_S2PTE_FLAG_IS_IOMAP;
1329 } else if (logging_active) {
1330 /*
1331 * Faults on pages in a memslot with logging enabled
1332 * should not be mapped with huge pages (it introduces churn
1333 * and performance degradation), so force a pte mapping.
1334 */
1335 force_pte = true;
1336 flags |= KVM_S2_FLAG_LOGGING_ACTIVE;
1337
1338 /*
1339 * Only actually map the page as writable if this was a write
1340 * fault.
1341 */
1342 if (!write_fault)
1343 writable = false;
1344 }
b8865767 1345
ad361f09
CD
1346 spin_lock(&kvm->mmu_lock);
1347 if (mmu_notifier_retry(kvm, mmu_seq))
94f8e641 1348 goto out_unlock;
15a49a44 1349
9b5fdb97
CD
1350 if (!hugetlb && !force_pte)
1351 hugetlb = transparent_hugepage_adjust(&pfn, &fault_ipa);
ad361f09 1352
849260c7 1353 fault_ipa_uncached = memslot->flags & KVM_MEMSLOT_INCOHERENT;
840f4bfb 1354
ad361f09 1355 if (hugetlb) {
b8865767 1356 pmd_t new_pmd = pfn_pmd(pfn, mem_type);
ad361f09
CD
1357 new_pmd = pmd_mkhuge(new_pmd);
1358 if (writable) {
06485053 1359 new_pmd = kvm_s2pmd_mkwrite(new_pmd);
ad361f09
CD
1360 kvm_set_pfn_dirty(pfn);
1361 }
0d3e4d4f 1362 coherent_cache_guest_page(vcpu, pfn, PMD_SIZE, fault_ipa_uncached);
ad361f09
CD
1363 ret = stage2_set_pmd_huge(kvm, memcache, fault_ipa, &new_pmd);
1364 } else {
b8865767 1365 pte_t new_pte = pfn_pte(pfn, mem_type);
15a49a44 1366
ad361f09 1367 if (writable) {
06485053 1368 new_pte = kvm_s2pte_mkwrite(new_pte);
ad361f09 1369 kvm_set_pfn_dirty(pfn);
15a49a44 1370 mark_page_dirty(kvm, gfn);
ad361f09 1371 }
0d3e4d4f 1372 coherent_cache_guest_page(vcpu, pfn, PAGE_SIZE, fault_ipa_uncached);
15a49a44 1373 ret = stage2_set_pte(kvm, memcache, fault_ipa, &new_pte, flags);
94f8e641 1374 }
ad361f09 1375
94f8e641 1376out_unlock:
ad361f09 1377 spin_unlock(&kvm->mmu_lock);
35307b9a 1378 kvm_set_pfn_accessed(pfn);
94f8e641 1379 kvm_release_pfn_clean(pfn);
ad361f09 1380 return ret;
94f8e641
CD
1381}
1382
aeda9130
MZ
1383/*
1384 * Resolve the access fault by making the page young again.
1385 * Note that because the faulting entry is guaranteed not to be
1386 * cached in the TLB, we don't need to invalidate anything.
06485053
CM
1387 * Only the HW Access Flag updates are supported for Stage 2 (no DBM),
1388 * so there is no need for atomic (pte|pmd)_mkyoung operations.
aeda9130
MZ
1389 */
1390static void handle_access_fault(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa)
1391{
1392 pmd_t *pmd;
1393 pte_t *pte;
ba049e93 1394 kvm_pfn_t pfn;
aeda9130
MZ
1395 bool pfn_valid = false;
1396
1397 trace_kvm_access_fault(fault_ipa);
1398
1399 spin_lock(&vcpu->kvm->mmu_lock);
1400
1401 pmd = stage2_get_pmd(vcpu->kvm, NULL, fault_ipa);
1402 if (!pmd || pmd_none(*pmd)) /* Nothing there */
1403 goto out;
1404
bbb3b6b3 1405 if (pmd_thp_or_huge(*pmd)) { /* THP, HugeTLB */
aeda9130
MZ
1406 *pmd = pmd_mkyoung(*pmd);
1407 pfn = pmd_pfn(*pmd);
1408 pfn_valid = true;
1409 goto out;
1410 }
1411
1412 pte = pte_offset_kernel(pmd, fault_ipa);
1413 if (pte_none(*pte)) /* Nothing there either */
1414 goto out;
1415
1416 *pte = pte_mkyoung(*pte); /* Just a page... */
1417 pfn = pte_pfn(*pte);
1418 pfn_valid = true;
1419out:
1420 spin_unlock(&vcpu->kvm->mmu_lock);
1421 if (pfn_valid)
1422 kvm_set_pfn_accessed(pfn);
1423}
1424
6633b457
TB
1425static bool is_abort_sea(unsigned long fault_status)
1426{
1427 switch (fault_status) {
1428 case FSC_SEA:
1429 case FSC_SEA_TTW0:
1430 case FSC_SEA_TTW1:
1431 case FSC_SEA_TTW2:
1432 case FSC_SEA_TTW3:
1433 case FSC_SECC:
1434 case FSC_SECC_TTW0:
1435 case FSC_SECC_TTW1:
1436 case FSC_SECC_TTW2:
1437 case FSC_SECC_TTW3:
1438 return true;
1439 default:
1440 return false;
1441 }
1442}
1443
94f8e641
CD
1444/**
1445 * kvm_handle_guest_abort - handles all 2nd stage aborts
1446 * @vcpu: the VCPU pointer
1447 * @run: the kvm_run structure
1448 *
1449 * Any abort that gets to the host is almost guaranteed to be caused by a
1450 * missing second stage translation table entry, which can mean that either the
1451 * guest simply needs more memory and we must allocate an appropriate page or it
1452 * can mean that the guest tried to access I/O memory, which is emulated by user
1453 * space. The distinction is based on the IPA causing the fault and whether this
1454 * memory region has been registered as standard RAM by user space.
1455 */
342cd0ab
CD
1456int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run)
1457{
94f8e641
CD
1458 unsigned long fault_status;
1459 phys_addr_t fault_ipa;
1460 struct kvm_memory_slot *memslot;
98047888
CD
1461 unsigned long hva;
1462 bool is_iabt, write_fault, writable;
94f8e641
CD
1463 gfn_t gfn;
1464 int ret, idx;
1465
6633b457
TB
1466 fault_status = kvm_vcpu_trap_get_fault_type(vcpu);
1467
1468 fault_ipa = kvm_vcpu_get_fault_ipa(vcpu);
1469
1470 /*
1471 * The host kernel will handle the synchronous external abort. There
1472 * is no need to pass the error into the guest.
1473 */
1474 if (is_abort_sea(fault_status)) {
1475 if (!handle_guest_sea(fault_ipa, kvm_vcpu_get_hsr(vcpu)))
1476 return 1;
1477 }
1478
52d1dba9 1479 is_iabt = kvm_vcpu_trap_is_iabt(vcpu);
4055710b
MZ
1480 if (unlikely(!is_iabt && kvm_vcpu_dabt_isextabt(vcpu))) {
1481 kvm_inject_vabt(vcpu);
1482 return 1;
1483 }
1484
7393b599
MZ
1485 trace_kvm_guest_fault(*vcpu_pc(vcpu), kvm_vcpu_get_hsr(vcpu),
1486 kvm_vcpu_get_hfar(vcpu), fault_ipa);
94f8e641
CD
1487
1488 /* Check the stage-2 fault is trans. fault or write fault */
35307b9a
MZ
1489 if (fault_status != FSC_FAULT && fault_status != FSC_PERM &&
1490 fault_status != FSC_ACCESS) {
0496daa5
CD
1491 kvm_err("Unsupported FSC: EC=%#x xFSC=%#lx ESR_EL2=%#lx\n",
1492 kvm_vcpu_trap_get_class(vcpu),
1493 (unsigned long)kvm_vcpu_trap_get_fault(vcpu),
1494 (unsigned long)kvm_vcpu_get_hsr(vcpu));
94f8e641
CD
1495 return -EFAULT;
1496 }
1497
1498 idx = srcu_read_lock(&vcpu->kvm->srcu);
1499
1500 gfn = fault_ipa >> PAGE_SHIFT;
98047888
CD
1501 memslot = gfn_to_memslot(vcpu->kvm, gfn);
1502 hva = gfn_to_hva_memslot_prot(memslot, gfn, &writable);
a7d079ce 1503 write_fault = kvm_is_write_fault(vcpu);
98047888 1504 if (kvm_is_error_hva(hva) || (write_fault && !writable)) {
94f8e641
CD
1505 if (is_iabt) {
1506 /* Prefetch Abort on I/O address */
7393b599 1507 kvm_inject_pabt(vcpu, kvm_vcpu_get_hfar(vcpu));
94f8e641
CD
1508 ret = 1;
1509 goto out_unlock;
1510 }
1511
57c841f1
MZ
1512 /*
1513 * Check for a cache maintenance operation. Since we
1514 * ended-up here, we know it is outside of any memory
1515 * slot. But we can't find out if that is for a device,
1516 * or if the guest is just being stupid. The only thing
1517 * we know for sure is that this range cannot be cached.
1518 *
1519 * So let's assume that the guest is just being
1520 * cautious, and skip the instruction.
1521 */
1522 if (kvm_vcpu_dabt_is_cm(vcpu)) {
1523 kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
1524 ret = 1;
1525 goto out_unlock;
1526 }
1527
cfe3950c
MZ
1528 /*
1529 * The IPA is reported as [MAX:12], so we need to
1530 * complement it with the bottom 12 bits from the
1531 * faulting VA. This is always 12 bits, irrespective
1532 * of the page size.
1533 */
1534 fault_ipa |= kvm_vcpu_get_hfar(vcpu) & ((1 << 12) - 1);
45e96ea6 1535 ret = io_mem_abort(vcpu, run, fault_ipa);
94f8e641
CD
1536 goto out_unlock;
1537 }
1538
c3058d5d
CD
1539 /* Userspace should not be able to register out-of-bounds IPAs */
1540 VM_BUG_ON(fault_ipa >= KVM_PHYS_SIZE);
1541
aeda9130
MZ
1542 if (fault_status == FSC_ACCESS) {
1543 handle_access_fault(vcpu, fault_ipa);
1544 ret = 1;
1545 goto out_unlock;
1546 }
1547
98047888 1548 ret = user_mem_abort(vcpu, fault_ipa, memslot, hva, fault_status);
94f8e641
CD
1549 if (ret == 0)
1550 ret = 1;
1551out_unlock:
1552 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1553 return ret;
342cd0ab
CD
1554}
1555
1d2ebacc
MZ
1556static int handle_hva_to_gpa(struct kvm *kvm,
1557 unsigned long start,
1558 unsigned long end,
1559 int (*handler)(struct kvm *kvm,
1560 gpa_t gpa, void *data),
1561 void *data)
d5d8184d
CD
1562{
1563 struct kvm_memslots *slots;
1564 struct kvm_memory_slot *memslot;
1d2ebacc 1565 int ret = 0;
d5d8184d
CD
1566
1567 slots = kvm_memslots(kvm);
1568
1569 /* we only care about the pages that the guest sees */
1570 kvm_for_each_memslot(memslot, slots) {
1571 unsigned long hva_start, hva_end;
1572 gfn_t gfn, gfn_end;
1573
1574 hva_start = max(start, memslot->userspace_addr);
1575 hva_end = min(end, memslot->userspace_addr +
1576 (memslot->npages << PAGE_SHIFT));
1577 if (hva_start >= hva_end)
1578 continue;
1579
1580 /*
1581 * {gfn(page) | page intersects with [hva_start, hva_end)} =
1582 * {gfn_start, gfn_start+1, ..., gfn_end-1}.
1583 */
1584 gfn = hva_to_gfn_memslot(hva_start, memslot);
1585 gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
1586
1587 for (; gfn < gfn_end; ++gfn) {
1588 gpa_t gpa = gfn << PAGE_SHIFT;
1d2ebacc 1589 ret |= handler(kvm, gpa, data);
d5d8184d
CD
1590 }
1591 }
1d2ebacc
MZ
1592
1593 return ret;
d5d8184d
CD
1594}
1595
1d2ebacc 1596static int kvm_unmap_hva_handler(struct kvm *kvm, gpa_t gpa, void *data)
d5d8184d
CD
1597{
1598 unmap_stage2_range(kvm, gpa, PAGE_SIZE);
1d2ebacc 1599 return 0;
d5d8184d
CD
1600}
1601
1602int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
1603{
1604 unsigned long end = hva + PAGE_SIZE;
1605
1606 if (!kvm->arch.pgd)
1607 return 0;
1608
1609 trace_kvm_unmap_hva(hva);
1610 handle_hva_to_gpa(kvm, hva, end, &kvm_unmap_hva_handler, NULL);
1611 return 0;
1612}
1613
1614int kvm_unmap_hva_range(struct kvm *kvm,
1615 unsigned long start, unsigned long end)
1616{
1617 if (!kvm->arch.pgd)
1618 return 0;
1619
1620 trace_kvm_unmap_hva_range(start, end);
1621 handle_hva_to_gpa(kvm, start, end, &kvm_unmap_hva_handler, NULL);
1622 return 0;
1623}
1624
1d2ebacc 1625static int kvm_set_spte_handler(struct kvm *kvm, gpa_t gpa, void *data)
d5d8184d
CD
1626{
1627 pte_t *pte = (pte_t *)data;
1628
15a49a44
MS
1629 /*
1630 * We can always call stage2_set_pte with KVM_S2PTE_FLAG_LOGGING_ACTIVE
1631 * flag clear because MMU notifiers will have unmapped a huge PMD before
1632 * calling ->change_pte() (which in turn calls kvm_set_spte_hva()) and
1633 * therefore stage2_set_pte() never needs to clear out a huge PMD
1634 * through this calling path.
1635 */
1636 stage2_set_pte(kvm, NULL, gpa, pte, 0);
1d2ebacc 1637 return 0;
d5d8184d
CD
1638}
1639
1640
1641void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
1642{
1643 unsigned long end = hva + PAGE_SIZE;
1644 pte_t stage2_pte;
1645
1646 if (!kvm->arch.pgd)
1647 return;
1648
1649 trace_kvm_set_spte_hva(hva);
1650 stage2_pte = pfn_pte(pte_pfn(pte), PAGE_S2);
1651 handle_hva_to_gpa(kvm, hva, end, &kvm_set_spte_handler, &stage2_pte);
1652}
1653
35307b9a
MZ
1654static int kvm_age_hva_handler(struct kvm *kvm, gpa_t gpa, void *data)
1655{
1656 pmd_t *pmd;
1657 pte_t *pte;
1658
1659 pmd = stage2_get_pmd(kvm, NULL, gpa);
1660 if (!pmd || pmd_none(*pmd)) /* Nothing there */
1661 return 0;
1662
06485053
CM
1663 if (pmd_thp_or_huge(*pmd)) /* THP, HugeTLB */
1664 return stage2_pmdp_test_and_clear_young(pmd);
35307b9a
MZ
1665
1666 pte = pte_offset_kernel(pmd, gpa);
1667 if (pte_none(*pte))
1668 return 0;
1669
06485053 1670 return stage2_ptep_test_and_clear_young(pte);
35307b9a
MZ
1671}
1672
1673static int kvm_test_age_hva_handler(struct kvm *kvm, gpa_t gpa, void *data)
1674{
1675 pmd_t *pmd;
1676 pte_t *pte;
1677
1678 pmd = stage2_get_pmd(kvm, NULL, gpa);
1679 if (!pmd || pmd_none(*pmd)) /* Nothing there */
1680 return 0;
1681
bbb3b6b3 1682 if (pmd_thp_or_huge(*pmd)) /* THP, HugeTLB */
35307b9a
MZ
1683 return pmd_young(*pmd);
1684
1685 pte = pte_offset_kernel(pmd, gpa);
1686 if (!pte_none(*pte)) /* Just a page... */
1687 return pte_young(*pte);
1688
1689 return 0;
1690}
1691
1692int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
1693{
1694 trace_kvm_age_hva(start, end);
1695 return handle_hva_to_gpa(kvm, start, end, kvm_age_hva_handler, NULL);
1696}
1697
1698int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
1699{
1700 trace_kvm_test_age_hva(hva);
1701 return handle_hva_to_gpa(kvm, hva, hva, kvm_test_age_hva_handler, NULL);
1702}
1703
d5d8184d
CD
1704void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu)
1705{
1706 mmu_free_memory_cache(&vcpu->arch.mmu_page_cache);
1707}
1708
342cd0ab
CD
1709phys_addr_t kvm_mmu_get_httbr(void)
1710{
e4c5a685
AB
1711 if (__kvm_cpu_uses_extended_idmap())
1712 return virt_to_phys(merged_hyp_pgd);
1713 else
1714 return virt_to_phys(hyp_pgd);
342cd0ab
CD
1715}
1716
5a677ce0
MZ
1717phys_addr_t kvm_get_idmap_vector(void)
1718{
1719 return hyp_idmap_vector;
1720}
1721
67f69197
AT
1722phys_addr_t kvm_get_idmap_start(void)
1723{
1724 return hyp_idmap_start;
1725}
1726
0535a3e2
MZ
1727static int kvm_map_idmap_text(pgd_t *pgd)
1728{
1729 int err;
1730
1731 /* Create the idmap in the boot page tables */
1732 err = __create_hyp_mappings(pgd,
1733 hyp_idmap_start, hyp_idmap_end,
1734 __phys_to_pfn(hyp_idmap_start),
1735 PAGE_HYP_EXEC);
1736 if (err)
1737 kvm_err("Failed to idmap %lx-%lx\n",
1738 hyp_idmap_start, hyp_idmap_end);
1739
1740 return err;
1741}
1742
342cd0ab
CD
1743int kvm_mmu_init(void)
1744{
2fb41059
MZ
1745 int err;
1746
4fda342c
SS
1747 hyp_idmap_start = kvm_virt_to_phys(__hyp_idmap_text_start);
1748 hyp_idmap_end = kvm_virt_to_phys(__hyp_idmap_text_end);
1749 hyp_idmap_vector = kvm_virt_to_phys(__kvm_hyp_init);
5a677ce0 1750
06f75a1f
AB
1751 /*
1752 * We rely on the linker script to ensure at build time that the HYP
1753 * init code does not cross a page boundary.
1754 */
1755 BUG_ON((hyp_idmap_start ^ (hyp_idmap_end - 1)) & PAGE_MASK);
5a677ce0 1756
eac378a9
MZ
1757 kvm_info("IDMAP page: %lx\n", hyp_idmap_start);
1758 kvm_info("HYP VA range: %lx:%lx\n",
6c41a413 1759 kern_hyp_va(PAGE_OFFSET), kern_hyp_va(~0UL));
eac378a9 1760
6c41a413 1761 if (hyp_idmap_start >= kern_hyp_va(PAGE_OFFSET) &&
d2896d4b
MZ
1762 hyp_idmap_start < kern_hyp_va(~0UL) &&
1763 hyp_idmap_start != (unsigned long)__hyp_idmap_text_start) {
eac378a9
MZ
1764 /*
1765 * The idmap page is intersecting with the VA space,
1766 * it is not safe to continue further.
1767 */
1768 kvm_err("IDMAP intersecting with HYP VA, unable to continue\n");
1769 err = -EINVAL;
1770 goto out;
1771 }
1772
38f791a4 1773 hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, hyp_pgd_order);
0535a3e2 1774 if (!hyp_pgd) {
d5d8184d 1775 kvm_err("Hyp mode PGD not allocated\n");
2fb41059
MZ
1776 err = -ENOMEM;
1777 goto out;
1778 }
1779
0535a3e2
MZ
1780 if (__kvm_cpu_uses_extended_idmap()) {
1781 boot_hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
1782 hyp_pgd_order);
1783 if (!boot_hyp_pgd) {
1784 kvm_err("Hyp boot PGD not allocated\n");
1785 err = -ENOMEM;
1786 goto out;
1787 }
2fb41059 1788
0535a3e2
MZ
1789 err = kvm_map_idmap_text(boot_hyp_pgd);
1790 if (err)
1791 goto out;
d5d8184d 1792
e4c5a685
AB
1793 merged_hyp_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1794 if (!merged_hyp_pgd) {
1795 kvm_err("Failed to allocate extra HYP pgd\n");
1796 goto out;
1797 }
1798 __kvm_extend_hypmap(boot_hyp_pgd, hyp_pgd, merged_hyp_pgd,
1799 hyp_idmap_start);
0535a3e2
MZ
1800 } else {
1801 err = kvm_map_idmap_text(hyp_pgd);
1802 if (err)
1803 goto out;
5a677ce0
MZ
1804 }
1805
d5d8184d 1806 return 0;
2fb41059 1807out:
4f728276 1808 free_hyp_pgds();
2fb41059 1809 return err;
342cd0ab 1810}
df6ce24f
EA
1811
1812void kvm_arch_commit_memory_region(struct kvm *kvm,
09170a49 1813 const struct kvm_userspace_memory_region *mem,
df6ce24f 1814 const struct kvm_memory_slot *old,
f36f3f28 1815 const struct kvm_memory_slot *new,
df6ce24f
EA
1816 enum kvm_mr_change change)
1817{
c6473555
MS
1818 /*
1819 * At this point memslot has been committed and there is an
1820 * allocated dirty_bitmap[], dirty pages will be be tracked while the
1821 * memory slot is write protected.
1822 */
1823 if (change != KVM_MR_DELETE && mem->flags & KVM_MEM_LOG_DIRTY_PAGES)
1824 kvm_mmu_wp_memory_region(kvm, mem->slot);
df6ce24f
EA
1825}
1826
1827int kvm_arch_prepare_memory_region(struct kvm *kvm,
1828 struct kvm_memory_slot *memslot,
09170a49 1829 const struct kvm_userspace_memory_region *mem,
df6ce24f
EA
1830 enum kvm_mr_change change)
1831{
8eef9123
AB
1832 hva_t hva = mem->userspace_addr;
1833 hva_t reg_end = hva + mem->memory_size;
1834 bool writable = !(mem->flags & KVM_MEM_READONLY);
1835 int ret = 0;
1836
15a49a44
MS
1837 if (change != KVM_MR_CREATE && change != KVM_MR_MOVE &&
1838 change != KVM_MR_FLAGS_ONLY)
8eef9123
AB
1839 return 0;
1840
c3058d5d
CD
1841 /*
1842 * Prevent userspace from creating a memory region outside of the IPA
1843 * space addressable by the KVM guest IPA space.
1844 */
1845 if (memslot->base_gfn + memslot->npages >=
1846 (KVM_PHYS_SIZE >> PAGE_SHIFT))
1847 return -EFAULT;
1848
2cd45f6f 1849 down_read(&current->mm->mmap_sem);
8eef9123
AB
1850 /*
1851 * A memory region could potentially cover multiple VMAs, and any holes
1852 * between them, so iterate over all of them to find out if we can map
1853 * any of them right now.
1854 *
1855 * +--------------------------------------------+
1856 * +---------------+----------------+ +----------------+
1857 * | : VMA 1 | VMA 2 | | VMA 3 : |
1858 * +---------------+----------------+ +----------------+
1859 * | memory region |
1860 * +--------------------------------------------+
1861 */
1862 do {
1863 struct vm_area_struct *vma = find_vma(current->mm, hva);
1864 hva_t vm_start, vm_end;
1865
1866 if (!vma || vma->vm_start >= reg_end)
1867 break;
1868
1869 /*
1870 * Mapping a read-only VMA is only allowed if the
1871 * memory region is configured as read-only.
1872 */
1873 if (writable && !(vma->vm_flags & VM_WRITE)) {
1874 ret = -EPERM;
1875 break;
1876 }
1877
1878 /*
1879 * Take the intersection of this VMA with the memory region
1880 */
1881 vm_start = max(hva, vma->vm_start);
1882 vm_end = min(reg_end, vma->vm_end);
1883
1884 if (vma->vm_flags & VM_PFNMAP) {
1885 gpa_t gpa = mem->guest_phys_addr +
1886 (vm_start - mem->userspace_addr);
ca09f02f
MM
1887 phys_addr_t pa;
1888
1889 pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT;
1890 pa += vm_start - vma->vm_start;
8eef9123 1891
15a49a44 1892 /* IO region dirty page logging not allowed */
2cd45f6f
MZ
1893 if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES) {
1894 ret = -EINVAL;
1895 goto out;
1896 }
15a49a44 1897
8eef9123
AB
1898 ret = kvm_phys_addr_ioremap(kvm, gpa, pa,
1899 vm_end - vm_start,
1900 writable);
1901 if (ret)
1902 break;
1903 }
1904 hva = vm_end;
1905 } while (hva < reg_end);
1906
15a49a44 1907 if (change == KVM_MR_FLAGS_ONLY)
2cd45f6f 1908 goto out;
15a49a44 1909
849260c7
AB
1910 spin_lock(&kvm->mmu_lock);
1911 if (ret)
8eef9123 1912 unmap_stage2_range(kvm, mem->guest_phys_addr, mem->memory_size);
849260c7
AB
1913 else
1914 stage2_flush_memslot(kvm, memslot);
1915 spin_unlock(&kvm->mmu_lock);
2cd45f6f
MZ
1916out:
1917 up_read(&current->mm->mmap_sem);
8eef9123 1918 return ret;
df6ce24f
EA
1919}
1920
1921void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
1922 struct kvm_memory_slot *dont)
1923{
1924}
1925
1926int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
1927 unsigned long npages)
1928{
849260c7
AB
1929 /*
1930 * Readonly memslots are not incoherent with the caches by definition,
1931 * but in practice, they are used mostly to emulate ROMs or NOR flashes
1932 * that the guest may consider devices and hence map as uncached.
1933 * To prevent incoherency issues in these cases, tag all readonly
1934 * regions as incoherent.
1935 */
1936 if (slot->flags & KVM_MEM_READONLY)
1937 slot->flags |= KVM_MEMSLOT_INCOHERENT;
df6ce24f
EA
1938 return 0;
1939}
1940
15f46015 1941void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
df6ce24f
EA
1942{
1943}
1944
1945void kvm_arch_flush_shadow_all(struct kvm *kvm)
1946{
293f2936 1947 kvm_free_stage2_pgd(kvm);
df6ce24f
EA
1948}
1949
1950void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
1951 struct kvm_memory_slot *slot)
1952{
8eef9123
AB
1953 gpa_t gpa = slot->base_gfn << PAGE_SHIFT;
1954 phys_addr_t size = slot->npages << PAGE_SHIFT;
1955
1956 spin_lock(&kvm->mmu_lock);
1957 unmap_stage2_range(kvm, gpa, size);
1958 spin_unlock(&kvm->mmu_lock);
df6ce24f 1959}
3c1e7165
MZ
1960
1961/*
1962 * See note at ARMv7 ARM B1.14.4 (TL;DR: S/W ops are not easily virtualized).
1963 *
1964 * Main problems:
1965 * - S/W ops are local to a CPU (not broadcast)
1966 * - We have line migration behind our back (speculation)
1967 * - System caches don't support S/W at all (damn!)
1968 *
1969 * In the face of the above, the best we can do is to try and convert
1970 * S/W ops to VA ops. Because the guest is not allowed to infer the
1971 * S/W to PA mapping, it can only use S/W to nuke the whole cache,
1972 * which is a rather good thing for us.
1973 *
1974 * Also, it is only used when turning caches on/off ("The expected
1975 * usage of the cache maintenance instructions that operate by set/way
1976 * is associated with the cache maintenance instructions associated
1977 * with the powerdown and powerup of caches, if this is required by
1978 * the implementation.").
1979 *
1980 * We use the following policy:
1981 *
1982 * - If we trap a S/W operation, we enable VM trapping to detect
1983 * caches being turned on/off, and do a full clean.
1984 *
1985 * - We flush the caches on both caches being turned on and off.
1986 *
1987 * - Once the caches are enabled, we stop trapping VM ops.
1988 */
1989void kvm_set_way_flush(struct kvm_vcpu *vcpu)
1990{
1991 unsigned long hcr = vcpu_get_hcr(vcpu);
1992
1993 /*
1994 * If this is the first time we do a S/W operation
1995 * (i.e. HCR_TVM not set) flush the whole memory, and set the
1996 * VM trapping.
1997 *
1998 * Otherwise, rely on the VM trapping to wait for the MMU +
1999 * Caches to be turned off. At that point, we'll be able to
2000 * clean the caches again.
2001 */
2002 if (!(hcr & HCR_TVM)) {
2003 trace_kvm_set_way_flush(*vcpu_pc(vcpu),
2004 vcpu_has_cache_enabled(vcpu));
2005 stage2_flush_vm(vcpu->kvm);
2006 vcpu_set_hcr(vcpu, hcr | HCR_TVM);
2007 }
2008}
2009
2010void kvm_toggle_cache(struct kvm_vcpu *vcpu, bool was_enabled)
2011{
2012 bool now_enabled = vcpu_has_cache_enabled(vcpu);
2013
2014 /*
2015 * If switching the MMU+caches on, need to invalidate the caches.
2016 * If switching it off, need to clean the caches.
2017 * Clean + invalidate does the trick always.
2018 */
2019 if (now_enabled != was_enabled)
2020 stage2_flush_vm(vcpu->kvm);
2021
2022 /* Caches are now on, stop trapping VM ops (until a S/W op) */
2023 if (now_enabled)
2024 vcpu_set_hcr(vcpu, vcpu_get_hcr(vcpu) & ~HCR_TVM);
2025
2026 trace_kvm_toggle_cache(*vcpu_pc(vcpu), was_enabled, now_enabled);
2027}