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1/*
2 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
3 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
17 */
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18
19#include <linux/mman.h>
20#include <linux/kvm_host.h>
21#include <linux/io.h>
ad361f09 22#include <linux/hugetlb.h>
45e96ea6 23#include <trace/events/kvm.h>
342cd0ab 24#include <asm/pgalloc.h>
94f8e641 25#include <asm/cacheflush.h>
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26#include <asm/kvm_arm.h>
27#include <asm/kvm_mmu.h>
45e96ea6 28#include <asm/kvm_mmio.h>
d5d8184d 29#include <asm/kvm_asm.h>
94f8e641 30#include <asm/kvm_emulate.h>
d5d8184d
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31
32#include "trace.h"
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33
34extern char __hyp_idmap_text_start[], __hyp_idmap_text_end[];
35
5a677ce0 36static pgd_t *boot_hyp_pgd;
2fb41059 37static pgd_t *hyp_pgd;
e4c5a685 38static pgd_t *merged_hyp_pgd;
342cd0ab
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39static DEFINE_MUTEX(kvm_hyp_pgd_mutex);
40
5a677ce0
MZ
41static unsigned long hyp_idmap_start;
42static unsigned long hyp_idmap_end;
43static phys_addr_t hyp_idmap_vector;
44
38f791a4 45#define hyp_pgd_order get_order(PTRS_PER_PGD * sizeof(pgd_t))
5d4e08c4 46
9b5fdb97 47#define kvm_pmd_huge(_x) (pmd_huge(_x) || pmd_trans_huge(_x))
c6473555 48#define kvm_pud_huge(_x) pud_huge(_x)
ad361f09 49
15a49a44
MS
50#define KVM_S2PTE_FLAG_IS_IOMAP (1UL << 0)
51#define KVM_S2_FLAG_LOGGING_ACTIVE (1UL << 1)
52
53static bool memslot_is_logging(struct kvm_memory_slot *memslot)
54{
15a49a44 55 return memslot->dirty_bitmap && !(memslot->flags & KVM_MEM_READONLY);
7276030a
MS
56}
57
58/**
59 * kvm_flush_remote_tlbs() - flush all VM TLB entries for v7/8
60 * @kvm: pointer to kvm structure.
61 *
62 * Interface to HYP function to flush all VM TLB entries
63 */
64void kvm_flush_remote_tlbs(struct kvm *kvm)
65{
66 kvm_call_hyp(__kvm_tlb_flush_vmid, kvm);
15a49a44 67}
ad361f09 68
48762767 69static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
d5d8184d 70{
d4cb9df5
MZ
71 /*
72 * This function also gets called when dealing with HYP page
73 * tables. As HYP doesn't have an associated struct kvm (and
74 * the HYP page tables are fairly static), we don't do
75 * anything there.
76 */
77 if (kvm)
78 kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, kvm, ipa);
d5d8184d
CD
79}
80
363ef89f
MZ
81/*
82 * D-Cache management functions. They take the page table entries by
83 * value, as they are flushing the cache using the kernel mapping (or
84 * kmap on 32bit).
85 */
86static void kvm_flush_dcache_pte(pte_t pte)
87{
88 __kvm_flush_dcache_pte(pte);
89}
90
91static void kvm_flush_dcache_pmd(pmd_t pmd)
92{
93 __kvm_flush_dcache_pmd(pmd);
94}
95
96static void kvm_flush_dcache_pud(pud_t pud)
97{
98 __kvm_flush_dcache_pud(pud);
99}
100
e6fab544
AB
101static bool kvm_is_device_pfn(unsigned long pfn)
102{
103 return !pfn_valid(pfn);
104}
105
15a49a44
MS
106/**
107 * stage2_dissolve_pmd() - clear and flush huge PMD entry
108 * @kvm: pointer to kvm structure.
109 * @addr: IPA
110 * @pmd: pmd pointer for IPA
111 *
112 * Function clears a PMD entry, flushes addr 1st and 2nd stage TLBs. Marks all
113 * pages in the range dirty.
114 */
115static void stage2_dissolve_pmd(struct kvm *kvm, phys_addr_t addr, pmd_t *pmd)
116{
117 if (!kvm_pmd_huge(*pmd))
118 return;
119
120 pmd_clear(pmd);
121 kvm_tlb_flush_vmid_ipa(kvm, addr);
122 put_page(virt_to_page(pmd));
123}
124
d5d8184d
CD
125static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
126 int min, int max)
127{
128 void *page;
129
130 BUG_ON(max > KVM_NR_MEM_OBJS);
131 if (cache->nobjs >= min)
132 return 0;
133 while (cache->nobjs < max) {
134 page = (void *)__get_free_page(PGALLOC_GFP);
135 if (!page)
136 return -ENOMEM;
137 cache->objects[cache->nobjs++] = page;
138 }
139 return 0;
140}
141
142static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
143{
144 while (mc->nobjs)
145 free_page((unsigned long)mc->objects[--mc->nobjs]);
146}
147
148static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
149{
150 void *p;
151
152 BUG_ON(!mc || !mc->nobjs);
153 p = mc->objects[--mc->nobjs];
154 return p;
155}
156
4f853a71 157static void clear_pgd_entry(struct kvm *kvm, pgd_t *pgd, phys_addr_t addr)
979acd5e 158{
4f853a71
CD
159 pud_t *pud_table __maybe_unused = pud_offset(pgd, 0);
160 pgd_clear(pgd);
161 kvm_tlb_flush_vmid_ipa(kvm, addr);
162 pud_free(NULL, pud_table);
163 put_page(virt_to_page(pgd));
979acd5e
MZ
164}
165
d4cb9df5 166static void clear_pud_entry(struct kvm *kvm, pud_t *pud, phys_addr_t addr)
342cd0ab 167{
4f853a71
CD
168 pmd_t *pmd_table = pmd_offset(pud, 0);
169 VM_BUG_ON(pud_huge(*pud));
170 pud_clear(pud);
171 kvm_tlb_flush_vmid_ipa(kvm, addr);
172 pmd_free(NULL, pmd_table);
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173 put_page(virt_to_page(pud));
174}
342cd0ab 175
d4cb9df5 176static void clear_pmd_entry(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr)
4f728276 177{
4f853a71
CD
178 pte_t *pte_table = pte_offset_kernel(pmd, 0);
179 VM_BUG_ON(kvm_pmd_huge(*pmd));
180 pmd_clear(pmd);
181 kvm_tlb_flush_vmid_ipa(kvm, addr);
182 pte_free_kernel(NULL, pte_table);
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183 put_page(virt_to_page(pmd));
184}
185
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186/*
187 * Unmapping vs dcache management:
188 *
189 * If a guest maps certain memory pages as uncached, all writes will
190 * bypass the data cache and go directly to RAM. However, the CPUs
191 * can still speculate reads (not writes) and fill cache lines with
192 * data.
193 *
194 * Those cache lines will be *clean* cache lines though, so a
195 * clean+invalidate operation is equivalent to an invalidate
196 * operation, because no cache lines are marked dirty.
197 *
198 * Those clean cache lines could be filled prior to an uncached write
199 * by the guest, and the cache coherent IO subsystem would therefore
200 * end up writing old data to disk.
201 *
202 * This is why right after unmapping a page/section and invalidating
203 * the corresponding TLBs, we call kvm_flush_dcache_p*() to make sure
204 * the IO subsystem will never hit in the cache.
205 */
4f853a71
CD
206static void unmap_ptes(struct kvm *kvm, pmd_t *pmd,
207 phys_addr_t addr, phys_addr_t end)
4f728276 208{
4f853a71
CD
209 phys_addr_t start_addr = addr;
210 pte_t *pte, *start_pte;
211
212 start_pte = pte = pte_offset_kernel(pmd, addr);
213 do {
214 if (!pte_none(*pte)) {
363ef89f
MZ
215 pte_t old_pte = *pte;
216
4f853a71 217 kvm_set_pte(pte, __pte(0));
4f853a71 218 kvm_tlb_flush_vmid_ipa(kvm, addr);
363ef89f
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219
220 /* No need to invalidate the cache for device mappings */
e6fab544 221 if (!kvm_is_device_pfn(__phys_to_pfn(addr)))
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222 kvm_flush_dcache_pte(old_pte);
223
224 put_page(virt_to_page(pte));
4f853a71
CD
225 }
226 } while (pte++, addr += PAGE_SIZE, addr != end);
227
38f791a4 228 if (kvm_pte_table_empty(kvm, start_pte))
4f853a71 229 clear_pmd_entry(kvm, pmd, start_addr);
342cd0ab
CD
230}
231
4f853a71
CD
232static void unmap_pmds(struct kvm *kvm, pud_t *pud,
233 phys_addr_t addr, phys_addr_t end)
000d3996 234{
4f853a71
CD
235 phys_addr_t next, start_addr = addr;
236 pmd_t *pmd, *start_pmd;
000d3996 237
4f853a71
CD
238 start_pmd = pmd = pmd_offset(pud, addr);
239 do {
240 next = kvm_pmd_addr_end(addr, end);
241 if (!pmd_none(*pmd)) {
242 if (kvm_pmd_huge(*pmd)) {
363ef89f
MZ
243 pmd_t old_pmd = *pmd;
244
4f853a71
CD
245 pmd_clear(pmd);
246 kvm_tlb_flush_vmid_ipa(kvm, addr);
363ef89f
MZ
247
248 kvm_flush_dcache_pmd(old_pmd);
249
4f853a71
CD
250 put_page(virt_to_page(pmd));
251 } else {
252 unmap_ptes(kvm, pmd, addr, next);
253 }
ad361f09 254 }
4f853a71 255 } while (pmd++, addr = next, addr != end);
ad361f09 256
38f791a4 257 if (kvm_pmd_table_empty(kvm, start_pmd))
4f853a71
CD
258 clear_pud_entry(kvm, pud, start_addr);
259}
000d3996 260
4f853a71
CD
261static void unmap_puds(struct kvm *kvm, pgd_t *pgd,
262 phys_addr_t addr, phys_addr_t end)
263{
264 phys_addr_t next, start_addr = addr;
265 pud_t *pud, *start_pud;
4f728276 266
4f853a71
CD
267 start_pud = pud = pud_offset(pgd, addr);
268 do {
269 next = kvm_pud_addr_end(addr, end);
270 if (!pud_none(*pud)) {
271 if (pud_huge(*pud)) {
363ef89f
MZ
272 pud_t old_pud = *pud;
273
4f853a71
CD
274 pud_clear(pud);
275 kvm_tlb_flush_vmid_ipa(kvm, addr);
363ef89f
MZ
276
277 kvm_flush_dcache_pud(old_pud);
278
4f853a71
CD
279 put_page(virt_to_page(pud));
280 } else {
281 unmap_pmds(kvm, pud, addr, next);
4f728276
MZ
282 }
283 }
4f853a71 284 } while (pud++, addr = next, addr != end);
4f728276 285
38f791a4 286 if (kvm_pud_table_empty(kvm, start_pud))
4f853a71
CD
287 clear_pgd_entry(kvm, pgd, start_addr);
288}
289
290
291static void unmap_range(struct kvm *kvm, pgd_t *pgdp,
292 phys_addr_t start, u64 size)
293{
294 pgd_t *pgd;
295 phys_addr_t addr = start, end = start + size;
296 phys_addr_t next;
297
04b8dc85 298 pgd = pgdp + kvm_pgd_index(addr);
4f853a71
CD
299 do {
300 next = kvm_pgd_addr_end(addr, end);
7cbb87d6
MR
301 if (!pgd_none(*pgd))
302 unmap_puds(kvm, pgd, addr, next);
4f853a71 303 } while (pgd++, addr = next, addr != end);
000d3996
MZ
304}
305
9d218a1f
MZ
306static void stage2_flush_ptes(struct kvm *kvm, pmd_t *pmd,
307 phys_addr_t addr, phys_addr_t end)
308{
309 pte_t *pte;
310
311 pte = pte_offset_kernel(pmd, addr);
312 do {
e6fab544 313 if (!pte_none(*pte) && !kvm_is_device_pfn(__phys_to_pfn(addr)))
363ef89f 314 kvm_flush_dcache_pte(*pte);
9d218a1f
MZ
315 } while (pte++, addr += PAGE_SIZE, addr != end);
316}
317
318static void stage2_flush_pmds(struct kvm *kvm, pud_t *pud,
319 phys_addr_t addr, phys_addr_t end)
320{
321 pmd_t *pmd;
322 phys_addr_t next;
323
324 pmd = pmd_offset(pud, addr);
325 do {
326 next = kvm_pmd_addr_end(addr, end);
327 if (!pmd_none(*pmd)) {
363ef89f
MZ
328 if (kvm_pmd_huge(*pmd))
329 kvm_flush_dcache_pmd(*pmd);
330 else
9d218a1f 331 stage2_flush_ptes(kvm, pmd, addr, next);
9d218a1f
MZ
332 }
333 } while (pmd++, addr = next, addr != end);
334}
335
336static void stage2_flush_puds(struct kvm *kvm, pgd_t *pgd,
337 phys_addr_t addr, phys_addr_t end)
338{
339 pud_t *pud;
340 phys_addr_t next;
341
342 pud = pud_offset(pgd, addr);
343 do {
344 next = kvm_pud_addr_end(addr, end);
345 if (!pud_none(*pud)) {
363ef89f
MZ
346 if (pud_huge(*pud))
347 kvm_flush_dcache_pud(*pud);
348 else
9d218a1f 349 stage2_flush_pmds(kvm, pud, addr, next);
9d218a1f
MZ
350 }
351 } while (pud++, addr = next, addr != end);
352}
353
354static void stage2_flush_memslot(struct kvm *kvm,
355 struct kvm_memory_slot *memslot)
356{
357 phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
358 phys_addr_t end = addr + PAGE_SIZE * memslot->npages;
359 phys_addr_t next;
360 pgd_t *pgd;
361
04b8dc85 362 pgd = kvm->arch.pgd + kvm_pgd_index(addr);
9d218a1f
MZ
363 do {
364 next = kvm_pgd_addr_end(addr, end);
365 stage2_flush_puds(kvm, pgd, addr, next);
366 } while (pgd++, addr = next, addr != end);
367}
368
369/**
370 * stage2_flush_vm - Invalidate cache for pages mapped in stage 2
371 * @kvm: The struct kvm pointer
372 *
373 * Go through the stage 2 page tables and invalidate any cache lines
374 * backing memory already mapped to the VM.
375 */
3c1e7165 376static void stage2_flush_vm(struct kvm *kvm)
9d218a1f
MZ
377{
378 struct kvm_memslots *slots;
379 struct kvm_memory_slot *memslot;
380 int idx;
381
382 idx = srcu_read_lock(&kvm->srcu);
383 spin_lock(&kvm->mmu_lock);
384
385 slots = kvm_memslots(kvm);
386 kvm_for_each_memslot(memslot, slots)
387 stage2_flush_memslot(kvm, memslot);
388
389 spin_unlock(&kvm->mmu_lock);
390 srcu_read_unlock(&kvm->srcu, idx);
391}
392
d157f4a5
MZ
393/**
394 * free_boot_hyp_pgd - free HYP boot page tables
395 *
396 * Free the HYP boot page tables. The bounce page is also freed.
397 */
398void free_boot_hyp_pgd(void)
399{
400 mutex_lock(&kvm_hyp_pgd_mutex);
401
402 if (boot_hyp_pgd) {
d4cb9df5
MZ
403 unmap_range(NULL, boot_hyp_pgd, hyp_idmap_start, PAGE_SIZE);
404 unmap_range(NULL, boot_hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE);
38f791a4 405 free_pages((unsigned long)boot_hyp_pgd, hyp_pgd_order);
d157f4a5
MZ
406 boot_hyp_pgd = NULL;
407 }
408
409 if (hyp_pgd)
d4cb9df5 410 unmap_range(NULL, hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE);
d157f4a5 411
d157f4a5
MZ
412 mutex_unlock(&kvm_hyp_pgd_mutex);
413}
414
342cd0ab 415/**
4f728276 416 * free_hyp_pgds - free Hyp-mode page tables
342cd0ab 417 *
5a677ce0
MZ
418 * Assumes hyp_pgd is a page table used strictly in Hyp-mode and
419 * therefore contains either mappings in the kernel memory area (above
420 * PAGE_OFFSET), or device mappings in the vmalloc range (from
421 * VMALLOC_START to VMALLOC_END).
422 *
423 * boot_hyp_pgd should only map two pages for the init code.
342cd0ab 424 */
4f728276 425void free_hyp_pgds(void)
342cd0ab 426{
342cd0ab
CD
427 unsigned long addr;
428
d157f4a5 429 free_boot_hyp_pgd();
4f728276 430
d157f4a5 431 mutex_lock(&kvm_hyp_pgd_mutex);
5a677ce0 432
4f728276
MZ
433 if (hyp_pgd) {
434 for (addr = PAGE_OFFSET; virt_addr_valid(addr); addr += PGDIR_SIZE)
d4cb9df5 435 unmap_range(NULL, hyp_pgd, KERN_TO_HYP(addr), PGDIR_SIZE);
4f728276 436 for (addr = VMALLOC_START; is_vmalloc_addr((void*)addr); addr += PGDIR_SIZE)
d4cb9df5
MZ
437 unmap_range(NULL, hyp_pgd, KERN_TO_HYP(addr), PGDIR_SIZE);
438
38f791a4 439 free_pages((unsigned long)hyp_pgd, hyp_pgd_order);
d157f4a5 440 hyp_pgd = NULL;
4f728276 441 }
e4c5a685
AB
442 if (merged_hyp_pgd) {
443 clear_page(merged_hyp_pgd);
444 free_page((unsigned long)merged_hyp_pgd);
445 merged_hyp_pgd = NULL;
446 }
4f728276 447
342cd0ab
CD
448 mutex_unlock(&kvm_hyp_pgd_mutex);
449}
450
451static void create_hyp_pte_mappings(pmd_t *pmd, unsigned long start,
6060df84
MZ
452 unsigned long end, unsigned long pfn,
453 pgprot_t prot)
342cd0ab
CD
454{
455 pte_t *pte;
456 unsigned long addr;
342cd0ab 457
3562c76d
MZ
458 addr = start;
459 do {
6060df84
MZ
460 pte = pte_offset_kernel(pmd, addr);
461 kvm_set_pte(pte, pfn_pte(pfn, prot));
4f728276 462 get_page(virt_to_page(pte));
5a677ce0 463 kvm_flush_dcache_to_poc(pte, sizeof(*pte));
6060df84 464 pfn++;
3562c76d 465 } while (addr += PAGE_SIZE, addr != end);
342cd0ab
CD
466}
467
468static int create_hyp_pmd_mappings(pud_t *pud, unsigned long start,
6060df84
MZ
469 unsigned long end, unsigned long pfn,
470 pgprot_t prot)
342cd0ab
CD
471{
472 pmd_t *pmd;
473 pte_t *pte;
474 unsigned long addr, next;
475
3562c76d
MZ
476 addr = start;
477 do {
6060df84 478 pmd = pmd_offset(pud, addr);
342cd0ab
CD
479
480 BUG_ON(pmd_sect(*pmd));
481
482 if (pmd_none(*pmd)) {
6060df84 483 pte = pte_alloc_one_kernel(NULL, addr);
342cd0ab
CD
484 if (!pte) {
485 kvm_err("Cannot allocate Hyp pte\n");
486 return -ENOMEM;
487 }
488 pmd_populate_kernel(NULL, pmd, pte);
4f728276 489 get_page(virt_to_page(pmd));
5a677ce0 490 kvm_flush_dcache_to_poc(pmd, sizeof(*pmd));
342cd0ab
CD
491 }
492
493 next = pmd_addr_end(addr, end);
494
6060df84
MZ
495 create_hyp_pte_mappings(pmd, addr, next, pfn, prot);
496 pfn += (next - addr) >> PAGE_SHIFT;
3562c76d 497 } while (addr = next, addr != end);
342cd0ab
CD
498
499 return 0;
500}
501
38f791a4
CD
502static int create_hyp_pud_mappings(pgd_t *pgd, unsigned long start,
503 unsigned long end, unsigned long pfn,
504 pgprot_t prot)
505{
506 pud_t *pud;
507 pmd_t *pmd;
508 unsigned long addr, next;
509 int ret;
510
511 addr = start;
512 do {
513 pud = pud_offset(pgd, addr);
514
515 if (pud_none_or_clear_bad(pud)) {
516 pmd = pmd_alloc_one(NULL, addr);
517 if (!pmd) {
518 kvm_err("Cannot allocate Hyp pmd\n");
519 return -ENOMEM;
520 }
521 pud_populate(NULL, pud, pmd);
522 get_page(virt_to_page(pud));
523 kvm_flush_dcache_to_poc(pud, sizeof(*pud));
524 }
525
526 next = pud_addr_end(addr, end);
527 ret = create_hyp_pmd_mappings(pud, addr, next, pfn, prot);
528 if (ret)
529 return ret;
530 pfn += (next - addr) >> PAGE_SHIFT;
531 } while (addr = next, addr != end);
532
533 return 0;
534}
535
6060df84
MZ
536static int __create_hyp_mappings(pgd_t *pgdp,
537 unsigned long start, unsigned long end,
538 unsigned long pfn, pgprot_t prot)
342cd0ab 539{
342cd0ab
CD
540 pgd_t *pgd;
541 pud_t *pud;
342cd0ab
CD
542 unsigned long addr, next;
543 int err = 0;
544
342cd0ab 545 mutex_lock(&kvm_hyp_pgd_mutex);
3562c76d
MZ
546 addr = start & PAGE_MASK;
547 end = PAGE_ALIGN(end);
548 do {
6060df84 549 pgd = pgdp + pgd_index(addr);
342cd0ab 550
38f791a4
CD
551 if (pgd_none(*pgd)) {
552 pud = pud_alloc_one(NULL, addr);
553 if (!pud) {
554 kvm_err("Cannot allocate Hyp pud\n");
342cd0ab
CD
555 err = -ENOMEM;
556 goto out;
557 }
38f791a4
CD
558 pgd_populate(NULL, pgd, pud);
559 get_page(virt_to_page(pgd));
560 kvm_flush_dcache_to_poc(pgd, sizeof(*pgd));
342cd0ab
CD
561 }
562
563 next = pgd_addr_end(addr, end);
38f791a4 564 err = create_hyp_pud_mappings(pgd, addr, next, pfn, prot);
342cd0ab
CD
565 if (err)
566 goto out;
6060df84 567 pfn += (next - addr) >> PAGE_SHIFT;
3562c76d 568 } while (addr = next, addr != end);
342cd0ab
CD
569out:
570 mutex_unlock(&kvm_hyp_pgd_mutex);
571 return err;
572}
573
40c2729b
CD
574static phys_addr_t kvm_kaddr_to_phys(void *kaddr)
575{
576 if (!is_vmalloc_addr(kaddr)) {
577 BUG_ON(!virt_addr_valid(kaddr));
578 return __pa(kaddr);
579 } else {
580 return page_to_phys(vmalloc_to_page(kaddr)) +
581 offset_in_page(kaddr);
582 }
583}
584
342cd0ab 585/**
06e8c3b0 586 * create_hyp_mappings - duplicate a kernel virtual address range in Hyp mode
342cd0ab
CD
587 * @from: The virtual kernel start address of the range
588 * @to: The virtual kernel end address of the range (exclusive)
589 *
06e8c3b0
MZ
590 * The same virtual address as the kernel virtual address is also used
591 * in Hyp-mode mapping (modulo HYP_PAGE_OFFSET) to the same underlying
592 * physical pages.
342cd0ab
CD
593 */
594int create_hyp_mappings(void *from, void *to)
595{
40c2729b
CD
596 phys_addr_t phys_addr;
597 unsigned long virt_addr;
6060df84
MZ
598 unsigned long start = KERN_TO_HYP((unsigned long)from);
599 unsigned long end = KERN_TO_HYP((unsigned long)to);
600
40c2729b
CD
601 start = start & PAGE_MASK;
602 end = PAGE_ALIGN(end);
6060df84 603
40c2729b
CD
604 for (virt_addr = start; virt_addr < end; virt_addr += PAGE_SIZE) {
605 int err;
6060df84 606
40c2729b
CD
607 phys_addr = kvm_kaddr_to_phys(from + virt_addr - start);
608 err = __create_hyp_mappings(hyp_pgd, virt_addr,
609 virt_addr + PAGE_SIZE,
610 __phys_to_pfn(phys_addr),
611 PAGE_HYP);
612 if (err)
613 return err;
614 }
615
616 return 0;
342cd0ab
CD
617}
618
619/**
06e8c3b0
MZ
620 * create_hyp_io_mappings - duplicate a kernel IO mapping into Hyp mode
621 * @from: The kernel start VA of the range
622 * @to: The kernel end VA of the range (exclusive)
6060df84 623 * @phys_addr: The physical start address which gets mapped
06e8c3b0
MZ
624 *
625 * The resulting HYP VA is the same as the kernel VA, modulo
626 * HYP_PAGE_OFFSET.
342cd0ab 627 */
6060df84 628int create_hyp_io_mappings(void *from, void *to, phys_addr_t phys_addr)
342cd0ab 629{
6060df84
MZ
630 unsigned long start = KERN_TO_HYP((unsigned long)from);
631 unsigned long end = KERN_TO_HYP((unsigned long)to);
632
633 /* Check for a valid kernel IO mapping */
634 if (!is_vmalloc_addr(from) || !is_vmalloc_addr(to - 1))
635 return -EINVAL;
636
637 return __create_hyp_mappings(hyp_pgd, start, end,
638 __phys_to_pfn(phys_addr), PAGE_HYP_DEVICE);
342cd0ab
CD
639}
640
a987370f
MZ
641/* Free the HW pgd, one page at a time */
642static void kvm_free_hwpgd(void *hwpgd)
643{
644 free_pages_exact(hwpgd, kvm_get_hwpgd_size());
645}
646
647/* Allocate the HW PGD, making sure that each page gets its own refcount */
648static void *kvm_alloc_hwpgd(void)
649{
650 unsigned int size = kvm_get_hwpgd_size();
651
652 return alloc_pages_exact(size, GFP_KERNEL | __GFP_ZERO);
653}
654
d5d8184d
CD
655/**
656 * kvm_alloc_stage2_pgd - allocate level-1 table for stage-2 translation.
657 * @kvm: The KVM struct pointer for the VM.
658 *
659 * Allocates the 1st level table only of size defined by S2_PGD_ORDER (can
660 * support either full 40-bit input addresses or limited to 32-bit input
661 * addresses). Clears the allocated pages.
662 *
663 * Note we don't need locking here as this is only called when the VM is
664 * created, which can only be done once.
665 */
666int kvm_alloc_stage2_pgd(struct kvm *kvm)
667{
668 pgd_t *pgd;
a987370f 669 void *hwpgd;
d5d8184d
CD
670
671 if (kvm->arch.pgd != NULL) {
672 kvm_err("kvm_arch already initialized?\n");
673 return -EINVAL;
674 }
675
a987370f
MZ
676 hwpgd = kvm_alloc_hwpgd();
677 if (!hwpgd)
678 return -ENOMEM;
679
680 /* When the kernel uses more levels of page tables than the
681 * guest, we allocate a fake PGD and pre-populate it to point
682 * to the next-level page table, which will be the real
683 * initial page table pointed to by the VTTBR.
684 *
685 * When KVM_PREALLOC_LEVEL==2, we allocate a single page for
686 * the PMD and the kernel will use folded pud.
687 * When KVM_PREALLOC_LEVEL==1, we allocate 2 consecutive PUD
688 * pages.
689 */
38f791a4 690 if (KVM_PREALLOC_LEVEL > 0) {
a987370f
MZ
691 int i;
692
38f791a4
CD
693 /*
694 * Allocate fake pgd for the page table manipulation macros to
695 * work. This is not used by the hardware and we have no
696 * alignment requirement for this allocation.
697 */
a5f56ba3
FY
698 pgd = kmalloc(PTRS_PER_S2_PGD * sizeof(pgd_t),
699 GFP_KERNEL | __GFP_ZERO);
a987370f
MZ
700
701 if (!pgd) {
702 kvm_free_hwpgd(hwpgd);
703 return -ENOMEM;
704 }
705
706 /* Plug the HW PGD into the fake one. */
707 for (i = 0; i < PTRS_PER_S2_PGD; i++) {
708 if (KVM_PREALLOC_LEVEL == 1)
709 pgd_populate(NULL, pgd + i,
710 (pud_t *)hwpgd + i * PTRS_PER_PUD);
711 else if (KVM_PREALLOC_LEVEL == 2)
712 pud_populate(NULL, pud_offset(pgd, 0) + i,
713 (pmd_t *)hwpgd + i * PTRS_PER_PMD);
714 }
38f791a4
CD
715 } else {
716 /*
717 * Allocate actual first-level Stage-2 page table used by the
718 * hardware for Stage-2 page table walks.
719 */
a987370f 720 pgd = (pgd_t *)hwpgd;
38f791a4
CD
721 }
722
c62ee2b2 723 kvm_clean_pgd(pgd);
d5d8184d 724 kvm->arch.pgd = pgd;
d5d8184d
CD
725 return 0;
726}
727
d5d8184d
CD
728/**
729 * unmap_stage2_range -- Clear stage2 page table entries to unmap a range
730 * @kvm: The VM pointer
731 * @start: The intermediate physical base address of the range to unmap
732 * @size: The size of the area to unmap
733 *
734 * Clear a range of stage-2 mappings, lowering the various ref-counts. Must
735 * be called while holding mmu_lock (unless for freeing the stage2 pgd before
736 * destroying the VM), otherwise another faulting VCPU may come in and mess
737 * with things behind our backs.
738 */
739static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size)
740{
d4cb9df5 741 unmap_range(kvm, kvm->arch.pgd, start, size);
d5d8184d
CD
742}
743
957db105
CD
744static void stage2_unmap_memslot(struct kvm *kvm,
745 struct kvm_memory_slot *memslot)
746{
747 hva_t hva = memslot->userspace_addr;
748 phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
749 phys_addr_t size = PAGE_SIZE * memslot->npages;
750 hva_t reg_end = hva + size;
751
752 /*
753 * A memory region could potentially cover multiple VMAs, and any holes
754 * between them, so iterate over all of them to find out if we should
755 * unmap any of them.
756 *
757 * +--------------------------------------------+
758 * +---------------+----------------+ +----------------+
759 * | : VMA 1 | VMA 2 | | VMA 3 : |
760 * +---------------+----------------+ +----------------+
761 * | memory region |
762 * +--------------------------------------------+
763 */
764 do {
765 struct vm_area_struct *vma = find_vma(current->mm, hva);
766 hva_t vm_start, vm_end;
767
768 if (!vma || vma->vm_start >= reg_end)
769 break;
770
771 /*
772 * Take the intersection of this VMA with the memory region
773 */
774 vm_start = max(hva, vma->vm_start);
775 vm_end = min(reg_end, vma->vm_end);
776
777 if (!(vma->vm_flags & VM_PFNMAP)) {
778 gpa_t gpa = addr + (vm_start - memslot->userspace_addr);
779 unmap_stage2_range(kvm, gpa, vm_end - vm_start);
780 }
781 hva = vm_end;
782 } while (hva < reg_end);
783}
784
785/**
786 * stage2_unmap_vm - Unmap Stage-2 RAM mappings
787 * @kvm: The struct kvm pointer
788 *
789 * Go through the memregions and unmap any reguler RAM
790 * backing memory already mapped to the VM.
791 */
792void stage2_unmap_vm(struct kvm *kvm)
793{
794 struct kvm_memslots *slots;
795 struct kvm_memory_slot *memslot;
796 int idx;
797
798 idx = srcu_read_lock(&kvm->srcu);
799 spin_lock(&kvm->mmu_lock);
800
801 slots = kvm_memslots(kvm);
802 kvm_for_each_memslot(memslot, slots)
803 stage2_unmap_memslot(kvm, memslot);
804
805 spin_unlock(&kvm->mmu_lock);
806 srcu_read_unlock(&kvm->srcu, idx);
807}
808
d5d8184d
CD
809/**
810 * kvm_free_stage2_pgd - free all stage-2 tables
811 * @kvm: The KVM struct pointer for the VM.
812 *
813 * Walks the level-1 page table pointed to by kvm->arch.pgd and frees all
814 * underlying level-2 and level-3 tables before freeing the actual level-1 table
815 * and setting the struct pointer to NULL.
816 *
817 * Note we don't need locking here as this is only called when the VM is
818 * destroyed, which can only be done once.
819 */
820void kvm_free_stage2_pgd(struct kvm *kvm)
821{
822 if (kvm->arch.pgd == NULL)
823 return;
824
825 unmap_stage2_range(kvm, 0, KVM_PHYS_SIZE);
a987370f 826 kvm_free_hwpgd(kvm_get_hwpgd(kvm));
38f791a4
CD
827 if (KVM_PREALLOC_LEVEL > 0)
828 kfree(kvm->arch.pgd);
a987370f 829
d5d8184d
CD
830 kvm->arch.pgd = NULL;
831}
832
38f791a4 833static pud_t *stage2_get_pud(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
ad361f09 834 phys_addr_t addr)
d5d8184d
CD
835{
836 pgd_t *pgd;
837 pud_t *pud;
d5d8184d 838
04b8dc85 839 pgd = kvm->arch.pgd + kvm_pgd_index(addr);
38f791a4
CD
840 if (WARN_ON(pgd_none(*pgd))) {
841 if (!cache)
842 return NULL;
843 pud = mmu_memory_cache_alloc(cache);
844 pgd_populate(NULL, pgd, pud);
845 get_page(virt_to_page(pgd));
846 }
847
848 return pud_offset(pgd, addr);
849}
850
851static pmd_t *stage2_get_pmd(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
852 phys_addr_t addr)
853{
854 pud_t *pud;
855 pmd_t *pmd;
856
857 pud = stage2_get_pud(kvm, cache, addr);
d5d8184d
CD
858 if (pud_none(*pud)) {
859 if (!cache)
ad361f09 860 return NULL;
d5d8184d
CD
861 pmd = mmu_memory_cache_alloc(cache);
862 pud_populate(NULL, pud, pmd);
d5d8184d 863 get_page(virt_to_page(pud));
c62ee2b2
MZ
864 }
865
ad361f09
CD
866 return pmd_offset(pud, addr);
867}
868
869static int stage2_set_pmd_huge(struct kvm *kvm, struct kvm_mmu_memory_cache
870 *cache, phys_addr_t addr, const pmd_t *new_pmd)
871{
872 pmd_t *pmd, old_pmd;
873
874 pmd = stage2_get_pmd(kvm, cache, addr);
875 VM_BUG_ON(!pmd);
d5d8184d 876
ad361f09
CD
877 /*
878 * Mapping in huge pages should only happen through a fault. If a
879 * page is merged into a transparent huge page, the individual
880 * subpages of that huge page should be unmapped through MMU
881 * notifiers before we get here.
882 *
883 * Merging of CompoundPages is not supported; they should become
884 * splitting first, unmapped, merged, and mapped back in on-demand.
885 */
886 VM_BUG_ON(pmd_present(*pmd) && pmd_pfn(*pmd) != pmd_pfn(*new_pmd));
887
888 old_pmd = *pmd;
889 kvm_set_pmd(pmd, *new_pmd);
890 if (pmd_present(old_pmd))
891 kvm_tlb_flush_vmid_ipa(kvm, addr);
892 else
893 get_page(virt_to_page(pmd));
894 return 0;
895}
896
897static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
15a49a44
MS
898 phys_addr_t addr, const pte_t *new_pte,
899 unsigned long flags)
ad361f09
CD
900{
901 pmd_t *pmd;
902 pte_t *pte, old_pte;
15a49a44
MS
903 bool iomap = flags & KVM_S2PTE_FLAG_IS_IOMAP;
904 bool logging_active = flags & KVM_S2_FLAG_LOGGING_ACTIVE;
905
906 VM_BUG_ON(logging_active && !cache);
ad361f09 907
38f791a4 908 /* Create stage-2 page table mapping - Levels 0 and 1 */
ad361f09
CD
909 pmd = stage2_get_pmd(kvm, cache, addr);
910 if (!pmd) {
911 /*
912 * Ignore calls from kvm_set_spte_hva for unallocated
913 * address ranges.
914 */
915 return 0;
916 }
917
15a49a44
MS
918 /*
919 * While dirty page logging - dissolve huge PMD, then continue on to
920 * allocate page.
921 */
922 if (logging_active)
923 stage2_dissolve_pmd(kvm, addr, pmd);
924
ad361f09 925 /* Create stage-2 page mappings - Level 2 */
d5d8184d
CD
926 if (pmd_none(*pmd)) {
927 if (!cache)
928 return 0; /* ignore calls from kvm_set_spte_hva */
929 pte = mmu_memory_cache_alloc(cache);
c62ee2b2 930 kvm_clean_pte(pte);
d5d8184d 931 pmd_populate_kernel(NULL, pmd, pte);
d5d8184d 932 get_page(virt_to_page(pmd));
c62ee2b2
MZ
933 }
934
935 pte = pte_offset_kernel(pmd, addr);
d5d8184d
CD
936
937 if (iomap && pte_present(*pte))
938 return -EFAULT;
939
940 /* Create 2nd stage page table mapping - Level 3 */
941 old_pte = *pte;
942 kvm_set_pte(pte, *new_pte);
943 if (pte_present(old_pte))
48762767 944 kvm_tlb_flush_vmid_ipa(kvm, addr);
d5d8184d
CD
945 else
946 get_page(virt_to_page(pte));
947
948 return 0;
949}
950
951/**
952 * kvm_phys_addr_ioremap - map a device range to guest IPA
953 *
954 * @kvm: The KVM pointer
955 * @guest_ipa: The IPA at which to insert the mapping
956 * @pa: The physical address of the device
957 * @size: The size of the mapping
958 */
959int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
c40f2f8f 960 phys_addr_t pa, unsigned long size, bool writable)
d5d8184d
CD
961{
962 phys_addr_t addr, end;
963 int ret = 0;
964 unsigned long pfn;
965 struct kvm_mmu_memory_cache cache = { 0, };
966
967 end = (guest_ipa + size + PAGE_SIZE - 1) & PAGE_MASK;
968 pfn = __phys_to_pfn(pa);
969
970 for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) {
c62ee2b2 971 pte_t pte = pfn_pte(pfn, PAGE_S2_DEVICE);
d5d8184d 972
c40f2f8f
AB
973 if (writable)
974 kvm_set_s2pte_writable(&pte);
975
38f791a4
CD
976 ret = mmu_topup_memory_cache(&cache, KVM_MMU_CACHE_MIN_PAGES,
977 KVM_NR_MEM_OBJS);
d5d8184d
CD
978 if (ret)
979 goto out;
980 spin_lock(&kvm->mmu_lock);
15a49a44
MS
981 ret = stage2_set_pte(kvm, &cache, addr, &pte,
982 KVM_S2PTE_FLAG_IS_IOMAP);
d5d8184d
CD
983 spin_unlock(&kvm->mmu_lock);
984 if (ret)
985 goto out;
986
987 pfn++;
988 }
989
990out:
991 mmu_free_memory_cache(&cache);
992 return ret;
993}
994
9b5fdb97
CD
995static bool transparent_hugepage_adjust(pfn_t *pfnp, phys_addr_t *ipap)
996{
997 pfn_t pfn = *pfnp;
998 gfn_t gfn = *ipap >> PAGE_SHIFT;
999
1000 if (PageTransCompound(pfn_to_page(pfn))) {
1001 unsigned long mask;
1002 /*
1003 * The address we faulted on is backed by a transparent huge
1004 * page. However, because we map the compound huge page and
1005 * not the individual tail page, we need to transfer the
1006 * refcount to the head page. We have to be careful that the
1007 * THP doesn't start to split while we are adjusting the
1008 * refcounts.
1009 *
1010 * We are sure this doesn't happen, because mmu_notifier_retry
1011 * was successful and we are holding the mmu_lock, so if this
1012 * THP is trying to split, it will be blocked in the mmu
1013 * notifier before touching any of the pages, specifically
1014 * before being able to call __split_huge_page_refcount().
1015 *
1016 * We can therefore safely transfer the refcount from PG_tail
1017 * to PG_head and switch the pfn from a tail page to the head
1018 * page accordingly.
1019 */
1020 mask = PTRS_PER_PMD - 1;
1021 VM_BUG_ON((gfn & mask) != (pfn & mask));
1022 if (pfn & mask) {
1023 *ipap &= PMD_MASK;
1024 kvm_release_pfn_clean(pfn);
1025 pfn &= ~mask;
1026 kvm_get_pfn(pfn);
1027 *pfnp = pfn;
1028 }
1029
1030 return true;
1031 }
1032
1033 return false;
1034}
1035
a7d079ce
AB
1036static bool kvm_is_write_fault(struct kvm_vcpu *vcpu)
1037{
1038 if (kvm_vcpu_trap_is_iabt(vcpu))
1039 return false;
1040
1041 return kvm_vcpu_dabt_iswrite(vcpu);
1042}
1043
c6473555
MS
1044/**
1045 * stage2_wp_ptes - write protect PMD range
1046 * @pmd: pointer to pmd entry
1047 * @addr: range start address
1048 * @end: range end address
1049 */
1050static void stage2_wp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end)
1051{
1052 pte_t *pte;
1053
1054 pte = pte_offset_kernel(pmd, addr);
1055 do {
1056 if (!pte_none(*pte)) {
1057 if (!kvm_s2pte_readonly(pte))
1058 kvm_set_s2pte_readonly(pte);
1059 }
1060 } while (pte++, addr += PAGE_SIZE, addr != end);
1061}
1062
1063/**
1064 * stage2_wp_pmds - write protect PUD range
1065 * @pud: pointer to pud entry
1066 * @addr: range start address
1067 * @end: range end address
1068 */
1069static void stage2_wp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end)
1070{
1071 pmd_t *pmd;
1072 phys_addr_t next;
1073
1074 pmd = pmd_offset(pud, addr);
1075
1076 do {
1077 next = kvm_pmd_addr_end(addr, end);
1078 if (!pmd_none(*pmd)) {
1079 if (kvm_pmd_huge(*pmd)) {
1080 if (!kvm_s2pmd_readonly(pmd))
1081 kvm_set_s2pmd_readonly(pmd);
1082 } else {
1083 stage2_wp_ptes(pmd, addr, next);
1084 }
1085 }
1086 } while (pmd++, addr = next, addr != end);
1087}
1088
1089/**
1090 * stage2_wp_puds - write protect PGD range
1091 * @pgd: pointer to pgd entry
1092 * @addr: range start address
1093 * @end: range end address
1094 *
1095 * Process PUD entries, for a huge PUD we cause a panic.
1096 */
1097static void stage2_wp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end)
1098{
1099 pud_t *pud;
1100 phys_addr_t next;
1101
1102 pud = pud_offset(pgd, addr);
1103 do {
1104 next = kvm_pud_addr_end(addr, end);
1105 if (!pud_none(*pud)) {
1106 /* TODO:PUD not supported, revisit later if supported */
1107 BUG_ON(kvm_pud_huge(*pud));
1108 stage2_wp_pmds(pud, addr, next);
1109 }
1110 } while (pud++, addr = next, addr != end);
1111}
1112
1113/**
1114 * stage2_wp_range() - write protect stage2 memory region range
1115 * @kvm: The KVM pointer
1116 * @addr: Start address of range
1117 * @end: End address of range
1118 */
1119static void stage2_wp_range(struct kvm *kvm, phys_addr_t addr, phys_addr_t end)
1120{
1121 pgd_t *pgd;
1122 phys_addr_t next;
1123
04b8dc85 1124 pgd = kvm->arch.pgd + kvm_pgd_index(addr);
c6473555
MS
1125 do {
1126 /*
1127 * Release kvm_mmu_lock periodically if the memory region is
1128 * large. Otherwise, we may see kernel panics with
227ea818
CD
1129 * CONFIG_DETECT_HUNG_TASK, CONFIG_LOCKUP_DETECTOR,
1130 * CONFIG_LOCKDEP. Additionally, holding the lock too long
c6473555
MS
1131 * will also starve other vCPUs.
1132 */
1133 if (need_resched() || spin_needbreak(&kvm->mmu_lock))
1134 cond_resched_lock(&kvm->mmu_lock);
1135
1136 next = kvm_pgd_addr_end(addr, end);
1137 if (pgd_present(*pgd))
1138 stage2_wp_puds(pgd, addr, next);
1139 } while (pgd++, addr = next, addr != end);
1140}
1141
1142/**
1143 * kvm_mmu_wp_memory_region() - write protect stage 2 entries for memory slot
1144 * @kvm: The KVM pointer
1145 * @slot: The memory slot to write protect
1146 *
1147 * Called to start logging dirty pages after memory region
1148 * KVM_MEM_LOG_DIRTY_PAGES operation is called. After this function returns
1149 * all present PMD and PTEs are write protected in the memory region.
1150 * Afterwards read of dirty page log can be called.
1151 *
1152 * Acquires kvm_mmu_lock. Called with kvm->slots_lock mutex acquired,
1153 * serializing operations for VM memory regions.
1154 */
1155void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot)
1156{
9f6b8029
PB
1157 struct kvm_memslots *slots = kvm_memslots(kvm);
1158 struct kvm_memory_slot *memslot = id_to_memslot(slots, slot);
c6473555
MS
1159 phys_addr_t start = memslot->base_gfn << PAGE_SHIFT;
1160 phys_addr_t end = (memslot->base_gfn + memslot->npages) << PAGE_SHIFT;
1161
1162 spin_lock(&kvm->mmu_lock);
1163 stage2_wp_range(kvm, start, end);
1164 spin_unlock(&kvm->mmu_lock);
1165 kvm_flush_remote_tlbs(kvm);
1166}
53c810c3
MS
1167
1168/**
3b0f1d01 1169 * kvm_mmu_write_protect_pt_masked() - write protect dirty pages
53c810c3
MS
1170 * @kvm: The KVM pointer
1171 * @slot: The memory slot associated with mask
1172 * @gfn_offset: The gfn offset in memory slot
1173 * @mask: The mask of dirty pages at offset 'gfn_offset' in this memory
1174 * slot to be write protected
1175 *
1176 * Walks bits set in mask write protects the associated pte's. Caller must
1177 * acquire kvm_mmu_lock.
1178 */
3b0f1d01 1179static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
53c810c3
MS
1180 struct kvm_memory_slot *slot,
1181 gfn_t gfn_offset, unsigned long mask)
1182{
1183 phys_addr_t base_gfn = slot->base_gfn + gfn_offset;
1184 phys_addr_t start = (base_gfn + __ffs(mask)) << PAGE_SHIFT;
1185 phys_addr_t end = (base_gfn + __fls(mask) + 1) << PAGE_SHIFT;
1186
1187 stage2_wp_range(kvm, start, end);
1188}
c6473555 1189
3b0f1d01
KH
1190/*
1191 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1192 * dirty pages.
1193 *
1194 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1195 * enable dirty logging for them.
1196 */
1197void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
1198 struct kvm_memory_slot *slot,
1199 gfn_t gfn_offset, unsigned long mask)
1200{
1201 kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
1202}
1203
0d3e4d4f
MZ
1204static void coherent_cache_guest_page(struct kvm_vcpu *vcpu, pfn_t pfn,
1205 unsigned long size, bool uncached)
1206{
1207 __coherent_cache_guest_page(vcpu, pfn, size, uncached);
1208}
1209
94f8e641 1210static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
98047888 1211 struct kvm_memory_slot *memslot, unsigned long hva,
94f8e641
CD
1212 unsigned long fault_status)
1213{
94f8e641 1214 int ret;
9b5fdb97 1215 bool write_fault, writable, hugetlb = false, force_pte = false;
94f8e641 1216 unsigned long mmu_seq;
ad361f09 1217 gfn_t gfn = fault_ipa >> PAGE_SHIFT;
ad361f09 1218 struct kvm *kvm = vcpu->kvm;
94f8e641 1219 struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache;
ad361f09
CD
1220 struct vm_area_struct *vma;
1221 pfn_t pfn;
b8865767 1222 pgprot_t mem_type = PAGE_S2;
840f4bfb 1223 bool fault_ipa_uncached;
15a49a44
MS
1224 bool logging_active = memslot_is_logging(memslot);
1225 unsigned long flags = 0;
94f8e641 1226
a7d079ce 1227 write_fault = kvm_is_write_fault(vcpu);
94f8e641
CD
1228 if (fault_status == FSC_PERM && !write_fault) {
1229 kvm_err("Unexpected L2 read permission error\n");
1230 return -EFAULT;
1231 }
1232
ad361f09
CD
1233 /* Let's check if we will get back a huge page backed by hugetlbfs */
1234 down_read(&current->mm->mmap_sem);
1235 vma = find_vma_intersection(current->mm, hva, hva + 1);
37b54408
AB
1236 if (unlikely(!vma)) {
1237 kvm_err("Failed to find VMA for hva 0x%lx\n", hva);
1238 up_read(&current->mm->mmap_sem);
1239 return -EFAULT;
1240 }
1241
15a49a44 1242 if (is_vm_hugetlb_page(vma) && !logging_active) {
ad361f09
CD
1243 hugetlb = true;
1244 gfn = (fault_ipa & PMD_MASK) >> PAGE_SHIFT;
9b5fdb97
CD
1245 } else {
1246 /*
136d737f
MZ
1247 * Pages belonging to memslots that don't have the same
1248 * alignment for userspace and IPA cannot be mapped using
1249 * block descriptors even if the pages belong to a THP for
1250 * the process, because the stage-2 block descriptor will
1251 * cover more than a single THP and we loose atomicity for
1252 * unmapping, updates, and splits of the THP or other pages
1253 * in the stage-2 block range.
9b5fdb97 1254 */
136d737f
MZ
1255 if ((memslot->userspace_addr & ~PMD_MASK) !=
1256 ((memslot->base_gfn << PAGE_SHIFT) & ~PMD_MASK))
9b5fdb97 1257 force_pte = true;
ad361f09
CD
1258 }
1259 up_read(&current->mm->mmap_sem);
1260
94f8e641 1261 /* We need minimum second+third level pages */
38f791a4
CD
1262 ret = mmu_topup_memory_cache(memcache, KVM_MMU_CACHE_MIN_PAGES,
1263 KVM_NR_MEM_OBJS);
94f8e641
CD
1264 if (ret)
1265 return ret;
1266
1267 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1268 /*
1269 * Ensure the read of mmu_notifier_seq happens before we call
1270 * gfn_to_pfn_prot (which calls get_user_pages), so that we don't risk
1271 * the page we just got a reference to gets unmapped before we have a
1272 * chance to grab the mmu_lock, which ensure that if the page gets
1273 * unmapped afterwards, the call to kvm_unmap_hva will take it away
1274 * from us again properly. This smp_rmb() interacts with the smp_wmb()
1275 * in kvm_mmu_notifier_invalidate_<page|range_end>.
1276 */
1277 smp_rmb();
1278
ad361f09 1279 pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &writable);
94f8e641
CD
1280 if (is_error_pfn(pfn))
1281 return -EFAULT;
1282
15a49a44 1283 if (kvm_is_device_pfn(pfn)) {
b8865767 1284 mem_type = PAGE_S2_DEVICE;
15a49a44
MS
1285 flags |= KVM_S2PTE_FLAG_IS_IOMAP;
1286 } else if (logging_active) {
1287 /*
1288 * Faults on pages in a memslot with logging enabled
1289 * should not be mapped with huge pages (it introduces churn
1290 * and performance degradation), so force a pte mapping.
1291 */
1292 force_pte = true;
1293 flags |= KVM_S2_FLAG_LOGGING_ACTIVE;
1294
1295 /*
1296 * Only actually map the page as writable if this was a write
1297 * fault.
1298 */
1299 if (!write_fault)
1300 writable = false;
1301 }
b8865767 1302
ad361f09
CD
1303 spin_lock(&kvm->mmu_lock);
1304 if (mmu_notifier_retry(kvm, mmu_seq))
94f8e641 1305 goto out_unlock;
15a49a44 1306
9b5fdb97
CD
1307 if (!hugetlb && !force_pte)
1308 hugetlb = transparent_hugepage_adjust(&pfn, &fault_ipa);
ad361f09 1309
849260c7 1310 fault_ipa_uncached = memslot->flags & KVM_MEMSLOT_INCOHERENT;
840f4bfb 1311
ad361f09 1312 if (hugetlb) {
b8865767 1313 pmd_t new_pmd = pfn_pmd(pfn, mem_type);
ad361f09
CD
1314 new_pmd = pmd_mkhuge(new_pmd);
1315 if (writable) {
1316 kvm_set_s2pmd_writable(&new_pmd);
1317 kvm_set_pfn_dirty(pfn);
1318 }
0d3e4d4f 1319 coherent_cache_guest_page(vcpu, pfn, PMD_SIZE, fault_ipa_uncached);
ad361f09
CD
1320 ret = stage2_set_pmd_huge(kvm, memcache, fault_ipa, &new_pmd);
1321 } else {
b8865767 1322 pte_t new_pte = pfn_pte(pfn, mem_type);
15a49a44 1323
ad361f09
CD
1324 if (writable) {
1325 kvm_set_s2pte_writable(&new_pte);
1326 kvm_set_pfn_dirty(pfn);
15a49a44 1327 mark_page_dirty(kvm, gfn);
ad361f09 1328 }
0d3e4d4f 1329 coherent_cache_guest_page(vcpu, pfn, PAGE_SIZE, fault_ipa_uncached);
15a49a44 1330 ret = stage2_set_pte(kvm, memcache, fault_ipa, &new_pte, flags);
94f8e641 1331 }
ad361f09 1332
94f8e641 1333out_unlock:
ad361f09 1334 spin_unlock(&kvm->mmu_lock);
35307b9a 1335 kvm_set_pfn_accessed(pfn);
94f8e641 1336 kvm_release_pfn_clean(pfn);
ad361f09 1337 return ret;
94f8e641
CD
1338}
1339
aeda9130
MZ
1340/*
1341 * Resolve the access fault by making the page young again.
1342 * Note that because the faulting entry is guaranteed not to be
1343 * cached in the TLB, we don't need to invalidate anything.
1344 */
1345static void handle_access_fault(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa)
1346{
1347 pmd_t *pmd;
1348 pte_t *pte;
1349 pfn_t pfn;
1350 bool pfn_valid = false;
1351
1352 trace_kvm_access_fault(fault_ipa);
1353
1354 spin_lock(&vcpu->kvm->mmu_lock);
1355
1356 pmd = stage2_get_pmd(vcpu->kvm, NULL, fault_ipa);
1357 if (!pmd || pmd_none(*pmd)) /* Nothing there */
1358 goto out;
1359
1360 if (kvm_pmd_huge(*pmd)) { /* THP, HugeTLB */
1361 *pmd = pmd_mkyoung(*pmd);
1362 pfn = pmd_pfn(*pmd);
1363 pfn_valid = true;
1364 goto out;
1365 }
1366
1367 pte = pte_offset_kernel(pmd, fault_ipa);
1368 if (pte_none(*pte)) /* Nothing there either */
1369 goto out;
1370
1371 *pte = pte_mkyoung(*pte); /* Just a page... */
1372 pfn = pte_pfn(*pte);
1373 pfn_valid = true;
1374out:
1375 spin_unlock(&vcpu->kvm->mmu_lock);
1376 if (pfn_valid)
1377 kvm_set_pfn_accessed(pfn);
1378}
1379
94f8e641
CD
1380/**
1381 * kvm_handle_guest_abort - handles all 2nd stage aborts
1382 * @vcpu: the VCPU pointer
1383 * @run: the kvm_run structure
1384 *
1385 * Any abort that gets to the host is almost guaranteed to be caused by a
1386 * missing second stage translation table entry, which can mean that either the
1387 * guest simply needs more memory and we must allocate an appropriate page or it
1388 * can mean that the guest tried to access I/O memory, which is emulated by user
1389 * space. The distinction is based on the IPA causing the fault and whether this
1390 * memory region has been registered as standard RAM by user space.
1391 */
342cd0ab
CD
1392int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run)
1393{
94f8e641
CD
1394 unsigned long fault_status;
1395 phys_addr_t fault_ipa;
1396 struct kvm_memory_slot *memslot;
98047888
CD
1397 unsigned long hva;
1398 bool is_iabt, write_fault, writable;
94f8e641
CD
1399 gfn_t gfn;
1400 int ret, idx;
1401
52d1dba9 1402 is_iabt = kvm_vcpu_trap_is_iabt(vcpu);
7393b599 1403 fault_ipa = kvm_vcpu_get_fault_ipa(vcpu);
94f8e641 1404
7393b599
MZ
1405 trace_kvm_guest_fault(*vcpu_pc(vcpu), kvm_vcpu_get_hsr(vcpu),
1406 kvm_vcpu_get_hfar(vcpu), fault_ipa);
94f8e641
CD
1407
1408 /* Check the stage-2 fault is trans. fault or write fault */
0496daa5 1409 fault_status = kvm_vcpu_trap_get_fault_type(vcpu);
35307b9a
MZ
1410 if (fault_status != FSC_FAULT && fault_status != FSC_PERM &&
1411 fault_status != FSC_ACCESS) {
0496daa5
CD
1412 kvm_err("Unsupported FSC: EC=%#x xFSC=%#lx ESR_EL2=%#lx\n",
1413 kvm_vcpu_trap_get_class(vcpu),
1414 (unsigned long)kvm_vcpu_trap_get_fault(vcpu),
1415 (unsigned long)kvm_vcpu_get_hsr(vcpu));
94f8e641
CD
1416 return -EFAULT;
1417 }
1418
1419 idx = srcu_read_lock(&vcpu->kvm->srcu);
1420
1421 gfn = fault_ipa >> PAGE_SHIFT;
98047888
CD
1422 memslot = gfn_to_memslot(vcpu->kvm, gfn);
1423 hva = gfn_to_hva_memslot_prot(memslot, gfn, &writable);
a7d079ce 1424 write_fault = kvm_is_write_fault(vcpu);
98047888 1425 if (kvm_is_error_hva(hva) || (write_fault && !writable)) {
94f8e641
CD
1426 if (is_iabt) {
1427 /* Prefetch Abort on I/O address */
7393b599 1428 kvm_inject_pabt(vcpu, kvm_vcpu_get_hfar(vcpu));
94f8e641
CD
1429 ret = 1;
1430 goto out_unlock;
1431 }
1432
cfe3950c
MZ
1433 /*
1434 * The IPA is reported as [MAX:12], so we need to
1435 * complement it with the bottom 12 bits from the
1436 * faulting VA. This is always 12 bits, irrespective
1437 * of the page size.
1438 */
1439 fault_ipa |= kvm_vcpu_get_hfar(vcpu) & ((1 << 12) - 1);
45e96ea6 1440 ret = io_mem_abort(vcpu, run, fault_ipa);
94f8e641
CD
1441 goto out_unlock;
1442 }
1443
c3058d5d
CD
1444 /* Userspace should not be able to register out-of-bounds IPAs */
1445 VM_BUG_ON(fault_ipa >= KVM_PHYS_SIZE);
1446
aeda9130
MZ
1447 if (fault_status == FSC_ACCESS) {
1448 handle_access_fault(vcpu, fault_ipa);
1449 ret = 1;
1450 goto out_unlock;
1451 }
1452
98047888 1453 ret = user_mem_abort(vcpu, fault_ipa, memslot, hva, fault_status);
94f8e641
CD
1454 if (ret == 0)
1455 ret = 1;
1456out_unlock:
1457 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1458 return ret;
342cd0ab
CD
1459}
1460
1d2ebacc
MZ
1461static int handle_hva_to_gpa(struct kvm *kvm,
1462 unsigned long start,
1463 unsigned long end,
1464 int (*handler)(struct kvm *kvm,
1465 gpa_t gpa, void *data),
1466 void *data)
d5d8184d
CD
1467{
1468 struct kvm_memslots *slots;
1469 struct kvm_memory_slot *memslot;
1d2ebacc 1470 int ret = 0;
d5d8184d
CD
1471
1472 slots = kvm_memslots(kvm);
1473
1474 /* we only care about the pages that the guest sees */
1475 kvm_for_each_memslot(memslot, slots) {
1476 unsigned long hva_start, hva_end;
1477 gfn_t gfn, gfn_end;
1478
1479 hva_start = max(start, memslot->userspace_addr);
1480 hva_end = min(end, memslot->userspace_addr +
1481 (memslot->npages << PAGE_SHIFT));
1482 if (hva_start >= hva_end)
1483 continue;
1484
1485 /*
1486 * {gfn(page) | page intersects with [hva_start, hva_end)} =
1487 * {gfn_start, gfn_start+1, ..., gfn_end-1}.
1488 */
1489 gfn = hva_to_gfn_memslot(hva_start, memslot);
1490 gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
1491
1492 for (; gfn < gfn_end; ++gfn) {
1493 gpa_t gpa = gfn << PAGE_SHIFT;
1d2ebacc 1494 ret |= handler(kvm, gpa, data);
d5d8184d
CD
1495 }
1496 }
1d2ebacc
MZ
1497
1498 return ret;
d5d8184d
CD
1499}
1500
1d2ebacc 1501static int kvm_unmap_hva_handler(struct kvm *kvm, gpa_t gpa, void *data)
d5d8184d
CD
1502{
1503 unmap_stage2_range(kvm, gpa, PAGE_SIZE);
1d2ebacc 1504 return 0;
d5d8184d
CD
1505}
1506
1507int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
1508{
1509 unsigned long end = hva + PAGE_SIZE;
1510
1511 if (!kvm->arch.pgd)
1512 return 0;
1513
1514 trace_kvm_unmap_hva(hva);
1515 handle_hva_to_gpa(kvm, hva, end, &kvm_unmap_hva_handler, NULL);
1516 return 0;
1517}
1518
1519int kvm_unmap_hva_range(struct kvm *kvm,
1520 unsigned long start, unsigned long end)
1521{
1522 if (!kvm->arch.pgd)
1523 return 0;
1524
1525 trace_kvm_unmap_hva_range(start, end);
1526 handle_hva_to_gpa(kvm, start, end, &kvm_unmap_hva_handler, NULL);
1527 return 0;
1528}
1529
1d2ebacc 1530static int kvm_set_spte_handler(struct kvm *kvm, gpa_t gpa, void *data)
d5d8184d
CD
1531{
1532 pte_t *pte = (pte_t *)data;
1533
15a49a44
MS
1534 /*
1535 * We can always call stage2_set_pte with KVM_S2PTE_FLAG_LOGGING_ACTIVE
1536 * flag clear because MMU notifiers will have unmapped a huge PMD before
1537 * calling ->change_pte() (which in turn calls kvm_set_spte_hva()) and
1538 * therefore stage2_set_pte() never needs to clear out a huge PMD
1539 * through this calling path.
1540 */
1541 stage2_set_pte(kvm, NULL, gpa, pte, 0);
1d2ebacc 1542 return 0;
d5d8184d
CD
1543}
1544
1545
1546void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
1547{
1548 unsigned long end = hva + PAGE_SIZE;
1549 pte_t stage2_pte;
1550
1551 if (!kvm->arch.pgd)
1552 return;
1553
1554 trace_kvm_set_spte_hva(hva);
1555 stage2_pte = pfn_pte(pte_pfn(pte), PAGE_S2);
1556 handle_hva_to_gpa(kvm, hva, end, &kvm_set_spte_handler, &stage2_pte);
1557}
1558
35307b9a
MZ
1559static int kvm_age_hva_handler(struct kvm *kvm, gpa_t gpa, void *data)
1560{
1561 pmd_t *pmd;
1562 pte_t *pte;
1563
1564 pmd = stage2_get_pmd(kvm, NULL, gpa);
1565 if (!pmd || pmd_none(*pmd)) /* Nothing there */
1566 return 0;
1567
1568 if (kvm_pmd_huge(*pmd)) { /* THP, HugeTLB */
1569 if (pmd_young(*pmd)) {
1570 *pmd = pmd_mkold(*pmd);
1571 return 1;
1572 }
1573
1574 return 0;
1575 }
1576
1577 pte = pte_offset_kernel(pmd, gpa);
1578 if (pte_none(*pte))
1579 return 0;
1580
1581 if (pte_young(*pte)) {
1582 *pte = pte_mkold(*pte); /* Just a page... */
1583 return 1;
1584 }
1585
1586 return 0;
1587}
1588
1589static int kvm_test_age_hva_handler(struct kvm *kvm, gpa_t gpa, void *data)
1590{
1591 pmd_t *pmd;
1592 pte_t *pte;
1593
1594 pmd = stage2_get_pmd(kvm, NULL, gpa);
1595 if (!pmd || pmd_none(*pmd)) /* Nothing there */
1596 return 0;
1597
1598 if (kvm_pmd_huge(*pmd)) /* THP, HugeTLB */
1599 return pmd_young(*pmd);
1600
1601 pte = pte_offset_kernel(pmd, gpa);
1602 if (!pte_none(*pte)) /* Just a page... */
1603 return pte_young(*pte);
1604
1605 return 0;
1606}
1607
1608int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
1609{
1610 trace_kvm_age_hva(start, end);
1611 return handle_hva_to_gpa(kvm, start, end, kvm_age_hva_handler, NULL);
1612}
1613
1614int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
1615{
1616 trace_kvm_test_age_hva(hva);
1617 return handle_hva_to_gpa(kvm, hva, hva, kvm_test_age_hva_handler, NULL);
1618}
1619
d5d8184d
CD
1620void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu)
1621{
1622 mmu_free_memory_cache(&vcpu->arch.mmu_page_cache);
1623}
1624
342cd0ab
CD
1625phys_addr_t kvm_mmu_get_httbr(void)
1626{
e4c5a685
AB
1627 if (__kvm_cpu_uses_extended_idmap())
1628 return virt_to_phys(merged_hyp_pgd);
1629 else
1630 return virt_to_phys(hyp_pgd);
342cd0ab
CD
1631}
1632
5a677ce0
MZ
1633phys_addr_t kvm_mmu_get_boot_httbr(void)
1634{
e4c5a685
AB
1635 if (__kvm_cpu_uses_extended_idmap())
1636 return virt_to_phys(merged_hyp_pgd);
1637 else
1638 return virt_to_phys(boot_hyp_pgd);
5a677ce0
MZ
1639}
1640
1641phys_addr_t kvm_get_idmap_vector(void)
1642{
1643 return hyp_idmap_vector;
1644}
1645
342cd0ab
CD
1646int kvm_mmu_init(void)
1647{
2fb41059
MZ
1648 int err;
1649
4fda342c
SS
1650 hyp_idmap_start = kvm_virt_to_phys(__hyp_idmap_text_start);
1651 hyp_idmap_end = kvm_virt_to_phys(__hyp_idmap_text_end);
1652 hyp_idmap_vector = kvm_virt_to_phys(__kvm_hyp_init);
5a677ce0 1653
06f75a1f
AB
1654 /*
1655 * We rely on the linker script to ensure at build time that the HYP
1656 * init code does not cross a page boundary.
1657 */
1658 BUG_ON((hyp_idmap_start ^ (hyp_idmap_end - 1)) & PAGE_MASK);
5a677ce0 1659
38f791a4
CD
1660 hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, hyp_pgd_order);
1661 boot_hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, hyp_pgd_order);
5d4e08c4 1662
5a677ce0 1663 if (!hyp_pgd || !boot_hyp_pgd) {
d5d8184d 1664 kvm_err("Hyp mode PGD not allocated\n");
2fb41059
MZ
1665 err = -ENOMEM;
1666 goto out;
1667 }
1668
1669 /* Create the idmap in the boot page tables */
1670 err = __create_hyp_mappings(boot_hyp_pgd,
1671 hyp_idmap_start, hyp_idmap_end,
1672 __phys_to_pfn(hyp_idmap_start),
1673 PAGE_HYP);
1674
1675 if (err) {
1676 kvm_err("Failed to idmap %lx-%lx\n",
1677 hyp_idmap_start, hyp_idmap_end);
1678 goto out;
d5d8184d
CD
1679 }
1680
e4c5a685
AB
1681 if (__kvm_cpu_uses_extended_idmap()) {
1682 merged_hyp_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1683 if (!merged_hyp_pgd) {
1684 kvm_err("Failed to allocate extra HYP pgd\n");
1685 goto out;
1686 }
1687 __kvm_extend_hypmap(boot_hyp_pgd, hyp_pgd, merged_hyp_pgd,
1688 hyp_idmap_start);
1689 return 0;
1690 }
1691
5a677ce0
MZ
1692 /* Map the very same page at the trampoline VA */
1693 err = __create_hyp_mappings(boot_hyp_pgd,
1694 TRAMPOLINE_VA, TRAMPOLINE_VA + PAGE_SIZE,
1695 __phys_to_pfn(hyp_idmap_start),
1696 PAGE_HYP);
1697 if (err) {
1698 kvm_err("Failed to map trampoline @%lx into boot HYP pgd\n",
1699 TRAMPOLINE_VA);
1700 goto out;
1701 }
1702
1703 /* Map the same page again into the runtime page tables */
1704 err = __create_hyp_mappings(hyp_pgd,
1705 TRAMPOLINE_VA, TRAMPOLINE_VA + PAGE_SIZE,
1706 __phys_to_pfn(hyp_idmap_start),
1707 PAGE_HYP);
1708 if (err) {
1709 kvm_err("Failed to map trampoline @%lx into runtime HYP pgd\n",
1710 TRAMPOLINE_VA);
1711 goto out;
1712 }
1713
d5d8184d 1714 return 0;
2fb41059 1715out:
4f728276 1716 free_hyp_pgds();
2fb41059 1717 return err;
342cd0ab 1718}
df6ce24f
EA
1719
1720void kvm_arch_commit_memory_region(struct kvm *kvm,
09170a49 1721 const struct kvm_userspace_memory_region *mem,
df6ce24f 1722 const struct kvm_memory_slot *old,
f36f3f28 1723 const struct kvm_memory_slot *new,
df6ce24f
EA
1724 enum kvm_mr_change change)
1725{
c6473555
MS
1726 /*
1727 * At this point memslot has been committed and there is an
1728 * allocated dirty_bitmap[], dirty pages will be be tracked while the
1729 * memory slot is write protected.
1730 */
1731 if (change != KVM_MR_DELETE && mem->flags & KVM_MEM_LOG_DIRTY_PAGES)
1732 kvm_mmu_wp_memory_region(kvm, mem->slot);
df6ce24f
EA
1733}
1734
1735int kvm_arch_prepare_memory_region(struct kvm *kvm,
1736 struct kvm_memory_slot *memslot,
09170a49 1737 const struct kvm_userspace_memory_region *mem,
df6ce24f
EA
1738 enum kvm_mr_change change)
1739{
8eef9123
AB
1740 hva_t hva = mem->userspace_addr;
1741 hva_t reg_end = hva + mem->memory_size;
1742 bool writable = !(mem->flags & KVM_MEM_READONLY);
1743 int ret = 0;
1744
15a49a44
MS
1745 if (change != KVM_MR_CREATE && change != KVM_MR_MOVE &&
1746 change != KVM_MR_FLAGS_ONLY)
8eef9123
AB
1747 return 0;
1748
c3058d5d
CD
1749 /*
1750 * Prevent userspace from creating a memory region outside of the IPA
1751 * space addressable by the KVM guest IPA space.
1752 */
1753 if (memslot->base_gfn + memslot->npages >=
1754 (KVM_PHYS_SIZE >> PAGE_SHIFT))
1755 return -EFAULT;
1756
8eef9123
AB
1757 /*
1758 * A memory region could potentially cover multiple VMAs, and any holes
1759 * between them, so iterate over all of them to find out if we can map
1760 * any of them right now.
1761 *
1762 * +--------------------------------------------+
1763 * +---------------+----------------+ +----------------+
1764 * | : VMA 1 | VMA 2 | | VMA 3 : |
1765 * +---------------+----------------+ +----------------+
1766 * | memory region |
1767 * +--------------------------------------------+
1768 */
1769 do {
1770 struct vm_area_struct *vma = find_vma(current->mm, hva);
1771 hva_t vm_start, vm_end;
1772
1773 if (!vma || vma->vm_start >= reg_end)
1774 break;
1775
1776 /*
1777 * Mapping a read-only VMA is only allowed if the
1778 * memory region is configured as read-only.
1779 */
1780 if (writable && !(vma->vm_flags & VM_WRITE)) {
1781 ret = -EPERM;
1782 break;
1783 }
1784
1785 /*
1786 * Take the intersection of this VMA with the memory region
1787 */
1788 vm_start = max(hva, vma->vm_start);
1789 vm_end = min(reg_end, vma->vm_end);
1790
1791 if (vma->vm_flags & VM_PFNMAP) {
1792 gpa_t gpa = mem->guest_phys_addr +
1793 (vm_start - mem->userspace_addr);
ca09f02f
MM
1794 phys_addr_t pa;
1795
1796 pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT;
1797 pa += vm_start - vma->vm_start;
8eef9123 1798
15a49a44
MS
1799 /* IO region dirty page logging not allowed */
1800 if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES)
1801 return -EINVAL;
1802
8eef9123
AB
1803 ret = kvm_phys_addr_ioremap(kvm, gpa, pa,
1804 vm_end - vm_start,
1805 writable);
1806 if (ret)
1807 break;
1808 }
1809 hva = vm_end;
1810 } while (hva < reg_end);
1811
15a49a44
MS
1812 if (change == KVM_MR_FLAGS_ONLY)
1813 return ret;
1814
849260c7
AB
1815 spin_lock(&kvm->mmu_lock);
1816 if (ret)
8eef9123 1817 unmap_stage2_range(kvm, mem->guest_phys_addr, mem->memory_size);
849260c7
AB
1818 else
1819 stage2_flush_memslot(kvm, memslot);
1820 spin_unlock(&kvm->mmu_lock);
8eef9123 1821 return ret;
df6ce24f
EA
1822}
1823
1824void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
1825 struct kvm_memory_slot *dont)
1826{
1827}
1828
1829int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
1830 unsigned long npages)
1831{
849260c7
AB
1832 /*
1833 * Readonly memslots are not incoherent with the caches by definition,
1834 * but in practice, they are used mostly to emulate ROMs or NOR flashes
1835 * that the guest may consider devices and hence map as uncached.
1836 * To prevent incoherency issues in these cases, tag all readonly
1837 * regions as incoherent.
1838 */
1839 if (slot->flags & KVM_MEM_READONLY)
1840 slot->flags |= KVM_MEMSLOT_INCOHERENT;
df6ce24f
EA
1841 return 0;
1842}
1843
15f46015 1844void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
df6ce24f
EA
1845{
1846}
1847
1848void kvm_arch_flush_shadow_all(struct kvm *kvm)
1849{
1850}
1851
1852void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
1853 struct kvm_memory_slot *slot)
1854{
8eef9123
AB
1855 gpa_t gpa = slot->base_gfn << PAGE_SHIFT;
1856 phys_addr_t size = slot->npages << PAGE_SHIFT;
1857
1858 spin_lock(&kvm->mmu_lock);
1859 unmap_stage2_range(kvm, gpa, size);
1860 spin_unlock(&kvm->mmu_lock);
df6ce24f 1861}
3c1e7165
MZ
1862
1863/*
1864 * See note at ARMv7 ARM B1.14.4 (TL;DR: S/W ops are not easily virtualized).
1865 *
1866 * Main problems:
1867 * - S/W ops are local to a CPU (not broadcast)
1868 * - We have line migration behind our back (speculation)
1869 * - System caches don't support S/W at all (damn!)
1870 *
1871 * In the face of the above, the best we can do is to try and convert
1872 * S/W ops to VA ops. Because the guest is not allowed to infer the
1873 * S/W to PA mapping, it can only use S/W to nuke the whole cache,
1874 * which is a rather good thing for us.
1875 *
1876 * Also, it is only used when turning caches on/off ("The expected
1877 * usage of the cache maintenance instructions that operate by set/way
1878 * is associated with the cache maintenance instructions associated
1879 * with the powerdown and powerup of caches, if this is required by
1880 * the implementation.").
1881 *
1882 * We use the following policy:
1883 *
1884 * - If we trap a S/W operation, we enable VM trapping to detect
1885 * caches being turned on/off, and do a full clean.
1886 *
1887 * - We flush the caches on both caches being turned on and off.
1888 *
1889 * - Once the caches are enabled, we stop trapping VM ops.
1890 */
1891void kvm_set_way_flush(struct kvm_vcpu *vcpu)
1892{
1893 unsigned long hcr = vcpu_get_hcr(vcpu);
1894
1895 /*
1896 * If this is the first time we do a S/W operation
1897 * (i.e. HCR_TVM not set) flush the whole memory, and set the
1898 * VM trapping.
1899 *
1900 * Otherwise, rely on the VM trapping to wait for the MMU +
1901 * Caches to be turned off. At that point, we'll be able to
1902 * clean the caches again.
1903 */
1904 if (!(hcr & HCR_TVM)) {
1905 trace_kvm_set_way_flush(*vcpu_pc(vcpu),
1906 vcpu_has_cache_enabled(vcpu));
1907 stage2_flush_vm(vcpu->kvm);
1908 vcpu_set_hcr(vcpu, hcr | HCR_TVM);
1909 }
1910}
1911
1912void kvm_toggle_cache(struct kvm_vcpu *vcpu, bool was_enabled)
1913{
1914 bool now_enabled = vcpu_has_cache_enabled(vcpu);
1915
1916 /*
1917 * If switching the MMU+caches on, need to invalidate the caches.
1918 * If switching it off, need to clean the caches.
1919 * Clean + invalidate does the trick always.
1920 */
1921 if (now_enabled != was_enabled)
1922 stage2_flush_vm(vcpu->kvm);
1923
1924 /* Caches are now on, stop trapping VM ops (until a S/W op) */
1925 if (now_enabled)
1926 vcpu_set_hcr(vcpu, vcpu_get_hcr(vcpu) & ~HCR_TVM);
1927
1928 trace_kvm_toggle_cache(*vcpu_pc(vcpu), was_enabled, now_enabled);
1929}