[mirror_ubuntu-artful-kernel.git] / arch / arm / kvm / reset.c

/*
 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, version 2, as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
 */
#include <linux/compiler.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kvm_host.h>
#include <linux/kvm.h>

#include <asm/unified.h>
#include <asm/ptrace.h>
#include <asm/cputype.h>
#include <asm/kvm_arm.h>
#include <asm/kvm_coproc.h>

#include <kvm/arm_arch_timer.h>

/******************************************************************************
 * Cortex-A15 and Cortex-A7 Reset Values
 */

static struct kvm_regs cortexa_regs_reset = {
	.usr_regs.ARM_cpsr = SVC_MODE | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT,
};

static const struct kvm_irq_level cortexa_ptimer_irq = {
	{ .irq = 30 },
	.level = 1,
};

static const struct kvm_irq_level cortexa_vtimer_irq = {
	{ .irq = 27 },
	.level = 1,
};


/*******************************************************************************
 * Exported reset function
 */

/**
 * kvm_reset_vcpu - sets core registers and cp15 registers to reset value
 * @vcpu: The VCPU pointer
 *
 * This function finds the right table above and sets the registers on the
 * virtual CPU struct to their architecturally defined reset values.
 */
int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
{
	struct kvm_regs *reset_regs;
	const struct kvm_irq_level *cpu_vtimer_irq;
	const struct kvm_irq_level *cpu_ptimer_irq;

	switch (vcpu->arch.target) {
	case KVM_ARM_TARGET_CORTEX_A7:
	case KVM_ARM_TARGET_CORTEX_A15:
		reset_regs = &cortexa_regs_reset;
		vcpu->arch.midr = read_cpuid_id();
		cpu_vtimer_irq = &cortexa_vtimer_irq;
		cpu_ptimer_irq = &cortexa_ptimer_irq;
		break;
	default:
		return -ENODEV;
	}

	/* Reset core registers */
	memcpy(&vcpu->arch.ctxt.gp_regs, reset_regs, sizeof(vcpu->arch.ctxt.gp_regs));

	/* Reset CP15 registers */
	kvm_reset_coprocs(vcpu);

	/* Reset arch_timer context */
	return kvm_timer_vcpu_reset(vcpu, cpu_vtimer_irq, cpu_ptimer_irq);
}
Commit	Line	Data
749cf76c CD	1	/*
	2	* Copyright (C) 2012 - Virtual Open Systems and Columbia University
	3	* Author: Christoffer Dall <c.dall@virtualopensystems.com>
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License, version 2, as
	7	* published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
	17	*/
	18	#include <linux/compiler.h>
	19	#include <linux/errno.h>
	20	#include <linux/sched.h>
	21	#include <linux/kvm_host.h>
	22	#include <linux/kvm.h>
	23
	24	#include <asm/unified.h>
	25	#include <asm/ptrace.h>
	26	#include <asm/cputype.h>
	27	#include <asm/kvm_arm.h>
	28	#include <asm/kvm_coproc.h>
	29
5ae7f87a AP	30	#include <kvm/arm_arch_timer.h>
5ae7f87a AP	31
749cf76c	32	/******************************************************************************
e8c2d99f	33	* Cortex-A15 and Cortex-A7 Reset Values
749cf76c CD	34	*/
749cf76c CD	35
e8c2d99f	36	static struct kvm_regs cortexa_regs_reset = {
749cf76c CD	37	.usr_regs.ARM_cpsr = SVC_MODE \| PSR_A_BIT \| PSR_I_BIT \| PSR_F_BIT,
	38	};
	39
a91d1855 JL	40	static const struct kvm_irq_level cortexa_ptimer_irq = {
	41	{ .irq = 30 },
	42	.level = 1,
	43	};
	44
e8c2d99f	45	static const struct kvm_irq_level cortexa_vtimer_irq = {
6833d838	46	{ .irq = 27 },
5ae7f87a AP	47	.level = 1,
	48	};
	49
749cf76c CD	50
	51	/*******************************************************************************
	52	* Exported reset function
	53	*/
	54
	55	/**
	56	* kvm_reset_vcpu - sets core registers and cp15 registers to reset value
	57	* @vcpu: The VCPU pointer
	58	*
	59	* This function finds the right table above and sets the registers on the
6a727b0b	60	* virtual CPU struct to their architecturally defined reset values.
749cf76c CD	61	*/
	62	int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
	63	{
ac570e04	64	struct kvm_regs *reset_regs;
5ae7f87a	65	const struct kvm_irq_level *cpu_vtimer_irq;
a91d1855	66	const struct kvm_irq_level *cpu_ptimer_irq;
749cf76c CD	67
749cf76c CD	68	switch (vcpu->arch.target) {
e8c2d99f	69	case KVM_ARM_TARGET_CORTEX_A7:
749cf76c	70	case KVM_ARM_TARGET_CORTEX_A15:
13acfd57	71	reset_regs = &cortexa_regs_reset;
749cf76c	72	vcpu->arch.midr = read_cpuid_id();
e8c2d99f	73	cpu_vtimer_irq = &cortexa_vtimer_irq;
a91d1855	74	cpu_ptimer_irq = &cortexa_ptimer_irq;
749cf76c CD	75	break;
	76	default:
	77	return -ENODEV;
	78	}
	79
	80	/* Reset core registers */
c2a8dab5	81	memcpy(&vcpu->arch.ctxt.gp_regs, reset_regs, sizeof(vcpu->arch.ctxt.gp_regs));
749cf76c CD	82
	83	/* Reset CP15 registers */
	84	kvm_reset_coprocs(vcpu);
	85
5ae7f87a	86	/* Reset arch_timer context */
a91d1855	87	return kvm_timer_vcpu_reset(vcpu, cpu_vtimer_irq, cpu_ptimer_irq);
749cf76c	88	}