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b2c65616 AV |
1 | /* |
2 | * arch/arm/mach-at91/at91sam9263.c | |
3 | * | |
4 | * Copyright (C) 2007 Atmel Corporation. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | */ | |
12 | ||
13 | #include <linux/module.h> | |
14 | ||
c9dfafba | 15 | #include <asm/proc-fns.h> |
80b02c17 | 16 | #include <asm/irq.h> |
b2c65616 AV |
17 | #include <asm/mach/arch.h> |
18 | #include <asm/mach/map.h> | |
9f97da78 | 19 | #include <asm/system_misc.h> |
a09e64fb | 20 | #include <mach/at91sam9263.h> |
8fe82a55 | 21 | #include <mach/at91_aic.h> |
a09e64fb RK |
22 | #include <mach/at91_pmc.h> |
23 | #include <mach/at91_rstc.h> | |
b2c65616 | 24 | |
21d08b9d | 25 | #include "soc.h" |
b2c65616 AV |
26 | #include "generic.h" |
27 | #include "clock.h" | |
faee0cc3 | 28 | #include "sam9_smc.h" |
b2c65616 | 29 | |
b2c65616 AV |
30 | /* -------------------------------------------------------------------- |
31 | * Clocks | |
32 | * -------------------------------------------------------------------- */ | |
33 | ||
34 | /* | |
35 | * The peripheral clocks. | |
36 | */ | |
37 | static struct clk pioA_clk = { | |
38 | .name = "pioA_clk", | |
39 | .pmc_mask = 1 << AT91SAM9263_ID_PIOA, | |
40 | .type = CLK_TYPE_PERIPHERAL, | |
41 | }; | |
42 | static struct clk pioB_clk = { | |
43 | .name = "pioB_clk", | |
44 | .pmc_mask = 1 << AT91SAM9263_ID_PIOB, | |
45 | .type = CLK_TYPE_PERIPHERAL, | |
46 | }; | |
47 | static struct clk pioCDE_clk = { | |
48 | .name = "pioCDE_clk", | |
49 | .pmc_mask = 1 << AT91SAM9263_ID_PIOCDE, | |
50 | .type = CLK_TYPE_PERIPHERAL, | |
51 | }; | |
52 | static struct clk usart0_clk = { | |
53 | .name = "usart0_clk", | |
54 | .pmc_mask = 1 << AT91SAM9263_ID_US0, | |
55 | .type = CLK_TYPE_PERIPHERAL, | |
56 | }; | |
57 | static struct clk usart1_clk = { | |
58 | .name = "usart1_clk", | |
59 | .pmc_mask = 1 << AT91SAM9263_ID_US1, | |
60 | .type = CLK_TYPE_PERIPHERAL, | |
61 | }; | |
62 | static struct clk usart2_clk = { | |
63 | .name = "usart2_clk", | |
64 | .pmc_mask = 1 << AT91SAM9263_ID_US2, | |
65 | .type = CLK_TYPE_PERIPHERAL, | |
66 | }; | |
67 | static struct clk mmc0_clk = { | |
68 | .name = "mci0_clk", | |
69 | .pmc_mask = 1 << AT91SAM9263_ID_MCI0, | |
70 | .type = CLK_TYPE_PERIPHERAL, | |
71 | }; | |
72 | static struct clk mmc1_clk = { | |
73 | .name = "mci1_clk", | |
74 | .pmc_mask = 1 << AT91SAM9263_ID_MCI1, | |
75 | .type = CLK_TYPE_PERIPHERAL, | |
76 | }; | |
e8788bab AV |
77 | static struct clk can_clk = { |
78 | .name = "can_clk", | |
79 | .pmc_mask = 1 << AT91SAM9263_ID_CAN, | |
80 | .type = CLK_TYPE_PERIPHERAL, | |
81 | }; | |
b2c65616 AV |
82 | static struct clk twi_clk = { |
83 | .name = "twi_clk", | |
84 | .pmc_mask = 1 << AT91SAM9263_ID_TWI, | |
85 | .type = CLK_TYPE_PERIPHERAL, | |
86 | }; | |
87 | static struct clk spi0_clk = { | |
88 | .name = "spi0_clk", | |
89 | .pmc_mask = 1 << AT91SAM9263_ID_SPI0, | |
90 | .type = CLK_TYPE_PERIPHERAL, | |
91 | }; | |
92 | static struct clk spi1_clk = { | |
93 | .name = "spi1_clk", | |
94 | .pmc_mask = 1 << AT91SAM9263_ID_SPI1, | |
95 | .type = CLK_TYPE_PERIPHERAL, | |
96 | }; | |
e8788bab AV |
97 | static struct clk ssc0_clk = { |
98 | .name = "ssc0_clk", | |
99 | .pmc_mask = 1 << AT91SAM9263_ID_SSC0, | |
100 | .type = CLK_TYPE_PERIPHERAL, | |
101 | }; | |
102 | static struct clk ssc1_clk = { | |
103 | .name = "ssc1_clk", | |
104 | .pmc_mask = 1 << AT91SAM9263_ID_SSC1, | |
105 | .type = CLK_TYPE_PERIPHERAL, | |
106 | }; | |
107 | static struct clk ac97_clk = { | |
108 | .name = "ac97_clk", | |
109 | .pmc_mask = 1 << AT91SAM9263_ID_AC97C, | |
110 | .type = CLK_TYPE_PERIPHERAL, | |
111 | }; | |
b2c65616 AV |
112 | static struct clk tcb_clk = { |
113 | .name = "tcb_clk", | |
114 | .pmc_mask = 1 << AT91SAM9263_ID_TCB, | |
115 | .type = CLK_TYPE_PERIPHERAL, | |
116 | }; | |
bb1ad68b AV |
117 | static struct clk pwm_clk = { |
118 | .name = "pwm_clk", | |
e8788bab AV |
119 | .pmc_mask = 1 << AT91SAM9263_ID_PWMC, |
120 | .type = CLK_TYPE_PERIPHERAL, | |
121 | }; | |
69b2e99c | 122 | static struct clk macb_clk = { |
865d605e | 123 | .name = "pclk", |
b2c65616 AV |
124 | .pmc_mask = 1 << AT91SAM9263_ID_EMAC, |
125 | .type = CLK_TYPE_PERIPHERAL, | |
126 | }; | |
e8788bab AV |
127 | static struct clk dma_clk = { |
128 | .name = "dma_clk", | |
129 | .pmc_mask = 1 << AT91SAM9263_ID_DMA, | |
130 | .type = CLK_TYPE_PERIPHERAL, | |
131 | }; | |
132 | static struct clk twodge_clk = { | |
133 | .name = "2dge_clk", | |
134 | .pmc_mask = 1 << AT91SAM9263_ID_2DGE, | |
135 | .type = CLK_TYPE_PERIPHERAL, | |
136 | }; | |
b2c65616 AV |
137 | static struct clk udc_clk = { |
138 | .name = "udc_clk", | |
139 | .pmc_mask = 1 << AT91SAM9263_ID_UDP, | |
140 | .type = CLK_TYPE_PERIPHERAL, | |
141 | }; | |
142 | static struct clk isi_clk = { | |
143 | .name = "isi_clk", | |
144 | .pmc_mask = 1 << AT91SAM9263_ID_ISI, | |
145 | .type = CLK_TYPE_PERIPHERAL, | |
146 | }; | |
147 | static struct clk lcdc_clk = { | |
148 | .name = "lcdc_clk", | |
7f6e2d99 | 149 | .pmc_mask = 1 << AT91SAM9263_ID_LCDC, |
b2c65616 AV |
150 | .type = CLK_TYPE_PERIPHERAL, |
151 | }; | |
152 | static struct clk ohci_clk = { | |
153 | .name = "ohci_clk", | |
154 | .pmc_mask = 1 << AT91SAM9263_ID_UHP, | |
155 | .type = CLK_TYPE_PERIPHERAL, | |
156 | }; | |
157 | ||
158 | static struct clk *periph_clocks[] __initdata = { | |
159 | &pioA_clk, | |
160 | &pioB_clk, | |
161 | &pioCDE_clk, | |
162 | &usart0_clk, | |
163 | &usart1_clk, | |
164 | &usart2_clk, | |
165 | &mmc0_clk, | |
166 | &mmc1_clk, | |
e8788bab | 167 | &can_clk, |
b2c65616 AV |
168 | &twi_clk, |
169 | &spi0_clk, | |
170 | &spi1_clk, | |
e8788bab AV |
171 | &ssc0_clk, |
172 | &ssc1_clk, | |
173 | &ac97_clk, | |
b2c65616 | 174 | &tcb_clk, |
bb1ad68b | 175 | &pwm_clk, |
69b2e99c | 176 | &macb_clk, |
e8788bab | 177 | &twodge_clk, |
b2c65616 AV |
178 | &udc_clk, |
179 | &isi_clk, | |
180 | &lcdc_clk, | |
e8788bab | 181 | &dma_clk, |
b2c65616 AV |
182 | &ohci_clk, |
183 | // irq0 .. irq1 | |
184 | }; | |
185 | ||
bd602995 | 186 | static struct clk_lookup periph_clocks_lookups[] = { |
865d605e JI |
187 | /* One additional fake clock for macb_hclk */ |
188 | CLKDEV_CON_ID("hclk", &macb_clk), | |
636036d2 BS |
189 | CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.0", &ssc0_clk), |
190 | CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.1", &ssc1_clk), | |
099343c6 BS |
191 | CLKDEV_CON_DEV_ID("pclk", "fff98000.ssc", &ssc0_clk), |
192 | CLKDEV_CON_DEV_ID("pclk", "fff9c000.ssc", &ssc1_clk), | |
4cf3326a LD |
193 | CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.0", &mmc0_clk), |
194 | CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.1", &mmc1_clk), | |
bd602995 JCPV |
195 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), |
196 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), | |
197 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), | |
302090a6 | 198 | CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk), |
0af4316b JCPV |
199 | /* fake hclk clock */ |
200 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), | |
619d4a4b JCPV |
201 | CLKDEV_CON_ID("pioA", &pioA_clk), |
202 | CLKDEV_CON_ID("pioB", &pioB_clk), | |
203 | CLKDEV_CON_ID("pioC", &pioCDE_clk), | |
204 | CLKDEV_CON_ID("pioD", &pioCDE_clk), | |
205 | CLKDEV_CON_ID("pioE", &pioCDE_clk), | |
4abb3677 JCPV |
206 | /* more usart lookup table for DT entries */ |
207 | CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck), | |
208 | CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &usart0_clk), | |
209 | CLKDEV_CON_DEV_ID("usart", "fff90000.serial", &usart1_clk), | |
210 | CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk), | |
211 | /* more tc lookup table for DT entries */ | |
212 | CLKDEV_CON_DEV_ID("t0_clk", "fff7c000.timer", &tcb_clk), | |
213 | CLKDEV_CON_DEV_ID("hclk", "a00000.ohci", &ohci_clk), | |
214 | CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk), | |
215 | CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk), | |
f7d19b90 | 216 | CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi_clk), |
bd602995 JCPV |
217 | }; |
218 | ||
219 | static struct clk_lookup usart_clocks_lookups[] = { | |
220 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck), | |
221 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk), | |
222 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk), | |
223 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk), | |
224 | }; | |
225 | ||
b2c65616 AV |
226 | /* |
227 | * The four programmable clocks. | |
228 | * You must configure pin multiplexing to bring these signals out. | |
229 | */ | |
230 | static struct clk pck0 = { | |
231 | .name = "pck0", | |
232 | .pmc_mask = AT91_PMC_PCK0, | |
233 | .type = CLK_TYPE_PROGRAMMABLE, | |
234 | .id = 0, | |
235 | }; | |
236 | static struct clk pck1 = { | |
237 | .name = "pck1", | |
238 | .pmc_mask = AT91_PMC_PCK1, | |
239 | .type = CLK_TYPE_PROGRAMMABLE, | |
240 | .id = 1, | |
241 | }; | |
242 | static struct clk pck2 = { | |
243 | .name = "pck2", | |
244 | .pmc_mask = AT91_PMC_PCK2, | |
245 | .type = CLK_TYPE_PROGRAMMABLE, | |
246 | .id = 2, | |
247 | }; | |
248 | static struct clk pck3 = { | |
249 | .name = "pck3", | |
250 | .pmc_mask = AT91_PMC_PCK3, | |
251 | .type = CLK_TYPE_PROGRAMMABLE, | |
252 | .id = 3, | |
253 | }; | |
254 | ||
255 | static void __init at91sam9263_register_clocks(void) | |
256 | { | |
257 | int i; | |
258 | ||
259 | for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) | |
260 | clk_register(periph_clocks[i]); | |
261 | ||
bd602995 JCPV |
262 | clkdev_add_table(periph_clocks_lookups, |
263 | ARRAY_SIZE(periph_clocks_lookups)); | |
264 | clkdev_add_table(usart_clocks_lookups, | |
265 | ARRAY_SIZE(usart_clocks_lookups)); | |
266 | ||
b2c65616 AV |
267 | clk_register(&pck0); |
268 | clk_register(&pck1); | |
269 | clk_register(&pck2); | |
270 | clk_register(&pck3); | |
271 | } | |
272 | ||
273 | /* -------------------------------------------------------------------- | |
274 | * GPIO | |
275 | * -------------------------------------------------------------------- */ | |
276 | ||
1a2d9156 | 277 | static struct at91_gpio_bank at91sam9263_gpio[] __initdata = { |
b2c65616 AV |
278 | { |
279 | .id = AT91SAM9263_ID_PIOA, | |
80e91cb8 | 280 | .regbase = AT91SAM9263_BASE_PIOA, |
b2c65616 AV |
281 | }, { |
282 | .id = AT91SAM9263_ID_PIOB, | |
80e91cb8 | 283 | .regbase = AT91SAM9263_BASE_PIOB, |
b2c65616 AV |
284 | }, { |
285 | .id = AT91SAM9263_ID_PIOCDE, | |
80e91cb8 | 286 | .regbase = AT91SAM9263_BASE_PIOC, |
b2c65616 AV |
287 | }, { |
288 | .id = AT91SAM9263_ID_PIOCDE, | |
80e91cb8 | 289 | .regbase = AT91SAM9263_BASE_PIOD, |
b2c65616 AV |
290 | }, { |
291 | .id = AT91SAM9263_ID_PIOCDE, | |
80e91cb8 | 292 | .regbase = AT91SAM9263_BASE_PIOE, |
b2c65616 AV |
293 | } |
294 | }; | |
295 | ||
b2c65616 AV |
296 | /* -------------------------------------------------------------------- |
297 | * AT91SAM9263 processor initialization | |
298 | * -------------------------------------------------------------------- */ | |
299 | ||
21d08b9d | 300 | static void __init at91sam9263_map_io(void) |
b2c65616 | 301 | { |
f0051d82 JCPV |
302 | at91_init_sram(0, AT91SAM9263_SRAM0_BASE, AT91SAM9263_SRAM0_SIZE); |
303 | at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE); | |
1b021a3b | 304 | } |
b2c65616 | 305 | |
cfa5a1fe JCPV |
306 | static void __init at91sam9263_ioremap_registers(void) |
307 | { | |
f22deee5 | 308 | at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC); |
e9f68b5c | 309 | at91_ioremap_rstc(AT91SAM9263_BASE_RSTC); |
f363c407 JCPV |
310 | at91_ioremap_ramc(0, AT91SAM9263_BASE_SDRAMC0, 512); |
311 | at91_ioremap_ramc(1, AT91SAM9263_BASE_SDRAMC1, 512); | |
4ab0c599 | 312 | at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT); |
faee0cc3 JCPV |
313 | at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0); |
314 | at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1); | |
4342d647 | 315 | at91_ioremap_matrix(AT91SAM9263_BASE_MATRIX); |
cfa5a1fe JCPV |
316 | } |
317 | ||
46539374 | 318 | static void __init at91sam9263_initialize(void) |
1b021a3b | 319 | { |
0d781716 | 320 | arm_pm_idle = at91sam9_idle; |
1b2073e7 | 321 | arm_pm_restart = at91sam9_alt_restart; |
b2c65616 AV |
322 | at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); |
323 | ||
b2c65616 AV |
324 | /* Register GPIO subsystem */ |
325 | at91_gpio_init(at91sam9263_gpio, 5); | |
326 | } | |
327 | ||
328 | /* -------------------------------------------------------------------- | |
329 | * Interrupt initialization | |
330 | * -------------------------------------------------------------------- */ | |
331 | ||
332 | /* | |
333 | * The default interrupt priority levels (0 = lowest, 7 = highest). | |
334 | */ | |
335 | static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = { | |
336 | 7, /* Advanced Interrupt Controller (FIQ) */ | |
337 | 7, /* System Peripherals */ | |
7cbed2b5 AV |
338 | 1, /* Parallel IO Controller A */ |
339 | 1, /* Parallel IO Controller B */ | |
340 | 1, /* Parallel IO Controller C, D and E */ | |
b2c65616 AV |
341 | 0, |
342 | 0, | |
7cbed2b5 AV |
343 | 5, /* USART 0 */ |
344 | 5, /* USART 1 */ | |
345 | 5, /* USART 2 */ | |
b2c65616 AV |
346 | 0, /* Multimedia Card Interface 0 */ |
347 | 0, /* Multimedia Card Interface 1 */ | |
7cbed2b5 AV |
348 | 3, /* CAN */ |
349 | 6, /* Two-Wire Interface */ | |
350 | 5, /* Serial Peripheral Interface 0 */ | |
351 | 5, /* Serial Peripheral Interface 1 */ | |
352 | 4, /* Serial Synchronous Controller 0 */ | |
353 | 4, /* Serial Synchronous Controller 1 */ | |
354 | 5, /* AC97 Controller */ | |
b2c65616 AV |
355 | 0, /* Timer Counter 0, 1 and 2 */ |
356 | 0, /* Pulse Width Modulation Controller */ | |
357 | 3, /* Ethernet */ | |
358 | 0, | |
359 | 0, /* 2D Graphic Engine */ | |
7cbed2b5 | 360 | 2, /* USB Device Port */ |
b2c65616 AV |
361 | 0, /* Image Sensor Interface */ |
362 | 3, /* LDC Controller */ | |
363 | 0, /* DMA Controller */ | |
364 | 0, | |
7cbed2b5 | 365 | 2, /* USB Host port */ |
b2c65616 AV |
366 | 0, /* Advanced Interrupt Controller (IRQ0) */ |
367 | 0, /* Advanced Interrupt Controller (IRQ1) */ | |
368 | }; | |
369 | ||
8c3583b6 | 370 | struct at91_init_soc __initdata at91sam9263_soc = { |
21d08b9d | 371 | .map_io = at91sam9263_map_io, |
92100c12 | 372 | .default_irq_priority = at91sam9263_default_irq_priority, |
cfa5a1fe | 373 | .ioremap_registers = at91sam9263_ioremap_registers, |
51ddec76 | 374 | .register_clocks = at91sam9263_register_clocks, |
21d08b9d JCPV |
375 | .init = at91sam9263_initialize, |
376 | }; |