projects / mirror_ubuntu-focal-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 73a59c1c | 1 | /* |
| a09e64fb | 2 | * arch/arm/mach-at91/include/mach/gpio.h |
| 73a59c1c SP |
3 | * |
| 4 | * Copyright (C) 2005 HP Labs | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or modify | |
| 7 | * it under the terms of the GNU General Public License as published by | |
| 8 | * the Free Software Foundation; either version 2 of the License, or | |
| 9 | * (at your option) any later version. | |
| 10 | * | |
| 11 | */ | |
| 12 | ||
| 13 | #ifndef __ASM_ARCH_AT91RM9200_GPIO_H | |
| 14 | #define __ASM_ARCH_AT91RM9200_GPIO_H | |
| 15 | ||
| 9c656850 | 16 | #include <linux/kernel.h> |
| 907d6deb AV |
17 | #include <asm/irq.h> |
| 18 | ||
| d0760b3b | 19 | #define MAX_GPIO_BANKS 5 |
| d0fbda9a | 20 | #define NR_BUILTIN_GPIO (MAX_GPIO_BANKS * 32) |
| 73a59c1c | 21 | |
| 72729910 | 22 | /* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */ |
| 73a59c1c | 23 | |
| d0fbda9a JCPV |
24 | #define AT91_PIN_PA0 (0x00 + 0) |
| 25 | #define AT91_PIN_PA1 (0x00 + 1) | |
| 26 | #define AT91_PIN_PA2 (0x00 + 2) | |
| 27 | #define AT91_PIN_PA3 (0x00 + 3) | |
| 28 | #define AT91_PIN_PA4 (0x00 + 4) | |
| 29 | #define AT91_PIN_PA5 (0x00 + 5) | |
| 30 | #define AT91_PIN_PA6 (0x00 + 6) | |
| 31 | #define AT91_PIN_PA7 (0x00 + 7) | |
| 32 | #define AT91_PIN_PA8 (0x00 + 8) | |
| 33 | #define AT91_PIN_PA9 (0x00 + 9) | |
| 34 | #define AT91_PIN_PA10 (0x00 + 10) | |
| 35 | #define AT91_PIN_PA11 (0x00 + 11) | |
| 36 | #define AT91_PIN_PA12 (0x00 + 12) | |
| 37 | #define AT91_PIN_PA13 (0x00 + 13) | |
| 38 | #define AT91_PIN_PA14 (0x00 + 14) | |
| 39 | #define AT91_PIN_PA15 (0x00 + 15) | |
| 40 | #define AT91_PIN_PA16 (0x00 + 16) | |
| 41 | #define AT91_PIN_PA17 (0x00 + 17) | |
| 42 | #define AT91_PIN_PA18 (0x00 + 18) | |
| 43 | #define AT91_PIN_PA19 (0x00 + 19) | |
| 44 | #define AT91_PIN_PA20 (0x00 + 20) | |
| 45 | #define AT91_PIN_PA21 (0x00 + 21) | |
| 46 | #define AT91_PIN_PA22 (0x00 + 22) | |
| 47 | #define AT91_PIN_PA23 (0x00 + 23) | |
| 48 | #define AT91_PIN_PA24 (0x00 + 24) | |
| 49 | #define AT91_PIN_PA25 (0x00 + 25) | |
| 50 | #define AT91_PIN_PA26 (0x00 + 26) | |
| 51 | #define AT91_PIN_PA27 (0x00 + 27) | |
| 52 | #define AT91_PIN_PA28 (0x00 + 28) | |
| 53 | #define AT91_PIN_PA29 (0x00 + 29) | |
| 54 | #define AT91_PIN_PA30 (0x00 + 30) | |
| 55 | #define AT91_PIN_PA31 (0x00 + 31) | |
| 56 | ||
| 57 | #define AT91_PIN_PB0 (0x20 + 0) | |
| 58 | #define AT91_PIN_PB1 (0x20 + 1) | |
| 59 | #define AT91_PIN_PB2 (0x20 + 2) | |
| 60 | #define AT91_PIN_PB3 (0x20 + 3) | |
| 61 | #define AT91_PIN_PB4 (0x20 + 4) | |
| 62 | #define AT91_PIN_PB5 (0x20 + 5) | |
| 63 | #define AT91_PIN_PB6 (0x20 + 6) | |
| 64 | #define AT91_PIN_PB7 (0x20 + 7) | |
| 65 | #define AT91_PIN_PB8 (0x20 + 8) | |
| 66 | #define AT91_PIN_PB9 (0x20 + 9) | |
| 67 | #define AT91_PIN_PB10 (0x20 + 10) | |
| 68 | #define AT91_PIN_PB11 (0x20 + 11) | |
| 69 | #define AT91_PIN_PB12 (0x20 + 12) | |
| 70 | #define AT91_PIN_PB13 (0x20 + 13) | |
| 71 | #define AT91_PIN_PB14 (0x20 + 14) | |
| 72 | #define AT91_PIN_PB15 (0x20 + 15) | |
| 73 | #define AT91_PIN_PB16 (0x20 + 16) | |
| 74 | #define AT91_PIN_PB17 (0x20 + 17) | |
| 75 | #define AT91_PIN_PB18 (0x20 + 18) | |
| 76 | #define AT91_PIN_PB19 (0x20 + 19) | |
| 77 | #define AT91_PIN_PB20 (0x20 + 20) | |
| 78 | #define AT91_PIN_PB21 (0x20 + 21) | |
| 79 | #define AT91_PIN_PB22 (0x20 + 22) | |
| 80 | #define AT91_PIN_PB23 (0x20 + 23) | |
| 81 | #define AT91_PIN_PB24 (0x20 + 24) | |
| 82 | #define AT91_PIN_PB25 (0x20 + 25) | |
| 83 | #define AT91_PIN_PB26 (0x20 + 26) | |
| 84 | #define AT91_PIN_PB27 (0x20 + 27) | |
| 85 | #define AT91_PIN_PB28 (0x20 + 28) | |
| 86 | #define AT91_PIN_PB29 (0x20 + 29) | |
| 87 | #define AT91_PIN_PB30 (0x20 + 30) | |
| 88 | #define AT91_PIN_PB31 (0x20 + 31) | |
| 89 | ||
| 90 | #define AT91_PIN_PC0 (0x40 + 0) | |
| 91 | #define AT91_PIN_PC1 (0x40 + 1) | |
| 92 | #define AT91_PIN_PC2 (0x40 + 2) | |
| 93 | #define AT91_PIN_PC3 (0x40 + 3) | |
| 94 | #define AT91_PIN_PC4 (0x40 + 4) | |
| 95 | #define AT91_PIN_PC5 (0x40 + 5) | |
| 96 | #define AT91_PIN_PC6 (0x40 + 6) | |
| 97 | #define AT91_PIN_PC7 (0x40 + 7) | |
| 98 | #define AT91_PIN_PC8 (0x40 + 8) | |
| 99 | #define AT91_PIN_PC9 (0x40 + 9) | |
| 100 | #define AT91_PIN_PC10 (0x40 + 10) | |
| 101 | #define AT91_PIN_PC11 (0x40 + 11) | |
| 102 | #define AT91_PIN_PC12 (0x40 + 12) | |
| 103 | #define AT91_PIN_PC13 (0x40 + 13) | |
| 104 | #define AT91_PIN_PC14 (0x40 + 14) | |
| 105 | #define AT91_PIN_PC15 (0x40 + 15) | |
| 106 | #define AT91_PIN_PC16 (0x40 + 16) | |
| 107 | #define AT91_PIN_PC17 (0x40 + 17) | |
| 108 | #define AT91_PIN_PC18 (0x40 + 18) | |
| 109 | #define AT91_PIN_PC19 (0x40 + 19) | |
| 110 | #define AT91_PIN_PC20 (0x40 + 20) | |
| 111 | #define AT91_PIN_PC21 (0x40 + 21) | |
| 112 | #define AT91_PIN_PC22 (0x40 + 22) | |
| 113 | #define AT91_PIN_PC23 (0x40 + 23) | |
| 114 | #define AT91_PIN_PC24 (0x40 + 24) | |
| 115 | #define AT91_PIN_PC25 (0x40 + 25) | |
| 116 | #define AT91_PIN_PC26 (0x40 + 26) | |
| 117 | #define AT91_PIN_PC27 (0x40 + 27) | |
| 118 | #define AT91_PIN_PC28 (0x40 + 28) | |
| 119 | #define AT91_PIN_PC29 (0x40 + 29) | |
| 120 | #define AT91_PIN_PC30 (0x40 + 30) | |
| 121 | #define AT91_PIN_PC31 (0x40 + 31) | |
| 122 | ||
| 123 | #define AT91_PIN_PD0 (0x60 + 0) | |
| 124 | #define AT91_PIN_PD1 (0x60 + 1) | |
| 125 | #define AT91_PIN_PD2 (0x60 + 2) | |
| 126 | #define AT91_PIN_PD3 (0x60 + 3) | |
| 127 | #define AT91_PIN_PD4 (0x60 + 4) | |
| 128 | #define AT91_PIN_PD5 (0x60 + 5) | |
| 129 | #define AT91_PIN_PD6 (0x60 + 6) | |
| 130 | #define AT91_PIN_PD7 (0x60 + 7) | |
| 131 | #define AT91_PIN_PD8 (0x60 + 8) | |
| 132 | #define AT91_PIN_PD9 (0x60 + 9) | |
| 133 | #define AT91_PIN_PD10 (0x60 + 10) | |
| 134 | #define AT91_PIN_PD11 (0x60 + 11) | |
| 135 | #define AT91_PIN_PD12 (0x60 + 12) | |
| 136 | #define AT91_PIN_PD13 (0x60 + 13) | |
| 137 | #define AT91_PIN_PD14 (0x60 + 14) | |
| 138 | #define AT91_PIN_PD15 (0x60 + 15) | |
| 139 | #define AT91_PIN_PD16 (0x60 + 16) | |
| 140 | #define AT91_PIN_PD17 (0x60 + 17) | |
| 141 | #define AT91_PIN_PD18 (0x60 + 18) | |
| 142 | #define AT91_PIN_PD19 (0x60 + 19) | |
| 143 | #define AT91_PIN_PD20 (0x60 + 20) | |
| 144 | #define AT91_PIN_PD21 (0x60 + 21) | |
| 145 | #define AT91_PIN_PD22 (0x60 + 22) | |
| 146 | #define AT91_PIN_PD23 (0x60 + 23) | |
| 147 | #define AT91_PIN_PD24 (0x60 + 24) | |
| 148 | #define AT91_PIN_PD25 (0x60 + 25) | |
| 149 | #define AT91_PIN_PD26 (0x60 + 26) | |
| 150 | #define AT91_PIN_PD27 (0x60 + 27) | |
| 151 | #define AT91_PIN_PD28 (0x60 + 28) | |
| 152 | #define AT91_PIN_PD29 (0x60 + 29) | |
| 153 | #define AT91_PIN_PD30 (0x60 + 30) | |
| 154 | #define AT91_PIN_PD31 (0x60 + 31) | |
| 155 | ||
| 156 | #define AT91_PIN_PE0 (0x80 + 0) | |
| 157 | #define AT91_PIN_PE1 (0x80 + 1) | |
| 158 | #define AT91_PIN_PE2 (0x80 + 2) | |
| 159 | #define AT91_PIN_PE3 (0x80 + 3) | |
| 160 | #define AT91_PIN_PE4 (0x80 + 4) | |
| 161 | #define AT91_PIN_PE5 (0x80 + 5) | |
| 162 | #define AT91_PIN_PE6 (0x80 + 6) | |
| 163 | #define AT91_PIN_PE7 (0x80 + 7) | |
| 164 | #define AT91_PIN_PE8 (0x80 + 8) | |
| 165 | #define AT91_PIN_PE9 (0x80 + 9) | |
| 166 | #define AT91_PIN_PE10 (0x80 + 10) | |
| 167 | #define AT91_PIN_PE11 (0x80 + 11) | |
| 168 | #define AT91_PIN_PE12 (0x80 + 12) | |
| 169 | #define AT91_PIN_PE13 (0x80 + 13) | |
| 170 | #define AT91_PIN_PE14 (0x80 + 14) | |
| 171 | #define AT91_PIN_PE15 (0x80 + 15) | |
| 172 | #define AT91_PIN_PE16 (0x80 + 16) | |
| 173 | #define AT91_PIN_PE17 (0x80 + 17) | |
| 174 | #define AT91_PIN_PE18 (0x80 + 18) | |
| 175 | #define AT91_PIN_PE19 (0x80 + 19) | |
| 176 | #define AT91_PIN_PE20 (0x80 + 20) | |
| 177 | #define AT91_PIN_PE21 (0x80 + 21) | |
| 178 | #define AT91_PIN_PE22 (0x80 + 22) | |
| 179 | #define AT91_PIN_PE23 (0x80 + 23) | |
| 180 | #define AT91_PIN_PE24 (0x80 + 24) | |
| 181 | #define AT91_PIN_PE25 (0x80 + 25) | |
| 182 | #define AT91_PIN_PE26 (0x80 + 26) | |
| 183 | #define AT91_PIN_PE27 (0x80 + 27) | |
| 184 | #define AT91_PIN_PE28 (0x80 + 28) | |
| 185 | #define AT91_PIN_PE29 (0x80 + 29) | |
| 186 | #define AT91_PIN_PE30 (0x80 + 30) | |
| 187 | #define AT91_PIN_PE31 (0x80 + 31) | |
| d0760b3b | 188 | |
| 73a59c1c SP |
189 | #ifndef __ASSEMBLY__ |
| 190 | /* setup setup routines, called from board init or driver probe() */ | |
| a31c4eea | 191 | extern int __init_or_module at91_set_GPIO_periph(unsigned pin, int use_pullup); |
| f2173834 AV |
192 | extern int __init_or_module at91_set_A_periph(unsigned pin, int use_pullup); |
| 193 | extern int __init_or_module at91_set_B_periph(unsigned pin, int use_pullup); | |
| 582d5fbd NF |
194 | extern int __init_or_module at91_set_C_periph(unsigned pin, int use_pullup); |
| 195 | extern int __init_or_module at91_set_D_periph(unsigned pin, int use_pullup); | |
| f2173834 AV |
196 | extern int __init_or_module at91_set_gpio_input(unsigned pin, int use_pullup); |
| 197 | extern int __init_or_module at91_set_gpio_output(unsigned pin, int value); | |
| 198 | extern int __init_or_module at91_set_deglitch(unsigned pin, int is_on); | |
| 582d5fbd | 199 | extern int __init_or_module at91_set_debounce(unsigned pin, int is_on, int div); |
| f2173834 | 200 | extern int __init_or_module at91_set_multi_drive(unsigned pin, int is_on); |
| 582d5fbd NF |
201 | extern int __init_or_module at91_set_pulldown(unsigned pin, int is_on); |
| 202 | extern int __init_or_module at91_disable_schmitt_trig(unsigned pin); | |
| 73a59c1c SP |
203 | |
| 204 | /* callable at any time */ | |
| 205 | extern int at91_set_gpio_value(unsigned pin, int value); | |
| 206 | extern int at91_get_gpio_value(unsigned pin); | |
| 907d6deb | 207 | |
| f2173834 | 208 | /* callable only from core power-management code */ |
| 907d6deb AV |
209 | extern void at91_gpio_suspend(void); |
| 210 | extern void at91_gpio_resume(void); | |
| 73a59c1c | 211 | |
| a31c4eea DB |
212 | #endif /* __ASSEMBLY__ */ |
| 213 | ||
| 214 | #endif |