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Commit | Line | Data |
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79da7a61 | 1 | /* |
a09e64fb | 2 | * arch/arm/mach-at91/include/mach/cpu.h |
79da7a61 AV |
3 | * |
4 | * Copyright (C) 2006 SAN People | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | */ | |
12 | ||
13 | #ifndef __ASM_ARCH_CPU_H | |
14 | #define __ASM_ARCH_CPU_H | |
15 | ||
a09e64fb RK |
16 | #include <mach/hardware.h> |
17 | #include <mach/at91_dbgu.h> | |
79da7a61 AV |
18 | |
19 | ||
20 | #define ARCH_ID_AT91RM9200 0x09290780 | |
21 | #define ARCH_ID_AT91SAM9260 0x019803a0 | |
22 | #define ARCH_ID_AT91SAM9261 0x019703a0 | |
b2c65616 | 23 | #define ARCH_ID_AT91SAM9263 0x019607a0 |
e2941054 | 24 | #define ARCH_ID_AT91SAM9G10 0x019903a0 |
61352667 | 25 | #define ARCH_ID_AT91SAM9G20 0x019905a0 |
2b3b3516 | 26 | #define ARCH_ID_AT91SAM9RL64 0x019b03a0 |
fddcc0ae | 27 | #define ARCH_ID_AT91SAM9G45 0x819b05a0 |
d8951ade NF |
28 | #define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */ |
29 | #define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */ | |
9baeb7e4 | 30 | #define ARCH_ID_AT91SAM9X5 0x819a05a0 |
2b3b3516 | 31 | #define ARCH_ID_AT91CAP9 0x039A03A0 |
79da7a61 | 32 | |
f7eee89b AV |
33 | #define ARCH_ID_AT91SAM9XE128 0x329973a0 |
34 | #define ARCH_ID_AT91SAM9XE256 0x329a93a0 | |
35 | #define ARCH_ID_AT91SAM9XE512 0x329aa3a0 | |
79da7a61 | 36 | |
5e38efae AV |
37 | #define ARCH_ID_AT572D940HF 0x0e0303e0 |
38 | ||
70672224 GU |
39 | #define ARCH_ID_AT91M40800 0x14080044 |
40 | #define ARCH_ID_AT91R40807 0x44080746 | |
41 | #define ARCH_ID_AT91M40807 0x14080745 | |
42 | #define ARCH_ID_AT91R40008 0x44000840 | |
43 | ||
79da7a61 AV |
44 | static inline unsigned long at91_cpu_identify(void) |
45 | { | |
46 | return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION); | |
47 | } | |
48 | ||
d8951ade NF |
49 | static inline unsigned long at91_cpu_fully_identify(void) |
50 | { | |
51 | return at91_sys_read(AT91_DBGU_CIDR); | |
52 | } | |
53 | ||
fddcc0ae NF |
54 | #define ARCH_EXID_AT91SAM9M11 0x00000001 |
55 | #define ARCH_EXID_AT91SAM9M10 0x00000002 | |
5f9f0a41 | 56 | #define ARCH_EXID_AT91SAM9G46 0x00000003 |
fddcc0ae NF |
57 | #define ARCH_EXID_AT91SAM9G45 0x00000004 |
58 | ||
9baeb7e4 JCPV |
59 | #define ARCH_EXID_AT91SAM9G15 0x00000000 |
60 | #define ARCH_EXID_AT91SAM9G35 0x00000001 | |
61 | #define ARCH_EXID_AT91SAM9X35 0x00000002 | |
62 | #define ARCH_EXID_AT91SAM9G25 0x00000003 | |
63 | #define ARCH_EXID_AT91SAM9X25 0x00000004 | |
64 | ||
fddcc0ae NF |
65 | static inline unsigned long at91_exid_identify(void) |
66 | { | |
67 | return at91_sys_read(AT91_DBGU_EXID); | |
68 | } | |
69 | ||
79da7a61 | 70 | |
f7eee89b AV |
71 | #define ARCH_FAMILY_AT91X92 0x09200000 |
72 | #define ARCH_FAMILY_AT91SAM9 0x01900000 | |
73 | #define ARCH_FAMILY_AT91SAM9XE 0x02900000 | |
74 | ||
75 | static inline unsigned long at91_arch_identify(void) | |
76 | { | |
77 | return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH); | |
78 | } | |
79 | ||
7be90a6b SP |
80 | #ifdef CONFIG_ARCH_AT91CAP9 |
81 | #include <mach/at91_pmc.h> | |
82 | ||
83 | #define ARCH_REVISION_CAP9_B 0x399 | |
84 | #define ARCH_REVISION_CAP9_C 0x601 | |
85 | ||
86 | static inline unsigned long at91cap9_rev_identify(void) | |
87 | { | |
88 | return (at91_sys_read(AT91_PMC_VER)); | |
89 | } | |
90 | #endif | |
f7eee89b | 91 | |
79da7a61 | 92 | #ifdef CONFIG_ARCH_AT91RM9200 |
e57556e3 JCPV |
93 | extern int rm9200_type; |
94 | #define ARCH_REVISON_9200_BGA (0 << 0) | |
95 | #define ARCH_REVISON_9200_PQFP (1 << 0) | |
79da7a61 | 96 | #define cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200) |
e57556e3 JCPV |
97 | #define cpu_is_at91rm9200_bga() (!cpu_is_at91rm9200_pqfp()) |
98 | #define cpu_is_at91rm9200_pqfp() (cpu_is_at91rm9200() && rm9200_type & ARCH_REVISON_9200_PQFP) | |
79da7a61 AV |
99 | #else |
100 | #define cpu_is_at91rm9200() (0) | |
e57556e3 JCPV |
101 | #define cpu_is_at91rm9200_bga() (0) |
102 | #define cpu_is_at91rm9200_pqfp() (0) | |
79da7a61 AV |
103 | #endif |
104 | ||
105 | #ifdef CONFIG_ARCH_AT91SAM9260 | |
f7eee89b AV |
106 | #define cpu_is_at91sam9xe() (at91_arch_identify() == ARCH_FAMILY_AT91SAM9XE) |
107 | #define cpu_is_at91sam9260() ((at91_cpu_identify() == ARCH_ID_AT91SAM9260) || cpu_is_at91sam9xe()) | |
79da7a61 | 108 | #else |
f7eee89b | 109 | #define cpu_is_at91sam9xe() (0) |
79da7a61 AV |
110 | #define cpu_is_at91sam9260() (0) |
111 | #endif | |
112 | ||
61352667 | 113 | #ifdef CONFIG_ARCH_AT91SAM9G20 |
114 | #define cpu_is_at91sam9g20() (at91_cpu_identify() == ARCH_ID_AT91SAM9G20) | |
115 | #else | |
116 | #define cpu_is_at91sam9g20() (0) | |
117 | #endif | |
118 | ||
79da7a61 AV |
119 | #ifdef CONFIG_ARCH_AT91SAM9261 |
120 | #define cpu_is_at91sam9261() (at91_cpu_identify() == ARCH_ID_AT91SAM9261) | |
121 | #else | |
122 | #define cpu_is_at91sam9261() (0) | |
123 | #endif | |
124 | ||
b784b7c0 | 125 | #ifdef CONFIG_ARCH_AT91SAM9G10 |
e2941054 | 126 | #define cpu_is_at91sam9g10() ((at91_cpu_identify() & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) |
b784b7c0 NF |
127 | #else |
128 | #define cpu_is_at91sam9g10() (0) | |
129 | #endif | |
130 | ||
b2c65616 AV |
131 | #ifdef CONFIG_ARCH_AT91SAM9263 |
132 | #define cpu_is_at91sam9263() (at91_cpu_identify() == ARCH_ID_AT91SAM9263) | |
133 | #else | |
134 | #define cpu_is_at91sam9263() (0) | |
135 | #endif | |
136 | ||
877d7720 AV |
137 | #ifdef CONFIG_ARCH_AT91SAM9RL |
138 | #define cpu_is_at91sam9rl() (at91_cpu_identify() == ARCH_ID_AT91SAM9RL64) | |
139 | #else | |
140 | #define cpu_is_at91sam9rl() (0) | |
141 | #endif | |
142 | ||
fddcc0ae NF |
143 | #ifdef CONFIG_ARCH_AT91SAM9G45 |
144 | #define cpu_is_at91sam9g45() (at91_cpu_identify() == ARCH_ID_AT91SAM9G45) | |
d8951ade | 145 | #define cpu_is_at91sam9g45es() (at91_cpu_fully_identify() == ARCH_ID_AT91SAM9G45ES) |
5f9f0a41 NF |
146 | #define cpu_is_at91sam9m10() (cpu_is_at91sam9g45() && \ |
147 | (at91_exid_identify() == ARCH_EXID_AT91SAM9M10)) | |
148 | #define cpu_is_at91sam9m46() (cpu_is_at91sam9g45() && \ | |
149 | (at91_exid_identify() == ARCH_EXID_AT91SAM9G46)) | |
150 | #define cpu_is_at91sam9m11() (cpu_is_at91sam9g45() && \ | |
151 | (at91_exid_identify() == ARCH_EXID_AT91SAM9M11)) | |
fddcc0ae NF |
152 | #else |
153 | #define cpu_is_at91sam9g45() (0) | |
d8951ade | 154 | #define cpu_is_at91sam9g45es() (0) |
5f9f0a41 NF |
155 | #define cpu_is_at91sam9m10() (0) |
156 | #define cpu_is_at91sam9g46() (0) | |
157 | #define cpu_is_at91sam9m11() (0) | |
fddcc0ae NF |
158 | #endif |
159 | ||
9baeb7e4 JCPV |
160 | #ifdef CONFIG_ARCH_AT91SAM9X5 |
161 | #define cpu_is_at91sam9x5() (at91_cpu_identify() == ARCH_ID_AT91SAM9X5) | |
162 | #define cpu_is_at91sam9g15() (cpu_is_at91sam9x5() && \ | |
163 | (at91_exid_identify() == ARCH_EXID_AT91SAM9G15)) | |
164 | #define cpu_is_at91sam9g35() (cpu_is_at91sam9x5() && \ | |
165 | (at91_exid_identify() == ARCH_EXID_AT91SAM9G35)) | |
166 | #define cpu_is_at91sam9x35() (cpu_is_at91sam9x5() && \ | |
167 | (at91_exid_identify() == ARCH_EXID_AT91SAM9X35)) | |
168 | #define cpu_is_at91sam9g25() (cpu_is_at91sam9x5() && \ | |
169 | (at91_exid_identify() == ARCH_EXID_AT91SAM9G25)) | |
170 | #define cpu_is_at91sam9x25() (cpu_is_at91sam9x5() && \ | |
171 | (at91_exid_identify() == ARCH_EXID_AT91SAM9X25)) | |
172 | #else | |
173 | #define cpu_is_at91sam9x5() (0) | |
174 | #define cpu_is_at91sam9g15() (0) | |
175 | #define cpu_is_at91sam9g35() (0) | |
176 | #define cpu_is_at91sam9x35() (0) | |
177 | #define cpu_is_at91sam9g25() (0) | |
178 | #define cpu_is_at91sam9x25() (0) | |
179 | #endif | |
180 | ||
2b3b3516 AV |
181 | #ifdef CONFIG_ARCH_AT91CAP9 |
182 | #define cpu_is_at91cap9() (at91_cpu_identify() == ARCH_ID_AT91CAP9) | |
7be90a6b SP |
183 | #define cpu_is_at91cap9_revB() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_B) |
184 | #define cpu_is_at91cap9_revC() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_C) | |
2b3b3516 AV |
185 | #else |
186 | #define cpu_is_at91cap9() (0) | |
7be90a6b SP |
187 | #define cpu_is_at91cap9_revB() (0) |
188 | #define cpu_is_at91cap9_revC() (0) | |
2b3b3516 | 189 | #endif |
877d7720 | 190 | |
5e38efae AV |
191 | #ifdef CONFIG_ARCH_AT572D940HF |
192 | #define cpu_is_at572d940hf() (at91_cpu_identify() == ARCH_ID_AT572D940HF) | |
193 | #else | |
194 | #define cpu_is_at572d940hf() (0) | |
195 | #endif | |
196 | ||
e7498281 HS |
197 | /* |
198 | * Since this is ARM, we will never run on any AVR32 CPU. But these | |
199 | * definitions may reduce clutter in common drivers. | |
200 | */ | |
201 | #define cpu_is_at32ap7000() (0) | |
202 | ||
79da7a61 | 203 | #endif |