[mirror_ubuntu-focal-kernel.git] / arch / arm / mach-at91 / pm.c

/*
 * arch/arm/mach-at91/pm.c
 * AT91 Power Management
 *
 * Copyright (C) 2005 David Brownell
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/gpio.h>
#include <linux/suspend.h>
#include <linux/sched.h>
#include <linux/proc_fs.h>
#include <linux/interrupt.h>
#include <linux/sysfs.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/clk/at91_pmc.h>

#include <asm/irq.h>
#include <linux/atomic.h>
#include <asm/mach/time.h>
#include <asm/mach/irq.h>

#include <mach/cpu.h>
#include <mach/hardware.h>

#include "generic.h"
#include "pm.h"

static void (*at91_pm_standby)(void);

static int at91_pm_valid_state(suspend_state_t state)
{
	switch (state) {
		case PM_SUSPEND_ON:
		case PM_SUSPEND_STANDBY:
		case PM_SUSPEND_MEM:
			return 1;

		default:
			return 0;
	}
}


static suspend_state_t target_state;

/*
 * Called after processes are frozen, but before we shutdown devices.
 */
static int at91_pm_begin(suspend_state_t state)
{
	target_state = state;
	return 0;
}

/*
 * Verify that all the clocks are correct before entering
 * slow-clock mode.
 */
static int at91_pm_verify_clocks(void)
{
	unsigned long scsr;
	int i;

	scsr = at91_pmc_read(AT91_PMC_SCSR);

	/* USB must not be using PLLB */
	if (cpu_is_at91rm9200()) {
		if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) {
			pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
			return 0;
		}
	} else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263()
			|| cpu_is_at91sam9g20() || cpu_is_at91sam9g10()) {
		if ((scsr & (AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP)) != 0) {
			pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
			return 0;
		}
	}

	/* PCK0..PCK3 must be disabled, or configured to use clk32k */
	for (i = 0; i < 4; i++) {
		u32 css;

		if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
			continue;

		css = at91_pmc_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
		if (css != AT91_PMC_CSS_SLOW) {
			pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
			return 0;
		}
	}

	return 1;
}

/*
 * Call this from platform driver suspend() to see how deeply to suspend.
 * For example, some controllers (like OHCI) need one of the PLL clocks
 * in order to act as a wakeup source, and those are not available when
 * going into slow clock mode.
 *
 * REVISIT: generalize as clk_will_be_available(clk)?  Other platforms have
 * the very same problem (but not using at91 main_clk), and it'd be better
 * to add one generic API rather than lots of platform-specific ones.
 */
int at91_suspend_entering_slow_clock(void)
{
	return (target_state == PM_SUSPEND_MEM);
}
EXPORT_SYMBOL(at91_suspend_entering_slow_clock);


static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0,
			  void __iomem *ramc1, int memctrl);

#ifdef CONFIG_AT91_SLOW_CLOCK
extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0,
			    void __iomem *ramc1, int memctrl);
extern u32 at91_slow_clock_sz;
#endif

static int at91_pm_enter(suspend_state_t state)
{
	at91_pinctrl_gpio_suspend();

	switch (state) {
		/*
		 * Suspend-to-RAM is like STANDBY plus slow clock mode, so
		 * drivers must suspend more deeply:  only the master clock
		 * controller may be using the main oscillator.
		 */
		case PM_SUSPEND_MEM:
			/*
			 * Ensure that clocks are in a valid state.
			 */
			if (!at91_pm_verify_clocks())
				goto error;

			/*
			 * Enter slow clock mode by switching over to clk32k and
			 * turning off the main oscillator; reverse on wakeup.
			 */
			if (slow_clock) {
				int memctrl = AT91_MEMCTRL_SDRAMC;

				if (cpu_is_at91rm9200())
					memctrl = AT91_MEMCTRL_MC;
				else if (cpu_is_at91sam9g45())
					memctrl = AT91_MEMCTRL_DDRSDR;
#ifdef CONFIG_AT91_SLOW_CLOCK
				/* copy slow_clock handler to SRAM, and call it */
				memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz);
#endif
				slow_clock(at91_pmc_base, at91_ramc_base[0],
					   at91_ramc_base[1], memctrl);
				break;
			} else {
				pr_info("AT91: PM - no slow clock mode enabled ...\n");
				/* FALLTHROUGH leaving master clock alone */
			}

		/*
		 * STANDBY mode has *all* drivers suspended; ignores irqs not
		 * marked as 'wakeup' event sources; and reduces DRAM power.
		 * But otherwise it's identical to PM_SUSPEND_ON:  cpu idle, and
		 * nothing fancy done with main or cpu clocks.
		 */
		case PM_SUSPEND_STANDBY:
			/*
			 * NOTE: the Wait-for-Interrupt instruction needs to be
			 * in icache so no SDRAM accesses are needed until the
			 * wakeup IRQ occurs and self-refresh is terminated.
			 * For ARM 926 based chips, this requirement is weaker
			 * as at91sam9 can access a RAM in self-refresh mode.
			 */
			if (at91_pm_standby)
				at91_pm_standby();
			break;

		case PM_SUSPEND_ON:
			cpu_do_idle();
			break;

		default:
			pr_debug("AT91: PM - bogus suspend state %d\n", state);
			goto error;
	}

error:
	target_state = PM_SUSPEND_ON;

	at91_pinctrl_gpio_resume();
	return 0;
}

/*
 * Called right prior to thawing processes.
 */
static void at91_pm_end(void)
{
	target_state = PM_SUSPEND_ON;
}


static const struct platform_suspend_ops at91_pm_ops = {
	.valid	= at91_pm_valid_state,
	.begin	= at91_pm_begin,
	.enter	= at91_pm_enter,
	.end	= at91_pm_end,
};

static struct platform_device at91_cpuidle_device = {
	.name = "cpuidle-at91",
};

void at91_pm_set_standby(void (*at91_standby)(void))
{
	if (at91_standby) {
		at91_cpuidle_device.dev.platform_data = at91_standby;
		at91_pm_standby = at91_standby;
	}
}

static int __init at91_pm_init(void)
{
#ifdef CONFIG_AT91_SLOW_CLOCK
	slow_clock = (void *) (AT91_IO_VIRT_BASE - at91_slow_clock_sz);
#endif

	pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));

	/* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
	if (cpu_is_at91rm9200())
		at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
	
	if (at91_cpuidle_device.dev.platform_data)
		platform_device_register(&at91_cpuidle_device);

	suspend_set_ops(&at91_pm_ops);

	return 0;
}
arch_initcall(at91_pm_init);
Commit	Line	Data
907d6deb	1	/*
9d041268	2	* arch/arm/mach-at91/pm.c
907d6deb AV	3	* AT91 Power Management
	4	*
	5	* Copyright (C) 2005 David Brownell
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*/
	12
2f8163ba	13	#include <linux/gpio.h>
95d9ffbe	14	#include <linux/suspend.h>
907d6deb AV	15	#include <linux/sched.h>
907d6deb AV	16	#include <linux/proc_fs.h>
907d6deb AV	17	#include <linux/interrupt.h>
	18	#include <linux/sysfs.h>
	19	#include <linux/module.h>
	20	#include <linux/platform_device.h>
fced80c7	21	#include <linux/io.h>
2edb90ae	22	#include <linux/clk/at91_pmc.h>
907d6deb	23
907d6deb	24	#include <asm/irq.h>
60063497	25	#include <linux/atomic.h>
907d6deb AV	26	#include <asm/mach/time.h>
907d6deb AV	27	#include <asm/mach/irq.h>
907d6deb	28
a09e64fb	29	#include <mach/cpu.h>
ac11a1d4	30	#include <mach/hardware.h>
907d6deb AV	31
907d6deb AV	32	#include "generic.h"
1ea60cf7	33	#include "pm.h"
907d6deb	34
5ad945ea DL	35	static void (*at91_pm_standby)(void);
5ad945ea DL	36
907d6deb AV	37	static int at91_pm_valid_state(suspend_state_t state)
	38	{
	39	switch (state) {
	40	case PM_SUSPEND_ON:
	41	case PM_SUSPEND_STANDBY:
	42	case PM_SUSPEND_MEM:
	43	return 1;
	44
	45	default:
	46	return 0;
	47	}
	48	}
	49
	50
	51	static suspend_state_t target_state;
	52
	53	/*
	54	* Called after processes are frozen, but before we shutdown devices.
	55	*/
c697eece	56	static int at91_pm_begin(suspend_state_t state)
907d6deb AV	57	{
	58	target_state = state;
	59	return 0;
	60	}
	61
	62	/*
	63	* Verify that all the clocks are correct before entering
	64	* slow-clock mode.
	65	*/
	66	static int at91_pm_verify_clocks(void)
	67	{
	68	unsigned long scsr;
	69	int i;
	70
b5514952	71	scsr = at91_pmc_read(AT91_PMC_SCSR);
907d6deb AV	72
907d6deb AV	73	/* USB must not be using PLLB */
d481f864 AV	74	if (cpu_is_at91rm9200()) {
d481f864 AV	75	if ((scsr & (AT91RM9200_PMC_UHP \| AT91RM9200_PMC_UDP)) != 0) {
7f96b1ca	76	pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
d481f864 AV	77	return 0;
d481f864 AV	78	}
b319ff80 NF	79	} else if (cpu_is_at91sam9260() \|\| cpu_is_at91sam9261() \|\| cpu_is_at91sam9263()
b319ff80 NF	80	\|\| cpu_is_at91sam9g20() \|\| cpu_is_at91sam9g10()) {
b6b27ae5	81	if ((scsr & (AT91SAM926x_PMC_UHP \| AT91SAM926x_PMC_UDP)) != 0) {
7f96b1ca	82	pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
b6b27ae5 AV	83	return 0;
b6b27ae5 AV	84	}
907d6deb AV	85	}
907d6deb AV	86
907d6deb AV	87	/* PCK0..PCK3 must be disabled, or configured to use clk32k */
	88	for (i = 0; i < 4; i++) {
	89	u32 css;
	90
	91	if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
	92	continue;
	93
b5514952	94	css = at91_pmc_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
907d6deb	95	if (css != AT91_PMC_CSS_SLOW) {
7f96b1ca	96	pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
907d6deb AV	97	return 0;
	98	}
	99	}
907d6deb AV	100
	101	return 1;
	102	}
	103
	104	/*
	105	* Call this from platform driver suspend() to see how deeply to suspend.
	106	* For example, some controllers (like OHCI) need one of the PLL clocks
	107	* in order to act as a wakeup source, and those are not available when
	108	* going into slow clock mode.
	109	*
	110	* REVISIT: generalize as clk_will_be_available(clk)? Other platforms have
	111	* the very same problem (but not using at91 main_clk), and it'd be better
	112	* to add one generic API rather than lots of platform-specific ones.
	113	*/
	114	int at91_suspend_entering_slow_clock(void)
	115	{
	116	return (target_state == PM_SUSPEND_MEM);
	117	}
	118	EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
	119
	120
fb7e197b JCPV	121	static void (slow_clock)(void __iomem pmc, void __iomem *ramc0,
fb7e197b JCPV	122	void __iomem *ramc1, int memctrl);
907d6deb	123
f5d0f457	124	#ifdef CONFIG_AT91_SLOW_CLOCK
fb7e197b JCPV	125	extern void at91_slow_clock(void __iomem pmc, void __iomem ramc0,
fb7e197b JCPV	126	void __iomem *ramc1, int memctrl);
f5d0f457 AV	127	extern u32 at91_slow_clock_sz;
	128	#endif
	129
907d6deb AV	130	static int at91_pm_enter(suspend_state_t state)
907d6deb AV	131	{
85c4b31e	132	at91_pinctrl_gpio_suspend();
907d6deb	133
907d6deb AV	134	switch (state) {
	135	/*
	136	* Suspend-to-RAM is like STANDBY plus slow clock mode, so
	137	* drivers must suspend more deeply: only the master clock
	138	* controller may be using the main oscillator.
	139	*/
	140	case PM_SUSPEND_MEM:
	141	/*
	142	* Ensure that clocks are in a valid state.
	143	*/
	144	if (!at91_pm_verify_clocks())
	145	goto error;
	146
	147	/*
	148	* Enter slow clock mode by switching over to clk32k and
	149	* turning off the main oscillator; reverse on wakeup.
	150	*/
	151	if (slow_clock) {
fb7e197b JCPV	152	int memctrl = AT91_MEMCTRL_SDRAMC;
	153
	154	if (cpu_is_at91rm9200())
	155	memctrl = AT91_MEMCTRL_MC;
	156	else if (cpu_is_at91sam9g45())
	157	memctrl = AT91_MEMCTRL_DDRSDR;
f5d0f457 AV	158	#ifdef CONFIG_AT91_SLOW_CLOCK
	159	/* copy slow_clock handler to SRAM, and call it */
	160	memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz);
	161	#endif
fb7e197b JCPV	162	slow_clock(at91_pmc_base, at91_ramc_base[0],
fb7e197b JCPV	163	at91_ramc_base[1], memctrl);
907d6deb AV	164	break;
907d6deb AV	165	} else {
f5d0f457	166	pr_info("AT91: PM - no slow clock mode enabled ...\n");
907d6deb AV	167	/* FALLTHROUGH leaving master clock alone */
	168	}
	169
	170	/*
	171	* STANDBY mode has all drivers suspended; ignores irqs not
	172	* marked as 'wakeup' event sources; and reduces DRAM power.
	173	* But otherwise it's identical to PM_SUSPEND_ON: cpu idle, and
	174	* nothing fancy done with main or cpu clocks.
	175	*/
	176	case PM_SUSPEND_STANDBY:
	177	/*
	178	* NOTE: the Wait-for-Interrupt instruction needs to be
f5d0f457 AV	179	* in icache so no SDRAM accesses are needed until the
f5d0f457 AV	180	* wakeup IRQ occurs and self-refresh is terminated.
8aeeda82 NF	181	* For ARM 926 based chips, this requirement is weaker
8aeeda82 NF	182	* as at91sam9 can access a RAM in self-refresh mode.
907d6deb	183	*/
5ad945ea DL	184	if (at91_pm_standby)
5ad945ea DL	185	at91_pm_standby();
f5d0f457	186	break;
907d6deb AV	187
907d6deb AV	188	case PM_SUSPEND_ON:
8aeeda82	189	cpu_do_idle();
907d6deb AV	190	break;
	191
	192	default:
	193	pr_debug("AT91: PM - bogus suspend state %d\n", state);
	194	goto error;
	195	}
	196
907d6deb AV	197	error:
907d6deb AV	198	target_state = PM_SUSPEND_ON;
07192604	199
85c4b31e	200	at91_pinctrl_gpio_resume();
907d6deb AV	201	return 0;
	202	}
	203
c697eece RW	204	/*
	205	* Called right prior to thawing processes.
	206	*/
	207	static void at91_pm_end(void)
	208	{
	209	target_state = PM_SUSPEND_ON;
	210	}
	211
907d6deb	212
2f55ac07	213	static const struct platform_suspend_ops at91_pm_ops = {
c697eece RW	214	.valid = at91_pm_valid_state,
	215	.begin = at91_pm_begin,
	216	.enter = at91_pm_enter,
	217	.end = at91_pm_end,
907d6deb AV	218	};
907d6deb AV	219
5ad945ea DL	220	static struct platform_device at91_cpuidle_device = {
	221	.name = "cpuidle-at91",
	222	};
	223
	224	void at91_pm_set_standby(void (*at91_standby)(void))
	225	{
	226	if (at91_standby) {
	227	at91_cpuidle_device.dev.platform_data = at91_standby;
	228	at91_pm_standby = at91_standby;
	229	}
	230	}
	231
907d6deb AV	232	static int __init at91_pm_init(void)
907d6deb AV	233	{
f5d0f457 AV	234	#ifdef CONFIG_AT91_SLOW_CLOCK
f5d0f457 AV	235	slow_clock = (void *) (AT91_IO_VIRT_BASE - at91_slow_clock_sz);
907d6deb AV	236	#endif
907d6deb AV	237
f5d0f457 AV	238	pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));
f5d0f457 AV	239
f5d0f457	240	/* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
efd09165 JCPV	241	if (cpu_is_at91rm9200())
efd09165 JCPV	242	at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
5ad945ea DL	243
	244	if (at91_cpuidle_device.dev.platform_data)
	245	platform_device_register(&at91_cpuidle_device);
907d6deb	246
26398a70	247	suspend_set_ops(&at91_pm_ops);
907d6deb AV	248
	249	return 0;
	250	}
	251	arch_initcall(at91_pm_init);