[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-at91 / setup.c

/*
 * Copyright (C) 2007 Atmel Corporation.
 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
 *
 * Under GPLv2
 */

#define pr_fmt(fmt)	"AT91: " fmt

#include <linux/module.h>
#include <linux/io.h>
#include <linux/mm.h>
#include <linux/pm.h>
#include <linux/of_address.h>
#include <linux/pinctrl/machine.h>
#include <linux/clk/at91_pmc.h>

#include <asm/system_misc.h>
#include <asm/mach/map.h>

#include <mach/hardware.h>
#include <mach/cpu.h>
#include <mach/at91_dbgu.h>

#include "generic.h"
#include "pm.h"

struct at91_socinfo at91_soc_initdata;
EXPORT_SYMBOL(at91_soc_initdata);

static struct map_desc at91_io_desc __initdata __maybe_unused = {
	.virtual	= (unsigned long)AT91_VA_BASE_SYS,
	.pfn		= __phys_to_pfn(AT91_BASE_SYS),
	.length		= SZ_16K,
	.type		= MT_DEVICE,
};

static struct map_desc at91_alt_io_desc __initdata __maybe_unused = {
	.virtual	= (unsigned long)AT91_ALT_VA_BASE_SYS,
	.pfn		= __phys_to_pfn(AT91_ALT_BASE_SYS),
	.length		= 24 * SZ_1K,
	.type		= MT_DEVICE,
};

static void __init soc_detect(u32 dbgu_base)
{
	u32 cidr, socid;

	cidr = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_CIDR);
	socid = cidr & ~AT91_CIDR_VERSION;

	switch (socid) {
	case ARCH_ID_AT91RM9200:
		at91_soc_initdata.type = AT91_SOC_RM9200;
		if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_UNKNOWN)
			at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
		break;

	case ARCH_ID_AT91SAM9260:
		at91_soc_initdata.type = AT91_SOC_SAM9260;
		at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
		break;

	case ARCH_ID_AT91SAM9261:
		at91_soc_initdata.type = AT91_SOC_SAM9261;
		at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
		break;

	case ARCH_ID_AT91SAM9263:
		at91_soc_initdata.type = AT91_SOC_SAM9263;
		at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
		break;

	case ARCH_ID_AT91SAM9G20:
		at91_soc_initdata.type = AT91_SOC_SAM9G20;
		at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
		break;

	case ARCH_ID_AT91SAM9G45:
		at91_soc_initdata.type = AT91_SOC_SAM9G45;
		if (cidr == ARCH_ID_AT91SAM9G45ES)
			at91_soc_initdata.subtype = AT91_SOC_SAM9G45ES;
		break;

	case ARCH_ID_AT91SAM9RL64:
		at91_soc_initdata.type = AT91_SOC_SAM9RL;
		at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
		break;

	case ARCH_ID_AT91SAM9X5:
		at91_soc_initdata.type = AT91_SOC_SAM9X5;
		break;

	case ARCH_ID_AT91SAM9N12:
		at91_soc_initdata.type = AT91_SOC_SAM9N12;
		break;

	case ARCH_ID_SAMA5:
		at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
		if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D3) {
			at91_soc_initdata.type = AT91_SOC_SAMA5D3;
		}
		break;
	}

	/* at91sam9g10 */
	if ((socid & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
		at91_soc_initdata.type = AT91_SOC_SAM9G10;
		at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
	}
	/* at91sam9xe */
	else if ((cidr & AT91_CIDR_ARCH) == ARCH_FAMILY_AT91SAM9XE) {
		at91_soc_initdata.type = AT91_SOC_SAM9260;
		at91_soc_initdata.subtype = AT91_SOC_SAM9XE;
	}

	if (!at91_soc_is_detected())
		return;

	at91_soc_initdata.cidr = cidr;

	/* sub version of soc */
	if (!at91_soc_initdata.exid)
		at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID);

	if (at91_soc_initdata.type == AT91_SOC_SAM9G45) {
		switch (at91_soc_initdata.exid) {
		case ARCH_EXID_AT91SAM9M10:
			at91_soc_initdata.subtype = AT91_SOC_SAM9M10;
			break;
		case ARCH_EXID_AT91SAM9G46:
			at91_soc_initdata.subtype = AT91_SOC_SAM9G46;
			break;
		case ARCH_EXID_AT91SAM9M11:
			at91_soc_initdata.subtype = AT91_SOC_SAM9M11;
			break;
		}
	}

	if (at91_soc_initdata.type == AT91_SOC_SAM9X5) {
		switch (at91_soc_initdata.exid) {
		case ARCH_EXID_AT91SAM9G15:
			at91_soc_initdata.subtype = AT91_SOC_SAM9G15;
			break;
		case ARCH_EXID_AT91SAM9G35:
			at91_soc_initdata.subtype = AT91_SOC_SAM9G35;
			break;
		case ARCH_EXID_AT91SAM9X35:
			at91_soc_initdata.subtype = AT91_SOC_SAM9X35;
			break;
		case ARCH_EXID_AT91SAM9G25:
			at91_soc_initdata.subtype = AT91_SOC_SAM9G25;
			break;
		case ARCH_EXID_AT91SAM9X25:
			at91_soc_initdata.subtype = AT91_SOC_SAM9X25;
			break;
		}
	}

	if (at91_soc_initdata.type == AT91_SOC_SAMA5D3) {
		switch (at91_soc_initdata.exid) {
		case ARCH_EXID_SAMA5D31:
			at91_soc_initdata.subtype = AT91_SOC_SAMA5D31;
			break;
		case ARCH_EXID_SAMA5D33:
			at91_soc_initdata.subtype = AT91_SOC_SAMA5D33;
			break;
		case ARCH_EXID_SAMA5D34:
			at91_soc_initdata.subtype = AT91_SOC_SAMA5D34;
			break;
		case ARCH_EXID_SAMA5D35:
			at91_soc_initdata.subtype = AT91_SOC_SAMA5D35;
			break;
		case ARCH_EXID_SAMA5D36:
			at91_soc_initdata.subtype = AT91_SOC_SAMA5D36;
			break;
		}
	}
}

static void __init alt_soc_detect(u32 dbgu_base)
{
	u32 cidr, socid;

	/* SoC ID */
	cidr = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_CIDR);
	socid = cidr & ~AT91_CIDR_VERSION;

	switch (socid) {
	case ARCH_ID_SAMA5:
		at91_soc_initdata.exid = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
		if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D3) {
			at91_soc_initdata.type = AT91_SOC_SAMA5D3;
		} else if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D4) {
			at91_soc_initdata.type = AT91_SOC_SAMA5D4;
		}
		break;
	}

	if (!at91_soc_is_detected())
		return;

	at91_soc_initdata.cidr = cidr;

	/* sub version of soc */
	if (!at91_soc_initdata.exid)
		at91_soc_initdata.exid = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_EXID);

	if (at91_soc_initdata.type == AT91_SOC_SAMA5D4) {
		switch (at91_soc_initdata.exid) {
		case ARCH_EXID_SAMA5D41:
			at91_soc_initdata.subtype = AT91_SOC_SAMA5D41;
			break;
		case ARCH_EXID_SAMA5D42:
			at91_soc_initdata.subtype = AT91_SOC_SAMA5D42;
			break;
		case ARCH_EXID_SAMA5D43:
			at91_soc_initdata.subtype = AT91_SOC_SAMA5D43;
			break;
		case ARCH_EXID_SAMA5D44:
			at91_soc_initdata.subtype = AT91_SOC_SAMA5D44;
			break;
		}
	}
}

static const char *soc_name[] = {
	[AT91_SOC_RM9200]	= "at91rm9200",
	[AT91_SOC_SAM9260]	= "at91sam9260",
	[AT91_SOC_SAM9261]	= "at91sam9261",
	[AT91_SOC_SAM9263]	= "at91sam9263",
	[AT91_SOC_SAM9G10]	= "at91sam9g10",
	[AT91_SOC_SAM9G20]	= "at91sam9g20",
	[AT91_SOC_SAM9G45]	= "at91sam9g45",
	[AT91_SOC_SAM9RL]	= "at91sam9rl",
	[AT91_SOC_SAM9X5]	= "at91sam9x5",
	[AT91_SOC_SAM9N12]	= "at91sam9n12",
	[AT91_SOC_SAMA5D3]	= "sama5d3",
	[AT91_SOC_SAMA5D4]	= "sama5d4",
	[AT91_SOC_UNKNOWN]	= "Unknown",
};

const char *at91_get_soc_type(struct at91_socinfo *c)
{
	return soc_name[c->type];
}
EXPORT_SYMBOL(at91_get_soc_type);

static const char *soc_subtype_name[] = {
	[AT91_SOC_RM9200_BGA]	= "at91rm9200 BGA",
	[AT91_SOC_RM9200_PQFP]	= "at91rm9200 PQFP",
	[AT91_SOC_SAM9XE]	= "at91sam9xe",
	[AT91_SOC_SAM9G45ES]	= "at91sam9g45es",
	[AT91_SOC_SAM9M10]	= "at91sam9m10",
	[AT91_SOC_SAM9G46]	= "at91sam9g46",
	[AT91_SOC_SAM9M11]	= "at91sam9m11",
	[AT91_SOC_SAM9G15]	= "at91sam9g15",
	[AT91_SOC_SAM9G35]	= "at91sam9g35",
	[AT91_SOC_SAM9X35]	= "at91sam9x35",
	[AT91_SOC_SAM9G25]	= "at91sam9g25",
	[AT91_SOC_SAM9X25]	= "at91sam9x25",
	[AT91_SOC_SAMA5D31]	= "sama5d31",
	[AT91_SOC_SAMA5D33]	= "sama5d33",
	[AT91_SOC_SAMA5D34]	= "sama5d34",
	[AT91_SOC_SAMA5D35]	= "sama5d35",
	[AT91_SOC_SAMA5D36]	= "sama5d36",
	[AT91_SOC_SAMA5D41]	= "sama5d41",
	[AT91_SOC_SAMA5D42]	= "sama5d42",
	[AT91_SOC_SAMA5D43]	= "sama5d43",
	[AT91_SOC_SAMA5D44]	= "sama5d44",
	[AT91_SOC_SUBTYPE_NONE]	= "None",
	[AT91_SOC_SUBTYPE_UNKNOWN] = "Unknown",
};

const char *at91_get_soc_subtype(struct at91_socinfo *c)
{
	return soc_subtype_name[c->subtype];
}
EXPORT_SYMBOL(at91_get_soc_subtype);

void __init at91_map_io(void)
{
	/* Map peripherals */
	iotable_init(&at91_io_desc, 1);

	at91_soc_initdata.type = AT91_SOC_UNKNOWN;
	at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_UNKNOWN;

	soc_detect(AT91_BASE_DBGU0);
	if (!at91_soc_is_detected())
		soc_detect(AT91_BASE_DBGU1);

	if (!at91_soc_is_detected())
		panic(pr_fmt("Impossible to detect the SOC type"));

	pr_info("Detected soc type: %s\n",
		at91_get_soc_type(&at91_soc_initdata));
	if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE)
		pr_info("Detected soc subtype: %s\n",
			at91_get_soc_subtype(&at91_soc_initdata));
}

void __init at91_alt_map_io(void)
{
	/* Map peripherals */
	iotable_init(&at91_alt_io_desc, 1);

	at91_soc_initdata.type = AT91_SOC_UNKNOWN;
	at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_UNKNOWN;

	alt_soc_detect(AT91_BASE_DBGU2);
	if (!at91_soc_is_detected())
		panic("AT91: Impossible to detect the SOC type");

	pr_info("AT91: Detected soc type: %s\n",
		at91_get_soc_type(&at91_soc_initdata));
	if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE)
		pr_info("AT91: Detected soc subtype: %s\n",
			at91_get_soc_subtype(&at91_soc_initdata));
}

void __iomem *at91_matrix_base;
EXPORT_SYMBOL_GPL(at91_matrix_base);

void __init at91_ioremap_matrix(u32 base_addr)
{
	at91_matrix_base = ioremap(base_addr, 512);
	if (!at91_matrix_base)
		panic(pr_fmt("Impossible to ioremap at91_matrix_base\n"));
}
Commit	Line	Data
21d08b9d JCPV	1	/*
	2	* Copyright (C) 2007 Atmel Corporation.
	3	* Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
	4	*
	5	* Under GPLv2
	6	*/
	7
9e8be232 MR	8	#define pr_fmt(fmt) "AT91: " fmt
9e8be232 MR	9
21d08b9d JCPV	10	#include <linux/module.h>
21d08b9d JCPV	11	#include <linux/io.h>
fb149f9e	12	#include <linux/mm.h>
f22deee5	13	#include <linux/pm.h>
2b11ea5b	14	#include <linux/of_address.h>
97e5e625	15	#include <linux/pinctrl/machine.h>
2edb90ae	16	#include <linux/clk/at91_pmc.h>
21d08b9d	17
86dfe446	18	#include <asm/system_misc.h>
21d08b9d JCPV	19	#include <asm/mach/map.h>
	20
	21	#include <mach/hardware.h>
	22	#include <mach/cpu.h>
8c3583b6	23	#include <mach/at91_dbgu.h>
21d08b9d	24
21d08b9d	25	#include "generic.h"
6b625891	26	#include "pm.h"
21d08b9d	27
8c3583b6 JCPV	28	struct at91_socinfo at91_soc_initdata;
	29	EXPORT_SYMBOL(at91_soc_initdata);
	30
ac09281a	31	static struct map_desc at91_io_desc __initdata __maybe_unused = {
dca4ba41	32	.virtual = (unsigned long)AT91_VA_BASE_SYS,
21d08b9d JCPV	33	.pfn = __phys_to_pfn(AT91_BASE_SYS),
	34	.length = SZ_16K,
	35	.type = MT_DEVICE,
	36	};
	37
726d32bf NF	38	static struct map_desc at91_alt_io_desc __initdata __maybe_unused = {
	39	.virtual = (unsigned long)AT91_ALT_VA_BASE_SYS,
	40	.pfn = __phys_to_pfn(AT91_ALT_BASE_SYS),
	41	.length = 24 * SZ_1K,
	42	.type = MT_DEVICE,
	43	};
	44
8c3583b6	45	static void __init soc_detect(u32 dbgu_base)
21d08b9d	46	{
8c3583b6 JCPV	47	u32 cidr, socid;
	48
	49	cidr = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_CIDR);
	50	socid = cidr & ~AT91_CIDR_VERSION;
21d08b9d	51
8c3583b6	52	switch (socid) {
8c3583b6 JCPV	53	case ARCH_ID_AT91RM9200:
8c3583b6 JCPV	54	at91_soc_initdata.type = AT91_SOC_RM9200;
13ab6aeb	55	if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_UNKNOWN)
36224d0f	56	at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
8c3583b6 JCPV	57	break;
	58
	59	case ARCH_ID_AT91SAM9260:
	60	at91_soc_initdata.type = AT91_SOC_SAM9260;
13ab6aeb	61	at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
8c3583b6 JCPV	62	break;
	63
	64	case ARCH_ID_AT91SAM9261:
	65	at91_soc_initdata.type = AT91_SOC_SAM9261;
13ab6aeb	66	at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
8c3583b6 JCPV	67	break;
	68
	69	case ARCH_ID_AT91SAM9263:
	70	at91_soc_initdata.type = AT91_SOC_SAM9263;
13ab6aeb	71	at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
8c3583b6 JCPV	72	break;
	73
	74	case ARCH_ID_AT91SAM9G20:
	75	at91_soc_initdata.type = AT91_SOC_SAM9G20;
13ab6aeb	76	at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
8c3583b6 JCPV	77	break;
	78
	79	case ARCH_ID_AT91SAM9G45:
	80	at91_soc_initdata.type = AT91_SOC_SAM9G45;
	81	if (cidr == ARCH_ID_AT91SAM9G45ES)
	82	at91_soc_initdata.subtype = AT91_SOC_SAM9G45ES;
8c3583b6 JCPV	83	break;
	84
	85	case ARCH_ID_AT91SAM9RL64:
	86	at91_soc_initdata.type = AT91_SOC_SAM9RL;
13ab6aeb	87	at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
8c3583b6 JCPV	88	break;
	89
	90	case ARCH_ID_AT91SAM9X5:
	91	at91_soc_initdata.type = AT91_SOC_SAM9X5;
8c3583b6	92	break;
74db4fb9 HX	93
	94	case ARCH_ID_AT91SAM9N12:
	95	at91_soc_initdata.type = AT91_SOC_SAM9N12;
74db4fb9	96	break;
8f4b4794	97
726d32bf NF	98	case ARCH_ID_SAMA5:
	99	at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
	100	if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D3) {
	101	at91_soc_initdata.type = AT91_SOC_SAMA5D3;
726d32bf	102	}
8f4b4794	103	break;
8c3583b6 JCPV	104	}
	105
	106	/* at91sam9g10 */
3d9a0183	107	if ((socid & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
8c3583b6	108	at91_soc_initdata.type = AT91_SOC_SAM9G10;
13ab6aeb	109	at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
8c3583b6 JCPV	110	}
	111	/* at91sam9xe */
	112	else if ((cidr & AT91_CIDR_ARCH) == ARCH_FAMILY_AT91SAM9XE) {
	113	at91_soc_initdata.type = AT91_SOC_SAM9260;
	114	at91_soc_initdata.subtype = AT91_SOC_SAM9XE;
8c3583b6 JCPV	115	}
	116
	117	if (!at91_soc_is_detected())
	118	return;
	119
	120	at91_soc_initdata.cidr = cidr;
	121
	122	/* sub version of soc */
726d32bf NF	123	if (!at91_soc_initdata.exid)
726d32bf NF	124	at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
8c3583b6 JCPV	125
	126	if (at91_soc_initdata.type == AT91_SOC_SAM9G45) {
	127	switch (at91_soc_initdata.exid) {
	128	case ARCH_EXID_AT91SAM9M10:
	129	at91_soc_initdata.subtype = AT91_SOC_SAM9M10;
	130	break;
	131	case ARCH_EXID_AT91SAM9G46:
	132	at91_soc_initdata.subtype = AT91_SOC_SAM9G46;
	133	break;
	134	case ARCH_EXID_AT91SAM9M11:
	135	at91_soc_initdata.subtype = AT91_SOC_SAM9M11;
	136	break;
	137	}
	138	}
	139
	140	if (at91_soc_initdata.type == AT91_SOC_SAM9X5) {
	141	switch (at91_soc_initdata.exid) {
	142	case ARCH_EXID_AT91SAM9G15:
	143	at91_soc_initdata.subtype = AT91_SOC_SAM9G15;
	144	break;
	145	case ARCH_EXID_AT91SAM9G35:
	146	at91_soc_initdata.subtype = AT91_SOC_SAM9G35;
	147	break;
	148	case ARCH_EXID_AT91SAM9X35:
	149	at91_soc_initdata.subtype = AT91_SOC_SAM9X35;
	150	break;
	151	case ARCH_EXID_AT91SAM9G25:
	152	at91_soc_initdata.subtype = AT91_SOC_SAM9G25;
	153	break;
	154	case ARCH_EXID_AT91SAM9X25:
	155	at91_soc_initdata.subtype = AT91_SOC_SAM9X25;
	156	break;
	157	}
	158	}
8f4b4794 LD	159
	160	if (at91_soc_initdata.type == AT91_SOC_SAMA5D3) {
	161	switch (at91_soc_initdata.exid) {
	162	case ARCH_EXID_SAMA5D31:
	163	at91_soc_initdata.subtype = AT91_SOC_SAMA5D31;
	164	break;
	165	case ARCH_EXID_SAMA5D33:
	166	at91_soc_initdata.subtype = AT91_SOC_SAMA5D33;
	167	break;
	168	case ARCH_EXID_SAMA5D34:
	169	at91_soc_initdata.subtype = AT91_SOC_SAMA5D34;
	170	break;
	171	case ARCH_EXID_SAMA5D35:
	172	at91_soc_initdata.subtype = AT91_SOC_SAMA5D35;
	173	break;
7f457160 JW	174	case ARCH_EXID_SAMA5D36:
	175	at91_soc_initdata.subtype = AT91_SOC_SAMA5D36;
	176	break;
8f4b4794 LD	177	}
8f4b4794 LD	178	}
8c3583b6 JCPV	179	}
8c3583b6 JCPV	180
726d32bf NF	181	static void __init alt_soc_detect(u32 dbgu_base)
	182	{
	183	u32 cidr, socid;
	184
	185	/* SoC ID */
	186	cidr = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_CIDR);
	187	socid = cidr & ~AT91_CIDR_VERSION;
	188
	189	switch (socid) {
	190	case ARCH_ID_SAMA5:
	191	at91_soc_initdata.exid = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
	192	if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D3) {
	193	at91_soc_initdata.type = AT91_SOC_SAMA5D3;
726d32bf NF	194	} else if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D4) {
726d32bf NF	195	at91_soc_initdata.type = AT91_SOC_SAMA5D4;
726d32bf NF	196	}
	197	break;
	198	}
	199
	200	if (!at91_soc_is_detected())
	201	return;
	202
	203	at91_soc_initdata.cidr = cidr;
	204
	205	/* sub version of soc */
	206	if (!at91_soc_initdata.exid)
	207	at91_soc_initdata.exid = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
	208
	209	if (at91_soc_initdata.type == AT91_SOC_SAMA5D4) {
	210	switch (at91_soc_initdata.exid) {
	211	case ARCH_EXID_SAMA5D41:
	212	at91_soc_initdata.subtype = AT91_SOC_SAMA5D41;
	213	break;
	214	case ARCH_EXID_SAMA5D42:
	215	at91_soc_initdata.subtype = AT91_SOC_SAMA5D42;
	216	break;
	217	case ARCH_EXID_SAMA5D43:
	218	at91_soc_initdata.subtype = AT91_SOC_SAMA5D43;
	219	break;
	220	case ARCH_EXID_SAMA5D44:
	221	at91_soc_initdata.subtype = AT91_SOC_SAMA5D44;
	222	break;
	223	}
	224	}
	225	}
	226
8c3583b6 JCPV	227	static const char *soc_name[] = {
8c3583b6 JCPV	228	[AT91_SOC_RM9200] = "at91rm9200",
8c3583b6 JCPV	229	[AT91_SOC_SAM9260] = "at91sam9260",
	230	[AT91_SOC_SAM9261] = "at91sam9261",
	231	[AT91_SOC_SAM9263] = "at91sam9263",
	232	[AT91_SOC_SAM9G10] = "at91sam9g10",
	233	[AT91_SOC_SAM9G20] = "at91sam9g20",
	234	[AT91_SOC_SAM9G45] = "at91sam9g45",
	235	[AT91_SOC_SAM9RL] = "at91sam9rl",
	236	[AT91_SOC_SAM9X5] = "at91sam9x5",
74db4fb9	237	[AT91_SOC_SAM9N12] = "at91sam9n12",
8f4b4794	238	[AT91_SOC_SAMA5D3] = "sama5d3",
726d32bf	239	[AT91_SOC_SAMA5D4] = "sama5d4",
13ab6aeb	240	[AT91_SOC_UNKNOWN] = "Unknown",
8c3583b6 JCPV	241	};
	242
	243	const char at91_get_soc_type(struct at91_socinfo c)
	244	{
	245	return soc_name[c->type];
	246	}
	247	EXPORT_SYMBOL(at91_get_soc_type);
	248
	249	static const char *soc_subtype_name[] = {
	250	[AT91_SOC_RM9200_BGA] = "at91rm9200 BGA",
	251	[AT91_SOC_RM9200_PQFP] = "at91rm9200 PQFP",
8c3583b6 JCPV	252	[AT91_SOC_SAM9XE] = "at91sam9xe",
	253	[AT91_SOC_SAM9G45ES] = "at91sam9g45es",
	254	[AT91_SOC_SAM9M10] = "at91sam9m10",
	255	[AT91_SOC_SAM9G46] = "at91sam9g46",
	256	[AT91_SOC_SAM9M11] = "at91sam9m11",
	257	[AT91_SOC_SAM9G15] = "at91sam9g15",
	258	[AT91_SOC_SAM9G35] = "at91sam9g35",
	259	[AT91_SOC_SAM9X35] = "at91sam9x35",
	260	[AT91_SOC_SAM9G25] = "at91sam9g25",
	261	[AT91_SOC_SAM9X25] = "at91sam9x25",
8f4b4794 LD	262	[AT91_SOC_SAMA5D31] = "sama5d31",
	263	[AT91_SOC_SAMA5D33] = "sama5d33",
	264	[AT91_SOC_SAMA5D34] = "sama5d34",
	265	[AT91_SOC_SAMA5D35] = "sama5d35",
7f457160	266	[AT91_SOC_SAMA5D36] = "sama5d36",
726d32bf NF	267	[AT91_SOC_SAMA5D41] = "sama5d41",
	268	[AT91_SOC_SAMA5D42] = "sama5d42",
	269	[AT91_SOC_SAMA5D43] = "sama5d43",
	270	[AT91_SOC_SAMA5D44] = "sama5d44",
13ab6aeb NF	271	[AT91_SOC_SUBTYPE_NONE] = "None",
13ab6aeb NF	272	[AT91_SOC_SUBTYPE_UNKNOWN] = "Unknown",
8c3583b6 JCPV	273	};
	274
	275	const char at91_get_soc_subtype(struct at91_socinfo c)
	276	{
	277	return soc_subtype_name[c->subtype];
	278	}
	279	EXPORT_SYMBOL(at91_get_soc_subtype);
	280
	281	void __init at91_map_io(void)
	282	{
	283	/* Map peripherals */
	284	iotable_init(&at91_io_desc, 1);
	285
13ab6aeb NF	286	at91_soc_initdata.type = AT91_SOC_UNKNOWN;
13ab6aeb NF	287	at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_UNKNOWN;
8c3583b6	288
13079a73	289	soc_detect(AT91_BASE_DBGU0);
8c3583b6	290	if (!at91_soc_is_detected())
13079a73	291	soc_detect(AT91_BASE_DBGU1);
8c3583b6 JCPV	292
8c3583b6 JCPV	293	if (!at91_soc_is_detected())
9e8be232	294	panic(pr_fmt("Impossible to detect the SOC type"));
8c3583b6	295
9e8be232	296	pr_info("Detected soc type: %s\n",
8c3583b6	297	at91_get_soc_type(&at91_soc_initdata));
13ab6aeb	298	if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE)
9e8be232	299	pr_info("Detected soc subtype: %s\n",
13ab6aeb	300	at91_get_soc_subtype(&at91_soc_initdata));
21d08b9d JCPV	301	}
21d08b9d JCPV	302
726d32bf NF	303	void __init at91_alt_map_io(void)
	304	{
	305	/* Map peripherals */
	306	iotable_init(&at91_alt_io_desc, 1);
	307
	308	at91_soc_initdata.type = AT91_SOC_UNKNOWN;
	309	at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_UNKNOWN;
	310
	311	alt_soc_detect(AT91_BASE_DBGU2);
	312	if (!at91_soc_is_detected())
	313	panic("AT91: Impossible to detect the SOC type");
	314
	315	pr_info("AT91: Detected soc type: %s\n",
	316	at91_get_soc_type(&at91_soc_initdata));
	317	if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE)
	318	pr_info("AT91: Detected soc subtype: %s\n",
	319	at91_get_soc_subtype(&at91_soc_initdata));
726d32bf NF	320	}
726d32bf NF	321
4342d647	322	void __iomem *at91_matrix_base;
ac8c411c	323	EXPORT_SYMBOL_GPL(at91_matrix_base);
4342d647 JCPV	324
	325	void __init at91_ioremap_matrix(u32 base_addr)
	326	{
	327	at91_matrix_base = ioremap(base_addr, 512);
	328	if (!at91_matrix_base)
9e8be232	329	panic(pr_fmt("Impossible to ioremap at91_matrix_base\n"));
4342d647	330	}