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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[mirror_ubuntu-eoan-kernel.git] / arch / arm / mach-davinci / board-da830-evm.c
CommitLineData
8593790d
MG		 1/*
2 * TI DA830/OMAP L137 EVM board
3 *
4 * Author: Mark A. Greer <mgreer@mvista.com>
5 * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
6 *
7 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
8 * the terms of the GNU General Public License version 2. This program
9 * is licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 */
12#include <linux/kernel.h>
8593790d
MG		 13#include <linux/init.h>
14#include <linux/console.h>
0e9a3ddc 15#include <linux/interrupt.h>
13e1f044 16#include <linux/gpio.h>
b5e1438c 17#include <linux/gpio/machine.h>
733975a3 18#include <linux/platform_device.h>
8593790d 19#include <linux/i2c.h>
b6480fae 20#include <linux/platform_data/pcf857x.h>
25f73ed5 21#include <linux/platform_data/at24.h>
733975a3
DG		 22#include <linux/mtd/mtd.h>
23#include <linux/mtd/partitions.h>
16a3c832
SN		 24#include <linux/spi/spi.h>
25#include <linux/spi/flash.h>
b856671e
PA		 26#include <linux/platform_data/gpio-davinci.h>
27#include <linux/platform_data/mtd-davinci.h>
28#include <linux/platform_data/mtd-davinci-aemif.h>
29#include <linux/platform_data/spi-davinci.h>
30#include <linux/platform_data/usb-davinci.h>
40a17abc 31#include <linux/regulator/machine.h>
8593790d
MG		 32
33#include <asm/mach-types.h>
34#include <asm/mach/arch.h>
35
b856671e 36#include <mach/common.h>
3acf731c 37#include "cp_intc.h"
32bf078c 38#include <mach/mux.h>
8593790d
MG		 39#include <mach/da8xx.h>
40
782f2d78 41#define DA830_EVM_PHY_ID ""
0e9a3ddc
SS		 42/*
43 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
44 */
45#define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
46#define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
47
48static const short da830_evm_usb11_pins[] = {
49 DA830_GPIO1_15, DA830_GPIO2_4,
50 -1
51};
52
53static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
54
55static int da830_evm_usb_set_power(unsigned port, int on)
56{
57 gpio_set_value(ON_BD_USB_DRV, on);
58 return 0;
59}
60
61static int da830_evm_usb_get_power(unsigned port)
62{
63 return gpio_get_value(ON_BD_USB_DRV);
64}
65
66static int da830_evm_usb_get_oci(unsigned port)
67{
68 return !gpio_get_value(ON_BD_USB_OVC);
69}
70
71static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
72
73static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
74{
75 int irq = gpio_to_irq(ON_BD_USB_OVC);
76 int error = 0;
77
78 if (handler != NULL) {
79 da830_evm_usb_ocic_handler = handler;
80
1091a654 81 error = request_irq(irq, da830_evm_usb_ocic_irq,
0e9a3ddc
SS		 82 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
83 "OHCI over-current indicator", NULL);
84 if (error)
a7ca2bcf
JP		 85 pr_err("%s: could not request IRQ to watch over-current indicator changes\n",
86 __func__);
0e9a3ddc
SS		 87 } else
88 free_irq(irq, NULL);
89
90 return error;
91}
92
93static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
94 .set_power = da830_evm_usb_set_power,
95 .get_power = da830_evm_usb_get_power,
96 .get_oci = da830_evm_usb_get_oci,
97 .ocic_notify = da830_evm_usb_ocic_notify,
98
99 /* TPS2065 switch @ 5V */
100 .potpgt = (3 + 1) / 2, /* 3 ms max */
101};
102
103static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
104{
105 da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
106 return IRQ_HANDLED;
107}
108
109static __init void da830_evm_usb_init(void)
110{
0e9a3ddc
SS		 111 int ret;
112
ca6a272a 113 /* USB_REFCLKIN is not used. */
0004b02a
DL		 114 ret = da8xx_register_usb20_phy_clk(false);
115 if (ret)
116 pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n",
117 __func__, ret);
118
119 ret = da8xx_register_usb11_phy_clk(false);
120 if (ret)
121 pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
122 __func__, ret);
9b504750
DL		 123
124 ret = da8xx_register_usb_phy();
125 if (ret)
126 pr_warn("%s: USB PHY registration failed: %d\n",
127 __func__, ret);
128
ca6a272a
SS		 129 ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
130 if (ret)
a7ca2bcf 131 pr_warn("%s: USB 2.0 PinMux setup failed: %d\n", __func__, ret);
ca6a272a
SS		 132 else {
133 /*
134 * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
135 * with the power on to power good time of 3 ms.
136 */
137 ret = da8xx_register_usb20(1000, 3);
138 if (ret)
a7ca2bcf
JP		 139 pr_warn("%s: USB 2.0 registration failed: %d\n",
140 __func__, ret);
ca6a272a
SS		 141 }
142
3821d10a 143 ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
0e9a3ddc 144 if (ret) {
a7ca2bcf 145 pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret);
0e9a3ddc
SS		 146 return;
147 }
148
149 ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
150 if (ret) {
a7ca2bcf
JP		 151 pr_err("%s: failed to request GPIO for USB 1.1 port power control: %d\n",
152 __func__, ret);
0e9a3ddc
SS		 153 return;
154 }
155 gpio_direction_output(ON_BD_USB_DRV, 0);
156
157 ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
158 if (ret) {
a7ca2bcf
JP		 159 pr_err("%s: failed to request GPIO for USB 1.1 port over-current indicator: %d\n",
160 __func__, ret);
0e9a3ddc
SS		 161 return;
162 }
163 gpio_direction_input(ON_BD_USB_OVC);
164
165 ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
166 if (ret)
a7ca2bcf 167 pr_warn("%s: USB 1.1 registration failed: %d\n", __func__, ret);
0e9a3ddc
SS		 168}
169
32bf078c
MG		 170static const short da830_evm_mcasp1_pins[] = {
171 DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
172 DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
173 DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
174 DA830_AXR1_11,
175 -1
176};
177
e33ef5e3
C		 178static u8 da830_iis_serializer_direction[] = {
179 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
180 INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
181 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
182};
183
184static struct snd_platform_data da830_evm_snd_data = {
185 .tx_dma_offset = 0x2000,
186 .rx_dma_offset = 0x2000,
187 .op_mode = DAVINCI_MCASP_IIS_MODE,
188 .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
189 .tdm_slots = 2,
190 .serial_dir = da830_iis_serializer_direction,
48519f0a 191 .asp_chan_q = EVENTQ_0,
e33ef5e3
C		 192 .version = MCASP_VERSION_2,
193 .txnumevt = 1,
194 .rxnumevt = 1,
195};
196
2eb30c81
DG		 197/*
198 * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
199 */
200static const short da830_evm_mmc_sd_pins[] = {
201 DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
202 DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
203 DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
204 DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
205 -1
206};
207
b5e1438c
AH		 208static struct gpiod_lookup_table mmc_gpios_table = {
209 .dev_id = "da830-mmc.0",
210 .table = {
211 /* gpio chip 1 contains gpio range 32-63 */
212 GPIO_LOOKUP("davinci_gpio.1", 2, "cd", GPIO_ACTIVE_LOW),
213 GPIO_LOOKUP("davinci_gpio.1", 1, "wp", GPIO_ACTIVE_LOW),
214 },
215};
8ccfd3f0 216
2eb30c81 217static struct davinci_mmc_config da830_evm_mmc_config = {
d154fed7 218 .wires = 8,
0046d0bf
C		 219 .max_freq = 50000000,
220 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
2eb30c81
DG		 221};
222
223static inline void da830_evm_init_mmc(void)
224{
225 int ret;
226
3821d10a 227 ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
2eb30c81 228 if (ret) {
a7ca2bcf 229 pr_warn("%s: mmc/sd mux setup failed: %d\n", __func__, ret);
2eb30c81
DG		 230 return;
231 }
232
b5e1438c 233 gpiod_add_lookup_table(&mmc_gpios_table);
8ccfd3f0 234
2eb30c81
DG		 235 ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
236 if (ret) {
a7ca2bcf 237 pr_warn("%s: mmc/sd registration failed: %d\n", __func__, ret);
b5e1438c 238 gpiod_remove_lookup_table(&mmc_gpios_table);
2eb30c81
DG		 239 }
240}
241
a0433ac3
SN		 242/*
243 * UI board NAND/NOR flashes only use 8-bit data bus.
244 */
245static const short da830_evm_emif25_pins[] = {
246 DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
247 DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
248 DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
249 DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
250 DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
251 DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
252 DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
253 -1
254};
255
a0a56db9 256#define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI)
b5ebe4e1 257
733975a3
DG		 258#ifdef CONFIG_DA830_UI_NAND
259static struct mtd_partition da830_evm_nand_partitions[] = {
260 /* bootloader (U-Boot, etc) in first sector */
261 [0] = {
262 .name = "bootloader",
263 .offset = 0,
264 .size = SZ_128K,
265 .mask_flags = MTD_WRITEABLE, /* force read-only */
266 },
267 /* bootloader params in the next sector */
268 [1] = {
269 .name = "params",
270 .offset = MTDPART_OFS_APPEND,
271 .size = SZ_128K,
272 .mask_flags = MTD_WRITEABLE, /* force read-only */
273 },
274 /* kernel */
275 [2] = {
276 .name = "kernel",
277 .offset = MTDPART_OFS_APPEND,
278 .size = SZ_2M,
279 .mask_flags = 0,
280 },
281 /* file system */
282 [3] = {
283 .name = "filesystem",
284 .offset = MTDPART_OFS_APPEND,
285 .size = MTDPART_SIZ_FULL,
286 .mask_flags = 0,
287 }
288};
289
290/* flash bbt decriptors */
291static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
292static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
293
294static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
295 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
296 NAND_BBT_WRITE | NAND_BBT_2BIT |
297 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
298 .offs = 2,
299 .len = 4,
300 .veroffs = 16,
301 .maxblocks = 4,
302 .pattern = da830_evm_nand_bbt_pattern
303};
304
305static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
306 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
307 NAND_BBT_WRITE | NAND_BBT_2BIT |
308 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
309 .offs = 2,
310 .len = 4,
311 .veroffs = 16,
312 .maxblocks = 4,
313 .pattern = da830_evm_nand_mirror_pattern
314};
315
217f1366
SR		 316static struct davinci_aemif_timing da830_evm_nandflash_timing = {
317 .wsetup = 24,
318 .wstrobe = 21,
319 .whold = 14,
320 .rsetup = 19,
321 .rstrobe = 50,
322 .rhold = 0,
323 .ta = 20,
324};
325
733975a3
DG		 326static struct davinci_nand_pdata da830_evm_nand_pdata = {
327 .parts = da830_evm_nand_partitions,
328 .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
329 .ecc_mode = NAND_ECC_HW,
330 .ecc_bits = 4,
bb9ebd4e 331 .bbt_options = NAND_BBT_USE_FLASH,
733975a3
DG		 332 .bbt_td = &da830_evm_nand_bbt_main_descr,
333 .bbt_md = &da830_evm_nand_bbt_mirror_descr,
217f1366 334 .timing = &da830_evm_nandflash_timing,
733975a3
DG		 335};
336
337static struct resource da830_evm_nand_resources[] = {
338 [0] = { /* First memory resource is NAND I/O window */
002cb2d2
SS		 339 .start = DA8XX_AEMIF_CS3_BASE,
340 .end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
733975a3
DG		 341 .flags = IORESOURCE_MEM,
342 },
343 [1] = { /* Second memory resource is AEMIF control registers */
002cb2d2
SS		 344 .start = DA8XX_AEMIF_CTL_BASE,
345 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
733975a3
DG		 346 .flags = IORESOURCE_MEM,
347 },
348};
349
350static struct platform_device da830_evm_nand_device = {
351 .name = "davinci_nand",
352 .id = 1,
353 .dev = {
354 .platform_data = &da830_evm_nand_pdata,
355 },
356 .num_resources = ARRAY_SIZE(da830_evm_nand_resources),
357 .resource = da830_evm_nand_resources,
358};
a0433ac3 359
77316f05 360static inline void da830_evm_init_nand(int mux_mode)
a0433ac3
SN		 361{
362 int ret;
363
b5ebe4e1 364 if (HAS_MMC) {
a7ca2bcf
JP		 365 pr_warn("WARNING: both MMC/SD and NAND are enabled, but they share AEMIF pins\n"
366 "\tDisable MMC/SD for NAND support\n");
b5ebe4e1
SN		 367 return;
368 }
369
3821d10a 370 ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
a0433ac3 371 if (ret)
a7ca2bcf 372 pr_warn("%s: emif25 mux setup failed: %d\n", __func__, ret);
a0433ac3
SN		 373
374 ret = platform_device_register(&da830_evm_nand_device);
375 if (ret)
a7ca2bcf 376 pr_warn("%s: NAND device not registered\n", __func__);
77316f05 377
67f5185c 378 if (davinci_aemif_setup(&da830_evm_nand_device))
a7ca2bcf 379 pr_warn("%s: Cannot configure AEMIF\n", __func__);
67f5185c 380
77316f05 381 gpio_direction_output(mux_mode, 1);
a0433ac3
SN		 382}
383#else
77316f05 384static inline void da830_evm_init_nand(int mux_mode) { }
733975a3
DG		 385#endif
386
a0433ac3 387#ifdef CONFIG_DA830_UI_LCD
77316f05 388static inline void da830_evm_init_lcdc(int mux_mode)
a0433ac3
SN		 389{
390 int ret;
391
3821d10a 392 ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
a0433ac3 393 if (ret)
a7ca2bcf 394 pr_warn("%s: lcdcntl mux setup failed: %d\n", __func__, ret);
a0433ac3
SN		 395
396 ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
397 if (ret)
a7ca2bcf 398 pr_warn("%s: lcd setup failed: %d\n", __func__, ret);
77316f05
SN		 399
400 gpio_direction_output(mux_mode, 0);
a0433ac3
SN		 401}
402#else
77316f05 403static inline void da830_evm_init_lcdc(int mux_mode) { }
a0433ac3 404#endif
733975a3 405
77316f05
SN		 406static struct at24_platform_data da830_evm_i2c_eeprom_info = {
407 .byte_len = SZ_256K / 8,
408 .page_size = 64,
409 .flags = AT24_FLAG_ADDR16,
410 .setup = davinci_get_mac_addr,
411 .context = (void *)0x7f00,
412};
413
1ef203c3
SR		 414static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
415 int gpio, unsigned ngpio, void *context)
77316f05
SN		 416{
417 gpio_request(gpio + 6, "UI MUX_MODE");
418
b5ebe4e1
SN		 419 /* Drive mux mode low to match the default without UI card */
420 gpio_direction_output(gpio + 6, 0);
421
77316f05
SN		 422 da830_evm_init_lcdc(gpio + 6);
423
424 da830_evm_init_nand(gpio + 6);
425
426 return 0;
427}
428
429static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
430 unsigned ngpio, void *context)
431{
432 gpio_free(gpio + 6);
433 return 0;
434}
435
1ef203c3 436static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
77316f05
SN		 437 .gpio_base = DAVINCI_N_GPIO,
438 .setup = da830_evm_ui_expander_setup,
439 .teardown = da830_evm_ui_expander_teardown,
440};
441
442static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
443 {
444 I2C_BOARD_INFO("24c256", 0x50),
445 .platform_data = &da830_evm_i2c_eeprom_info,
446 },
447 {
448 I2C_BOARD_INFO("tlv320aic3x", 0x18),
449 },
450 {
451 I2C_BOARD_INFO("pcf8574", 0x3f),
452 .platform_data = &da830_evm_ui_expander_info,
453 },
454};
455
456static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
457 .bus_freq = 100, /* kHz */
458 .bus_delay = 0, /* usec */
459};
460
a941c503
RS		 461/*
462 * The following EDMA channels/slots are not being used by drivers (for
463 * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
464 * they are being reserved for codecs on the DSP side.
465 */
466static const s16 da830_dma_rsv_chans[][2] = {
467 /* (offset, number) */
468 { 8, 2},
469 {12, 2},
470 {24, 4},
471 {30, 2},
472 {-1, -1}
473};
474
475static const s16 da830_dma_rsv_slots[][2] = {
476 /* (offset, number) */
477 { 8, 2},
478 {12, 2},
479 {24, 4},
480 {30, 26},
481 {-1, -1}
482};
483
484static struct edma_rsv_info da830_edma_rsv[] = {
485 {
486 .rsv_chans = da830_dma_rsv_chans,
487 .rsv_slots = da830_dma_rsv_slots,
488 },
489};
490
16a3c832
SN		 491static struct mtd_partition da830evm_spiflash_part[] = {
492 [0] = {
493 .name = "DSP-UBL",
494 .offset = 0,
495 .size = SZ_8K,
496 .mask_flags = MTD_WRITEABLE,
497 },
498 [1] = {
499 .name = "ARM-UBL",
500 .offset = MTDPART_OFS_APPEND,
501 .size = SZ_16K + SZ_8K,
502 .mask_flags = MTD_WRITEABLE,
503 },
504 [2] = {
505 .name = "U-Boot",
506 .offset = MTDPART_OFS_APPEND,
507 .size = SZ_256K - SZ_32K,
508 .mask_flags = MTD_WRITEABLE,
509 },
510 [3] = {
511 .name = "U-Boot-Environment",
512 .offset = MTDPART_OFS_APPEND,
513 .size = SZ_16K,
514 .mask_flags = 0,
515 },
516 [4] = {
517 .name = "Kernel",
518 .offset = MTDPART_OFS_APPEND,
519 .size = MTDPART_SIZ_FULL,
520 .mask_flags = 0,
521 },
522};
523
524static struct flash_platform_data da830evm_spiflash_data = {
525 .name = "m25p80",
526 .parts = da830evm_spiflash_part,
527 .nr_parts = ARRAY_SIZE(da830evm_spiflash_part),
528 .type = "w25x32",
529};
530
531static struct davinci_spi_config da830evm_spiflash_cfg = {
532 .io_type = SPI_IO_TYPE_DMA,
533 .c2tdelay = 8,
534 .t2cdelay = 8,
535};
536
537static struct spi_board_info da830evm_spi_info[] = {
538 {
539 .modalias = "m25p80",
540 .platform_data = &da830evm_spiflash_data,
541 .controller_data = &da830evm_spiflash_cfg,
542 .mode = SPI_MODE_0,
543 .max_speed_hz = 30000000,
544 .bus_num = 0,
545 .chip_select = 0,
546 },
547};
548
8593790d
MG		 549static __init void da830_evm_init(void)
550{
551 struct davinci_soc_info *soc_info = &davinci_soc_info;
552 int ret;
553
0fcd5411
DL		 554 ret = da8xx_register_cfgchip();
555 if (ret)
556 pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);
557
b856671e
PA		 558 ret = da830_register_gpio();
559 if (ret)
a7ca2bcf 560 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
b856671e 561
a941c503 562 ret = da830_register_edma(da830_edma_rsv);
8593790d 563 if (ret)
a7ca2bcf 564 pr_warn("%s: edma registration failed: %d\n", __func__, ret);
8593790d 565
3821d10a 566 ret = davinci_cfg_reg_list(da830_i2c0_pins);
8593790d 567 if (ret)
a7ca2bcf 568 pr_warn("%s: i2c0 mux setup failed: %d\n", __func__, ret);
8593790d
MG		 569
570 ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
571 if (ret)
a7ca2bcf 572 pr_warn("%s: i2c0 registration failed: %d\n", __func__, ret);
8593790d 573
0e9a3ddc
SS		 574 da830_evm_usb_init();
575
8593790d 576 soc_info->emac_pdata->rmii_en = 1;
782f2d78 577 soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID;
8593790d 578
3821d10a 579 ret = davinci_cfg_reg_list(da830_cpgmac_pins);
8593790d 580 if (ret)
a7ca2bcf 581 pr_warn("%s: cpgmac mux setup failed: %d\n", __func__, ret);
8593790d
MG		 582
583 ret = da8xx_register_emac();
584 if (ret)
a7ca2bcf 585 pr_warn("%s: emac registration failed: %d\n", __func__, ret);
8593790d
MG		 586
587 ret = da8xx_register_watchdog();
588 if (ret)
a7ca2bcf
JP		 589 pr_warn("%s: watchdog registration failed: %d\n",
590 __func__, ret);
8593790d 591
fcf7157b 592 davinci_serial_init(da8xx_serial_device);
8593790d
MG		 593 i2c_register_board_info(1, da830_evm_i2c_devices,
594 ARRAY_SIZE(da830_evm_i2c_devices));
e33ef5e3 595
3821d10a 596 ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
e33ef5e3 597 if (ret)
a7ca2bcf 598 pr_warn("%s: mcasp1 mux setup failed: %d\n", __func__, ret);
e33ef5e3 599
b8864aa4 600 da8xx_register_mcasp(1, &da830_evm_snd_data);
2eb30c81
DG		 601
602 da830_evm_init_mmc();
13e1f044 603
c51df70b
MG		 604 ret = da8xx_register_rtc();
605 if (ret)
a7ca2bcf 606 pr_warn("%s: rtc setup failed: %d\n", __func__, ret);
16a3c832 607
0273612c
VD		 608 ret = spi_register_board_info(da830evm_spi_info,
609 ARRAY_SIZE(da830evm_spi_info));
610 if (ret)
a7ca2bcf
JP		 611 pr_warn("%s: spi info registration failed: %d\n",
612 __func__, ret);
0273612c
VD		 613
614 ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info));
16a3c832 615 if (ret)
a7ca2bcf 616 pr_warn("%s: spi 0 registration failed: %d\n", __func__, ret);
40a17abc
AH		 617
618 regulator_has_full_constraints();
8593790d
MG		 619}
620
621#ifdef CONFIG_SERIAL_8250_CONSOLE
622static int __init da830_evm_console_init(void)
623{
1aa5f2a9
MW		 624 if (!machine_is_davinci_da830_evm())
625 return 0;
626
8593790d
MG		 627 return add_preferred_console("ttyS", 2, "115200");
628}
629console_initcall(da830_evm_console_init);
630#endif
631
8593790d
MG		 632static void __init da830_evm_map_io(void)
633{
634 da830_init();
635}
636
48ea89ea 637MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
e7e56014 638 .atag_offset = 0x100,
8593790d 639 .map_io = da830_evm_map_io,
bd808947 640 .init_irq = cp_intc_init,
6bb27d73 641 .init_time = davinci_timer_init,
8593790d 642 .init_machine = da830_evm_init,
3aa3e840 643 .init_late = davinci_init_late,
f68deabf 644 .dma_zone_size = SZ_128M,
c6121ddd 645 .restart = da8xx_restart,
8593790d 646MACHINE_END
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