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Merge branch 'x86-boot-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-davinci / board-da850-evm.c
CommitLineData
0fbc5592
SR		 1/*
2 * TI DA850/OMAP-L138 EVM board
3 *
4 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Derived from: arch/arm/mach-davinci/board-da830-evm.c
7 * Original Copyrights follow:
8 *
9 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 */
0fbc5592 14#include <linux/console.h>
6809084a
MP		 15#include <linux/delay.h>
16#include <linux/gpio.h>
17#include <linux/gpio_keys.h>
bdf0e836 18#include <linux/gpio/machine.h>
6809084a
MP		 19#include <linux/init.h>
20#include <linux/kernel.h>
f46f335c 21#include <linux/leds.h>
0fbc5592 22#include <linux/i2c.h>
25f73ed5 23#include <linux/platform_data/at24.h>
5877457a 24#include <linux/platform_data/pca953x.h>
75929f5e 25#include <linux/input.h>
6809084a 26#include <linux/input/tps6507x-ts.h>
0bc20bba 27#include <linux/mfd/tps6507x.h>
38beb929
SR		 28#include <linux/mtd/mtd.h>
29#include <linux/mtd/nand.h>
30#include <linux/mtd/partitions.h>
7c5ec609 31#include <linux/mtd/physmap.h>
6809084a 32#include <linux/platform_device.h>
b856671e 33#include <linux/platform_data/gpio-davinci.h>
6809084a
MP		 34#include <linux/platform_data/mtd-davinci.h>
35#include <linux/platform_data/mtd-davinci-aemif.h>
36#include <linux/platform_data/spi-davinci.h>
ae41d17a 37#include <linux/platform_data/uio_pruss.h>
a9eb1f67 38#include <linux/regulator/machine.h>
8b24599e 39#include <linux/regulator/tps6507x.h>
9e9bc235 40#include <linux/regulator/fixed.h>
fdce5568
SN		 41#include <linux/spi/spi.h>
42#include <linux/spi/flash.h>
0fbc5592 43
b856671e 44#include <mach/common.h>
3acf731c 45#include "cp_intc.h"
0fbc5592 46#include <mach/da8xx.h>
7761ef67 47#include <mach/mux.h>
3acf731c 48#include "sram.h"
6809084a
MP		 49
50#include <asm/mach-types.h>
51#include <asm/mach/arch.h>
52#include <asm/system_info.h>
0fbc5592 53
b5dcee22
MCC		 54#include <media/i2c/tvp514x.h>
55#include <media/i2c/adv7343.h>
1e046d17 56
f6f97588 57#define DA850_EVM_PHY_ID "davinci_mdio-0:00"
7761ef67 58#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
5cbdf276 59#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
5cbdf276 60
2206771c
C		 61#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
62
fdce5568
SN		 63static struct mtd_partition da850evm_spiflash_part[] = {
64 [0] = {
65 .name = "UBL",
66 .offset = 0,
67 .size = SZ_64K,
68 .mask_flags = MTD_WRITEABLE,
69 },
70 [1] = {
71 .name = "U-Boot",
72 .offset = MTDPART_OFS_APPEND,
73 .size = SZ_512K,
74 .mask_flags = MTD_WRITEABLE,
75 },
76 [2] = {
77 .name = "U-Boot-Env",
78 .offset = MTDPART_OFS_APPEND,
79 .size = SZ_64K,
80 .mask_flags = MTD_WRITEABLE,
81 },
82 [3] = {
83 .name = "Kernel",
84 .offset = MTDPART_OFS_APPEND,
85 .size = SZ_2M + SZ_512K,
86 .mask_flags = 0,
87 },
88 [4] = {
89 .name = "Filesystem",
90 .offset = MTDPART_OFS_APPEND,
91 .size = SZ_4M,
92 .mask_flags = 0,
93 },
94 [5] = {
95 .name = "MAC-Address",
96 .offset = SZ_8M - SZ_64K,
97 .size = SZ_64K,
98 .mask_flags = MTD_WRITEABLE,
99 },
100};
101
102static struct flash_platform_data da850evm_spiflash_data = {
103 .name = "m25p80",
104 .parts = da850evm_spiflash_part,
105 .nr_parts = ARRAY_SIZE(da850evm_spiflash_part),
106 .type = "m25p64",
107};
108
109static struct davinci_spi_config da850evm_spiflash_cfg = {
110 .io_type = SPI_IO_TYPE_DMA,
111 .c2tdelay = 8,
112 .t2cdelay = 8,
113};
114
115static struct spi_board_info da850evm_spi_info[] = {
116 {
117 .modalias = "m25p80",
118 .platform_data = &da850evm_spiflash_data,
119 .controller_data = &da850evm_spiflash_cfg,
120 .mode = SPI_MODE_0,
121 .max_speed_hz = 30000000,
122 .bus_num = 1,
123 .chip_select = 0,
124 },
125};
126
810198bc
RS		 127#ifdef CONFIG_MTD
128static void da850_evm_m25p80_notify_add(struct mtd_info *mtd)
129{
130 char *mac_addr = davinci_soc_info.emac_pdata->mac_addr;
131 size_t retlen;
132
133 if (!strcmp(mtd->name, "MAC-Address")) {
329ad399 134 mtd_read(mtd, 0, ETH_ALEN, &retlen, mac_addr);
810198bc
RS		 135 if (retlen == ETH_ALEN)
136 pr_info("Read MAC addr from SPI Flash: %pM\n",
137 mac_addr);
138 }
139}
140
141static struct mtd_notifier da850evm_spi_notifier = {
142 .add = da850_evm_m25p80_notify_add,
143};
144
145static void da850_evm_setup_mac_addr(void)
146{
147 register_mtd_user(&da850evm_spi_notifier);
148}
149#else
150static void da850_evm_setup_mac_addr(void) { }
151#endif
152
7c5ec609
SR		 153static struct mtd_partition da850_evm_norflash_partition[] = {
154 {
e2abd5a2 155 .name = "bootloaders + env",
7c5ec609 156 .offset = 0,
e2abd5a2
SR		 157 .size = SZ_512K,
158 .mask_flags = MTD_WRITEABLE,
159 },
160 {
161 .name = "kernel",
162 .offset = MTDPART_OFS_APPEND,
163 .size = SZ_2M,
164 .mask_flags = 0,
165 },
166 {
167 .name = "filesystem",
168 .offset = MTDPART_OFS_APPEND,
7c5ec609
SR		 169 .size = MTDPART_SIZ_FULL,
170 .mask_flags = 0,
171 },
172};
173
174static struct physmap_flash_data da850_evm_norflash_data = {
175 .width = 2,
176 .parts = da850_evm_norflash_partition,
177 .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
178};
179
180static struct resource da850_evm_norflash_resource[] = {
181 {
182 .start = DA8XX_AEMIF_CS2_BASE,
183 .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
184 .flags = IORESOURCE_MEM,
185 },
186};
187
188static struct platform_device da850_evm_norflash_device = {
189 .name = "physmap-flash",
190 .id = 0,
191 .dev = {
192 .platform_data = &da850_evm_norflash_data,
193 },
194 .num_resources = 1,
195 .resource = da850_evm_norflash_resource,
196};
197
38beb929
SR		 198/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
199 * (128K blocks). It may be used instead of the (default) SPI flash
200 * to boot, using TI's tools to install the secondary boot loader
201 * (UBL) and U-Boot.
202 */
db549d22 203static struct mtd_partition da850_evm_nandflash_partition[] = {
38beb929
SR		 204 {
205 .name = "u-boot env",
206 .offset = 0,
207 .size = SZ_128K,
208 .mask_flags = MTD_WRITEABLE,
209 },
210 {
211 .name = "UBL",
212 .offset = MTDPART_OFS_APPEND,
213 .size = SZ_128K,
214 .mask_flags = MTD_WRITEABLE,
215 },
216 {
217 .name = "u-boot",
218 .offset = MTDPART_OFS_APPEND,
219 .size = 4 * SZ_128K,
220 .mask_flags = MTD_WRITEABLE,
221 },
222 {
223 .name = "kernel",
224 .offset = 0x200000,
225 .size = SZ_2M,
226 .mask_flags = 0,
227 },
228 {
229 .name = "filesystem",
230 .offset = MTDPART_OFS_APPEND,
231 .size = MTDPART_SIZ_FULL,
232 .mask_flags = 0,
233 },
234};
235
18a8505c
SN		 236static struct davinci_aemif_timing da850_evm_nandflash_timing = {
237 .wsetup = 24,
238 .wstrobe = 21,
239 .whold = 14,
240 .rsetup = 19,
241 .rstrobe = 50,
242 .rhold = 0,
243 .ta = 20,
244};
245
38beb929
SR		 246static struct davinci_nand_pdata da850_evm_nandflash_data = {
247 .parts = da850_evm_nandflash_partition,
248 .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
249 .ecc_mode = NAND_ECC_HW,
fc42e335 250 .ecc_bits = 4,
bb9ebd4e 251 .bbt_options = NAND_BBT_USE_FLASH,
18a8505c 252 .timing = &da850_evm_nandflash_timing,
38beb929
SR		 253};
254
255static struct resource da850_evm_nandflash_resource[] = {
256 {
257 .start = DA8XX_AEMIF_CS3_BASE,
258 .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
259 .flags = IORESOURCE_MEM,
260 },
261 {
262 .start = DA8XX_AEMIF_CTL_BASE,
263 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
264 .flags = IORESOURCE_MEM,
265 },
266};
267
268static struct platform_device da850_evm_nandflash_device = {
269 .name = "davinci_nand",
270 .id = 1,
271 .dev = {
272 .platform_data = &da850_evm_nandflash_data,
273 },
274 .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
275 .resource = da850_evm_nandflash_resource,
276};
277
59858b71 278static struct platform_device *da850_evm_devices[] = {
039c5ee3
SR		 279 &da850_evm_nandflash_device,
280 &da850_evm_norflash_device,
281};
282
283#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
284#define DA8XX_AEMIF_ASIZE_16BIT 0x1
285
286static void __init da850_evm_init_nor(void)
287{
288 void __iomem *aemif_addr;
289
290 aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
291
292 /* Configure data bus width of CS2 to 16 bit */
293 writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
294 DA8XX_AEMIF_ASIZE_16BIT,
295 aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
296
297 iounmap(aemif_addr);
298}
299
f48ecc2f
SS		 300static const short da850_evm_nand_pins[] = {
301 DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
302 DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
303 DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
304 DA850_NEMA_WE, DA850_NEMA_OE,
305 -1
306};
307
308static const short da850_evm_nor_pins[] = {
309 DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
310 DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1,
311 DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5,
312 DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9,
313 DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13,
314 DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1,
315 DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5,
316 DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9,
317 DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13,
318 DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17,
319 DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21,
320 DA850_EMA_A_22, DA850_EMA_A_23,
321 -1
322};
323
a0a56db9 324#define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI)
039c5ee3 325
f48ecc2f 326static inline void da850_evm_setup_nor_nand(void)
039c5ee3
SR		 327{
328 int ret = 0;
329
b688c2fb 330 if (!HAS_MMC) {
f48ecc2f 331 ret = davinci_cfg_reg_list(da850_evm_nand_pins);
039c5ee3 332 if (ret)
6c7c23cc
RT		 333 pr_warn("%s: NAND mux setup failed: %d\n",
334 __func__, ret);
039c5ee3 335
f48ecc2f 336 ret = davinci_cfg_reg_list(da850_evm_nor_pins);
039c5ee3 337 if (ret)
6c7c23cc
RT		 338 pr_warn("%s: NOR mux setup failed: %d\n",
339 __func__, ret);
039c5ee3
SR		 340
341 da850_evm_init_nor();
342
343 platform_add_devices(da850_evm_devices,
344 ARRAY_SIZE(da850_evm_devices));
67f5185c
IK		 345
346 if (davinci_aemif_setup(&da850_evm_nandflash_device))
347 pr_warn("%s: Cannot configure AEMIF.\n", __func__);
039c5ee3
SR		 348 }
349}
75e2ea64 350
bae10587
SN		 351#ifdef CONFIG_DA850_UI_RMII
352static inline void da850_evm_setup_emac_rmii(int rmii_sel)
353{
354 struct davinci_soc_info *soc_info = &davinci_soc_info;
355
356 soc_info->emac_pdata->rmii_en = 1;
47e7cb14 357 gpio_set_value_cansleep(rmii_sel, 0);
bae10587
SN		 358}
359#else
360static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
361#endif
362
75929f5e
BG		 363
364#define DA850_KEYS_DEBOUNCE_MS 10
365/*
366 * At 200ms polling interval it is possible to miss an
367 * event by tapping very lightly on the push button but most
368 * pushes do result in an event; longer intervals require the
369 * user to hold the button whereas shorter intervals require
370 * more CPU time for polling.
371 */
372#define DA850_GPIO_KEYS_POLL_MS 200
373
374enum da850_evm_ui_exp_pins {
375 DA850_EVM_UI_EXP_SEL_C = 5,
376 DA850_EVM_UI_EXP_SEL_B,
377 DA850_EVM_UI_EXP_SEL_A,
378 DA850_EVM_UI_EXP_PB8,
379 DA850_EVM_UI_EXP_PB7,
380 DA850_EVM_UI_EXP_PB6,
381 DA850_EVM_UI_EXP_PB5,
382 DA850_EVM_UI_EXP_PB4,
383 DA850_EVM_UI_EXP_PB3,
384 DA850_EVM_UI_EXP_PB2,
385 DA850_EVM_UI_EXP_PB1,
386};
387
58b6c5a1 388static const char * const da850_evm_ui_exp[] = {
75929f5e
BG		 389 [DA850_EVM_UI_EXP_SEL_C] = "sel_c",
390 [DA850_EVM_UI_EXP_SEL_B] = "sel_b",
391 [DA850_EVM_UI_EXP_SEL_A] = "sel_a",
392 [DA850_EVM_UI_EXP_PB8] = "pb8",
393 [DA850_EVM_UI_EXP_PB7] = "pb7",
394 [DA850_EVM_UI_EXP_PB6] = "pb6",
395 [DA850_EVM_UI_EXP_PB5] = "pb5",
396 [DA850_EVM_UI_EXP_PB4] = "pb4",
397 [DA850_EVM_UI_EXP_PB3] = "pb3",
398 [DA850_EVM_UI_EXP_PB2] = "pb2",
399 [DA850_EVM_UI_EXP_PB1] = "pb1",
400};
401
402#define DA850_N_UI_PB 8
403
404static struct gpio_keys_button da850_evm_ui_keys[] = {
405 [0 ... DA850_N_UI_PB - 1] = {
406 .type = EV_KEY,
407 .active_low = 1,
408 .wakeup = 0,
409 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
410 .code = -1, /* assigned at runtime */
411 .gpio = -1, /* assigned at runtime */
412 .desc = NULL, /* assigned at runtime */
413 },
414};
415
416static struct gpio_keys_platform_data da850_evm_ui_keys_pdata = {
417 .buttons = da850_evm_ui_keys,
418 .nbuttons = ARRAY_SIZE(da850_evm_ui_keys),
419 .poll_interval = DA850_GPIO_KEYS_POLL_MS,
420};
421
422static struct platform_device da850_evm_ui_keys_device = {
423 .name = "gpio-keys-polled",
424 .id = 0,
425 .dev = {
426 .platform_data = &da850_evm_ui_keys_pdata
427 },
428};
429
430static void da850_evm_ui_keys_init(unsigned gpio)
431{
432 int i;
433 struct gpio_keys_button *button;
434
435 for (i = 0; i < DA850_N_UI_PB; i++) {
436 button = &da850_evm_ui_keys[i];
437 button->code = KEY_F8 - i;
14f6aeb4 438 button->desc = da850_evm_ui_exp[DA850_EVM_UI_EXP_PB8 + i];
75929f5e
BG		 439 button->gpio = gpio + DA850_EVM_UI_EXP_PB8 + i;
440 }
441}
442
1e046d17
MH		 443#ifdef CONFIG_DA850_UI_SD_VIDEO_PORT
444static inline void da850_evm_setup_video_port(int video_sel)
445{
446 gpio_set_value_cansleep(video_sel, 0);
447}
448#else
449static inline void da850_evm_setup_video_port(int video_sel) { }
450#endif
451
75e2ea64
C		 452static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
453 unsigned ngpio, void *c)
454{
455 int sel_a, sel_b, sel_c, ret;
456
53c2897d
BG		 457 sel_a = gpio + DA850_EVM_UI_EXP_SEL_A;
458 sel_b = gpio + DA850_EVM_UI_EXP_SEL_B;
459 sel_c = gpio + DA850_EVM_UI_EXP_SEL_C;
75e2ea64 460
53c2897d 461 ret = gpio_request(sel_a, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_A]);
75e2ea64 462 if (ret) {
6c7c23cc 463 pr_warn("Cannot open UI expander pin %d\n", sel_a);
75e2ea64
C		 464 goto exp_setup_sela_fail;
465 }
466
53c2897d 467 ret = gpio_request(sel_b, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_B]);
75e2ea64 468 if (ret) {
6c7c23cc 469 pr_warn("Cannot open UI expander pin %d\n", sel_b);
75e2ea64
C		 470 goto exp_setup_selb_fail;
471 }
472
53c2897d 473 ret = gpio_request(sel_c, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_C]);
75e2ea64 474 if (ret) {
6c7c23cc 475 pr_warn("Cannot open UI expander pin %d\n", sel_c);
75e2ea64
C		 476 goto exp_setup_selc_fail;
477 }
478
479 /* deselect all functionalities */
480 gpio_direction_output(sel_a, 1);
481 gpio_direction_output(sel_b, 1);
482 gpio_direction_output(sel_c, 1);
483
75929f5e
BG		 484 da850_evm_ui_keys_init(gpio);
485 ret = platform_device_register(&da850_evm_ui_keys_device);
486 if (ret) {
6c7c23cc 487 pr_warn("Could not register UI GPIO expander push-buttons");
75929f5e
BG		 488 goto exp_setup_keys_fail;
489 }
490
75e2ea64
C		 491 pr_info("DA850/OMAP-L138 EVM UI card detected\n");
492
493 da850_evm_setup_nor_nand();
494
bae10587 495 da850_evm_setup_emac_rmii(sel_a);
2206771c 496
1e046d17
MH		 497 da850_evm_setup_video_port(sel_c);
498
75e2ea64
C		 499 return 0;
500
75929f5e
BG		 501exp_setup_keys_fail:
502 gpio_free(sel_c);
75e2ea64
C		 503exp_setup_selc_fail:
504 gpio_free(sel_b);
505exp_setup_selb_fail:
506 gpio_free(sel_a);
507exp_setup_sela_fail:
508 return ret;
509}
510
511static int da850_evm_ui_expander_teardown(struct i2c_client *client,
512 unsigned gpio, unsigned ngpio, void *c)
513{
75929f5e
BG		 514 platform_device_unregister(&da850_evm_ui_keys_device);
515
75e2ea64 516 /* deselect all functionalities */
53c2897d
BG		 517 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_C, 1);
518 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_B, 1);
519 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_A, 1);
75e2ea64 520
53c2897d
BG		 521 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_C);
522 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_B);
523 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_A);
75e2ea64
C		 524
525 return 0;
526}
527
70b30939
BG		 528/* assign the baseboard expander's GPIOs after the UI board's */
529#define DA850_UI_EXPANDER_N_GPIOS ARRAY_SIZE(da850_evm_ui_exp)
530#define DA850_BB_EXPANDER_GPIO_BASE (DAVINCI_N_GPIO + DA850_UI_EXPANDER_N_GPIOS)
531
532enum da850_evm_bb_exp_pins {
533 DA850_EVM_BB_EXP_DEEP_SLEEP_EN = 0,
534 DA850_EVM_BB_EXP_SW_RST,
535 DA850_EVM_BB_EXP_TP_23,
536 DA850_EVM_BB_EXP_TP_22,
537 DA850_EVM_BB_EXP_TP_21,
538 DA850_EVM_BB_EXP_USER_PB1,
539 DA850_EVM_BB_EXP_USER_LED2,
540 DA850_EVM_BB_EXP_USER_LED1,
541 DA850_EVM_BB_EXP_USER_SW1,
542 DA850_EVM_BB_EXP_USER_SW2,
543 DA850_EVM_BB_EXP_USER_SW3,
544 DA850_EVM_BB_EXP_USER_SW4,
545 DA850_EVM_BB_EXP_USER_SW5,
546 DA850_EVM_BB_EXP_USER_SW6,
547 DA850_EVM_BB_EXP_USER_SW7,
548 DA850_EVM_BB_EXP_USER_SW8
549};
550
58b6c5a1 551static const char * const da850_evm_bb_exp[] = {
70b30939
BG		 552 [DA850_EVM_BB_EXP_DEEP_SLEEP_EN] = "deep_sleep_en",
553 [DA850_EVM_BB_EXP_SW_RST] = "sw_rst",
554 [DA850_EVM_BB_EXP_TP_23] = "tp_23",
555 [DA850_EVM_BB_EXP_TP_22] = "tp_22",
556 [DA850_EVM_BB_EXP_TP_21] = "tp_21",
557 [DA850_EVM_BB_EXP_USER_PB1] = "user_pb1",
558 [DA850_EVM_BB_EXP_USER_LED2] = "user_led2",
559 [DA850_EVM_BB_EXP_USER_LED1] = "user_led1",
560 [DA850_EVM_BB_EXP_USER_SW1] = "user_sw1",
561 [DA850_EVM_BB_EXP_USER_SW2] = "user_sw2",
562 [DA850_EVM_BB_EXP_USER_SW3] = "user_sw3",
563 [DA850_EVM_BB_EXP_USER_SW4] = "user_sw4",
564 [DA850_EVM_BB_EXP_USER_SW5] = "user_sw5",
565 [DA850_EVM_BB_EXP_USER_SW6] = "user_sw6",
566 [DA850_EVM_BB_EXP_USER_SW7] = "user_sw7",
567 [DA850_EVM_BB_EXP_USER_SW8] = "user_sw8",
568};
569
570#define DA850_N_BB_USER_SW 8
571
572static struct gpio_keys_button da850_evm_bb_keys[] = {
573 [0] = {
574 .type = EV_KEY,
575 .active_low = 1,
576 .wakeup = 0,
577 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
578 .code = KEY_PROG1,
579 .desc = NULL, /* assigned at runtime */
580 .gpio = -1, /* assigned at runtime */
581 },
582 [1 ... DA850_N_BB_USER_SW] = {
583 .type = EV_SW,
584 .active_low = 1,
585 .wakeup = 0,
586 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
587 .code = -1, /* assigned at runtime */
588 .desc = NULL, /* assigned at runtime */
589 .gpio = -1, /* assigned at runtime */
590 },
591};
592
593static struct gpio_keys_platform_data da850_evm_bb_keys_pdata = {
594 .buttons = da850_evm_bb_keys,
595 .nbuttons = ARRAY_SIZE(da850_evm_bb_keys),
596 .poll_interval = DA850_GPIO_KEYS_POLL_MS,
597};
598
599static struct platform_device da850_evm_bb_keys_device = {
600 .name = "gpio-keys-polled",
601 .id = 1,
602 .dev = {
603 .platform_data = &da850_evm_bb_keys_pdata
604 },
605};
606
607static void da850_evm_bb_keys_init(unsigned gpio)
608{
609 int i;
610 struct gpio_keys_button *button;
611
612 button = &da850_evm_bb_keys[0];
14f6aeb4 613 button->desc = da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_PB1];
70b30939
BG		 614 button->gpio = gpio + DA850_EVM_BB_EXP_USER_PB1;
615
616 for (i = 0; i < DA850_N_BB_USER_SW; i++) {
617 button = &da850_evm_bb_keys[i + 1];
618 button->code = SW_LID + i;
14f6aeb4 619 button->desc = da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_SW1 + i];
70b30939
BG		 620 button->gpio = gpio + DA850_EVM_BB_EXP_USER_SW1 + i;
621 }
622}
623
624#define DA850_N_BB_USER_LED 2
625
626static struct gpio_led da850_evm_bb_leds[] = {
627 [0 ... DA850_N_BB_USER_LED - 1] = {
628 .active_low = 1,
629 .gpio = -1, /* assigned at runtime */
630 .name = NULL, /* assigned at runtime */
631 },
632};
633
634static struct gpio_led_platform_data da850_evm_bb_leds_pdata = {
635 .leds = da850_evm_bb_leds,
636 .num_leds = ARRAY_SIZE(da850_evm_bb_leds),
637};
638
639static struct platform_device da850_evm_bb_leds_device = {
640 .name = "leds-gpio",
641 .id = -1,
642 .dev = {
643 .platform_data = &da850_evm_bb_leds_pdata
644 }
645};
646
647static void da850_evm_bb_leds_init(unsigned gpio)
648{
649 int i;
650 struct gpio_led *led;
651
652 for (i = 0; i < DA850_N_BB_USER_LED; i++) {
653 led = &da850_evm_bb_leds[i];
654
655 led->gpio = gpio + DA850_EVM_BB_EXP_USER_LED2 + i;
656 led->name =
657 da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_LED2 + i];
658 }
659}
660
661static int da850_evm_bb_expander_setup(struct i2c_client *client,
662 unsigned gpio, unsigned ngpio,
663 void *c)
664{
665 int ret;
666
667 /*
668 * Register the switches and pushbutton on the baseboard as a gpio-keys
669 * device.
670 */
671 da850_evm_bb_keys_init(gpio);
672 ret = platform_device_register(&da850_evm_bb_keys_device);
673 if (ret) {
6c7c23cc 674 pr_warn("Could not register baseboard GPIO expander keys");
70b30939
BG		 675 goto io_exp_setup_sw_fail;
676 }
677
678 da850_evm_bb_leds_init(gpio);
679 ret = platform_device_register(&da850_evm_bb_leds_device);
680 if (ret) {
6c7c23cc 681 pr_warn("Could not register baseboard GPIO expander LEDs");
70b30939
BG		 682 goto io_exp_setup_leds_fail;
683 }
684
685 return 0;
686
687io_exp_setup_leds_fail:
688 platform_device_unregister(&da850_evm_bb_keys_device);
689io_exp_setup_sw_fail:
690 return ret;
691}
692
693static int da850_evm_bb_expander_teardown(struct i2c_client *client,
694 unsigned gpio, unsigned ngpio, void *c)
695{
696 platform_device_unregister(&da850_evm_bb_leds_device);
697 platform_device_unregister(&da850_evm_bb_keys_device);
698
699 return 0;
700}
701
75e2ea64
C		 702static struct pca953x_platform_data da850_evm_ui_expander_info = {
703 .gpio_base = DAVINCI_N_GPIO,
704 .setup = da850_evm_ui_expander_setup,
705 .teardown = da850_evm_ui_expander_teardown,
75929f5e 706 .names = da850_evm_ui_exp,
75e2ea64
C		 707};
708
70b30939
BG		 709static struct pca953x_platform_data da850_evm_bb_expander_info = {
710 .gpio_base = DA850_BB_EXPANDER_GPIO_BASE,
711 .setup = da850_evm_bb_expander_setup,
712 .teardown = da850_evm_bb_expander_teardown,
713 .names = da850_evm_bb_exp,
714};
715
1a7ff8ff
C		 716static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
717 {
718 I2C_BOARD_INFO("tlv320aic3x", 0x18),
75e2ea64
C		 719 },
720 {
721 I2C_BOARD_INFO("tca6416", 0x20),
722 .platform_data = &da850_evm_ui_expander_info,
723 },
70b30939
BG		 724 {
725 I2C_BOARD_INFO("tca6416", 0x21),
726 .platform_data = &da850_evm_bb_expander_info,
727 },
1a7ff8ff
C		 728};
729
0fbc5592
SR		 730static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
731 .bus_freq = 100, /* kHz */
732 .bus_delay = 0, /* usec */
733};
734
491214e1
C		 735/* davinci da850 evm audio machine driver */
736static u8 da850_iis_serializer_direction[] = {
737 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
738 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
739 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
740 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
741};
742
743static struct snd_platform_data da850_evm_snd_data = {
88abfd5b
MP		 744 .tx_dma_offset = 0x2000,
745 .rx_dma_offset = 0x2000,
746 .op_mode = DAVINCI_MCASP_IIS_MODE,
747 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
748 .tdm_slots = 2,
749 .serial_dir = da850_iis_serializer_direction,
750 .asp_chan_q = EVENTQ_0,
751 .ram_chan_q = EVENTQ_1,
752 .version = MCASP_VERSION_2,
753 .txnumevt = 1,
754 .rxnumevt = 1,
755 .sram_size_playback = SZ_8K,
756 .sram_size_capture = SZ_8K,
491214e1
C		 757};
758
c840fc74
MW		 759static const short da850_evm_mcasp_pins[] __initconst = {
760 DA850_AHCLKX, DA850_ACLKX, DA850_AFSX,
761 DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE,
762 DA850_AXR_11, DA850_AXR_12,
763 -1
764};
765
bdf0e836
AH		 766static struct gpiod_lookup_table mmc_gpios_table = {
767 .dev_id = "da830-mmc.0",
768 .table = {
769 /* gpio chip 2 contains gpio range 64-95 */
770 GPIO_LOOKUP("davinci_gpio.2", 0, "cd", GPIO_ACTIVE_LOW),
771 GPIO_LOOKUP("davinci_gpio.2", 1, "wp", GPIO_ACTIVE_LOW),
772 },
773};
700691f2
SR		 774
775static struct davinci_mmc_config da850_mmc_config = {
700691f2 776 .wires = 4,
0046d0bf
C		 777 .max_freq = 50000000,
778 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
700691f2
SR		 779};
780
5a0d80ea
MW		 781static const short da850_evm_mmcsd0_pins[] __initconst = {
782 DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2,
783 DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD,
784 DA850_GPIO4_0, DA850_GPIO4_1,
785 -1
786};
787
d52f235f
C		 788static void da850_panel_power_ctrl(int val)
789{
790 /* lcd backlight */
791 gpio_set_value(DA850_LCD_BL_PIN, val);
792
793 /* lcd power */
794 gpio_set_value(DA850_LCD_PWR_PIN, val);
795}
796
5cbdf276
SR		 797static int da850_lcd_hw_init(void)
798{
799 int status;
800
801 status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
802 if (status < 0)
803 return status;
804
805 status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
806 if (status < 0) {
807 gpio_free(DA850_LCD_BL_PIN);
808 return status;
809 }
810
811 gpio_direction_output(DA850_LCD_BL_PIN, 0);
812 gpio_direction_output(DA850_LCD_PWR_PIN, 0);
813
d52f235f
C		 814 /* Switch off panel power and backlight */
815 da850_panel_power_ctrl(0);
5cbdf276 816
d52f235f
C		 817 /* Switch on panel power and backlight */
818 da850_panel_power_ctrl(1);
5cbdf276
SR		 819
820 return 0;
821}
491214e1 822
9e9bc235
PU		 823/* Fixed regulator support */
824static struct regulator_consumer_supply fixed_supplies[] = {
825 /* Baseboard 3.3V: 5V -> TPS73701DCQ -> 3.3V */
826 REGULATOR_SUPPLY("AVDD", "1-0018"),
827 REGULATOR_SUPPLY("DRVDD", "1-0018"),
828
829 /* Baseboard 1.8V: 5V -> TPS73701DCQ -> 1.8V */
830 REGULATOR_SUPPLY("DVDD", "1-0018"),
e503eaa3
BG		 831
832 /* UI card 3.3V: 5V -> TPS73701DCQ -> 3.3V */
833 REGULATOR_SUPPLY("vcc", "1-0020"),
9e9bc235
PU		 834};
835
a9eb1f67
SN		 836/* TPS65070 voltage regulator support */
837
838/* 3.3V */
db549d22 839static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
a9eb1f67
SN		 840 {
841 .supply = "usb0_vdda33",
842 },
843 {
844 .supply = "usb1_vdda33",
845 },
846};
847
848/* 3.3V or 1.8V */
db549d22 849static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
a9eb1f67
SN		 850 {
851 .supply = "dvdd3318_a",
852 },
853 {
854 .supply = "dvdd3318_b",
855 },
856 {
857 .supply = "dvdd3318_c",
858 },
9e9bc235 859 REGULATOR_SUPPLY("IOVDD", "1-0018"),
a9eb1f67
SN		 860};
861
862/* 1.2V */
db549d22 863static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
a9eb1f67
SN		 864 {
865 .supply = "cvdd",
866 },
867};
868
869/* 1.8V LDO */
db549d22 870static struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
a9eb1f67
SN		 871 {
872 .supply = "sata_vddr",
873 },
874 {
875 .supply = "usb0_vdda18",
876 },
877 {
878 .supply = "usb1_vdda18",
879 },
880 {
881 .supply = "ddr_dvdd18",
882 },
883};
884
885/* 1.2V LDO */
db549d22 886static struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
a9eb1f67
SN		 887 {
888 .supply = "sata_vdd",
889 },
890 {
891 .supply = "pll0_vdda",
892 },
893 {
894 .supply = "pll1_vdda",
895 },
896 {
897 .supply = "usbs_cvdd",
898 },
899 {
900 .supply = "vddarnwa1",
901 },
902};
903
8b24599e
SN		 904/* We take advantage of the fact that both defdcdc{2,3} are tied high */
905static struct tps6507x_reg_platform_data tps6507x_platform_data = {
906 .defdcdc_default = true,
907};
908
db549d22 909static struct regulator_init_data tps65070_regulator_data[] = {
a9eb1f67
SN		 910 /* dcdc1 */
911 {
912 .constraints = {
913 .min_uV = 3150000,
914 .max_uV = 3450000,
915 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
916 REGULATOR_CHANGE_STATUS),
917 .boot_on = 1,
918 },
919 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
920 .consumer_supplies = tps65070_dcdc1_consumers,
921 },
922
923 /* dcdc2 */
924 {
925 .constraints = {
926 .min_uV = 1710000,
927 .max_uV = 3450000,
928 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
929 REGULATOR_CHANGE_STATUS),
930 .boot_on = 1,
79436f87 931 .always_on = 1,
a9eb1f67
SN		 932 },
933 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
934 .consumer_supplies = tps65070_dcdc2_consumers,
8b24599e 935 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 936 },
937
938 /* dcdc3 */
939 {
940 .constraints = {
941 .min_uV = 950000,
28bd2c34 942 .max_uV = 1350000,
a9eb1f67
SN		 943 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
944 REGULATOR_CHANGE_STATUS),
945 .boot_on = 1,
946 },
947 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
948 .consumer_supplies = tps65070_dcdc3_consumers,
8b24599e 949 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 950 },
951
952 /* ldo1 */
953 {
954 .constraints = {
955 .min_uV = 1710000,
956 .max_uV = 1890000,
957 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
958 REGULATOR_CHANGE_STATUS),
959 .boot_on = 1,
960 },
961 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
962 .consumer_supplies = tps65070_ldo1_consumers,
963 },
964
965 /* ldo2 */
966 {
967 .constraints = {
968 .min_uV = 1140000,
969 .max_uV = 1320000,
970 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
971 REGULATOR_CHANGE_STATUS),
972 .boot_on = 1,
973 },
974 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
975 .consumer_supplies = tps65070_ldo2_consumers,
976 },
977};
978
da1e3680
TF		 979static struct touchscreen_init_data tps6507x_touchscreen_data = {
980 .poll_period = 30, /* ms between touch samples */
981 .min_pressure = 0x30, /* minimum pressure to trigger touch */
da1e3680
TF		 982 .vendor = 0, /* /sys/class/input/input?/id/vendor */
983 .product = 65070, /* /sys/class/input/input?/id/product */
984 .version = 0x100, /* /sys/class/input/input?/id/version */
985};
986
0bc20bba
TF		 987static struct tps6507x_board tps_board = {
988 .tps6507x_pmic_init_data = &tps65070_regulator_data[0],
da1e3680 989 .tps6507x_ts_init_data = &tps6507x_touchscreen_data,
0bc20bba
TF		 990};
991
3506f277 992static struct i2c_board_info __initdata da850_evm_tps65070_info[] = {
a9eb1f67
SN		 993 {
994 I2C_BOARD_INFO("tps6507x", 0x48),
0bc20bba 995 .platform_data = &tps_board,
a9eb1f67
SN		 996 },
997};
998
999static int __init pmic_tps65070_init(void)
1000{
3506f277
BG		 1001 return i2c_register_board_info(1, da850_evm_tps65070_info,
1002 ARRAY_SIZE(da850_evm_tps65070_info));
a9eb1f67
SN		 1003}
1004
7761ef67
SR		 1005static const short da850_evm_lcdc_pins[] = {
1006 DA850_GPIO2_8, DA850_GPIO2_15,
1007 -1
1008};
1009
85b8307f
SS		 1010static const short da850_evm_mii_pins[] = {
1011 DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
1012 DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
1013 DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
1014 DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
1015 DA850_MDIO_D,
1016 -1
1017};
1018
1019static const short da850_evm_rmii_pins[] = {
1020 DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
1021 DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
1022 DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
1023 DA850_MDIO_D,
1024 -1
1025};
1026
bae10587 1027static int __init da850_evm_config_emac(void)
2206771c
C		 1028{
1029 void __iomem *cfg_chip3_base;
1030 int ret;
1031 u32 val;
bae10587
SN		 1032 struct davinci_soc_info *soc_info = &davinci_soc_info;
1033 u8 rmii_en = soc_info->emac_pdata->rmii_en;
1034
1035 if (!machine_is_davinci_da850_evm())
1036 return 0;
2206771c 1037
d2de0582 1038 cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
2206771c 1039
2206771c 1040 val = __raw_readl(cfg_chip3_base);
17fadd9a
SN		 1041
1042 if (rmii_en) {
2206771c 1043 val |= BIT(8);
85b8307f 1044 ret = davinci_cfg_reg_list(da850_evm_rmii_pins);
17fadd9a
SN		 1045 pr_info("EMAC: RMII PHY configured, MII PHY will not be"
1046 " functional\n");
1047 } else {
2206771c 1048 val &= ~BIT(8);
85b8307f 1049 ret = davinci_cfg_reg_list(da850_evm_mii_pins);
17fadd9a
SN		 1050 pr_info("EMAC: MII PHY configured, RMII PHY will not be"
1051 " functional\n");
1052 }
1053
2206771c 1054 if (ret)
6c7c23cc
RT		 1055 pr_warn("%s: CPGMAC/RMII mux setup failed: %d\n",
1056 __func__, ret);
2206771c 1057
17fadd9a
SN		 1058 /* configure the CFGCHIP3 register for RMII or MII */
1059 __raw_writel(val, cfg_chip3_base);
1060
2206771c
C		 1061 ret = davinci_cfg_reg(DA850_GPIO2_6);
1062 if (ret)
6c7c23cc 1063 pr_warn("%s:GPIO(2,6) mux setup failed\n", __func__);
2206771c
C		 1064
1065 ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
1066 if (ret) {
6c7c23cc 1067 pr_warn("Cannot open GPIO %d\n", DA850_MII_MDIO_CLKEN_PIN);
2206771c
C		 1068 return ret;
1069 }
1070
17fadd9a
SN		 1071 /* Enable/Disable MII MDIO clock */
1072 gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
2206771c 1073
782f2d78 1074 soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID;
bae10587
SN		 1075
1076 ret = da8xx_register_emac();
1077 if (ret)
6c7c23cc 1078 pr_warn("%s: EMAC registration failed: %d\n", __func__, ret);
bae10587 1079
2206771c
C		 1080 return 0;
1081}
bae10587 1082device_initcall(da850_evm_config_emac);
2206771c 1083
a941c503
RS		 1084/*
1085 * The following EDMA channels/slots are not being used by drivers (for
1086 * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence
1087 * they are being reserved for codecs on the DSP side.
1088 */
1089static const s16 da850_dma0_rsv_chans[][2] = {
1090 /* (offset, number) */
1091 { 8, 6},
1092 {24, 4},
1093 {30, 2},
1094 {-1, -1}
1095};
1096
1097static const s16 da850_dma0_rsv_slots[][2] = {
1098 /* (offset, number) */
1099 { 8, 6},
1100 {24, 4},
1101 {30, 50},
1102 {-1, -1}
1103};
1104
1105static const s16 da850_dma1_rsv_chans[][2] = {
1106 /* (offset, number) */
1107 { 0, 28},
1108 {30, 2},
1109 {-1, -1}
1110};
1111
1112static const s16 da850_dma1_rsv_slots[][2] = {
1113 /* (offset, number) */
1114 { 0, 28},
1115 {30, 90},
1116 {-1, -1}
1117};
1118
1119static struct edma_rsv_info da850_edma_cc0_rsv = {
1120 .rsv_chans = da850_dma0_rsv_chans,
1121 .rsv_slots = da850_dma0_rsv_slots,
1122};
1123
1124static struct edma_rsv_info da850_edma_cc1_rsv = {
1125 .rsv_chans = da850_dma1_rsv_chans,
1126 .rsv_slots = da850_dma1_rsv_slots,
1127};
1128
1129static struct edma_rsv_info *da850_edma_rsv[2] = {
1130 &da850_edma_cc0_rsv,
1131 &da850_edma_cc1_rsv,
1132};
1133
28bd2c34
SN		 1134#ifdef CONFIG_CPU_FREQ
1135static __init int da850_evm_init_cpufreq(void)
1136{
1137 switch (system_rev & 0xF) {
1138 case 3:
1139 da850_max_speed = 456000;
1140 break;
1141 case 2:
1142 da850_max_speed = 408000;
1143 break;
1144 case 1:
1145 da850_max_speed = 372000;
1146 break;
1147 }
1148
1149 return da850_register_cpufreq("pll0_sysclk3");
1150}
1151#else
1152static __init int da850_evm_init_cpufreq(void) { return 0; }
1153#endif
1154
1e046d17
MH		 1155#if defined(CONFIG_DA850_UI_SD_VIDEO_PORT)
1156
1157#define TVP5147_CH0 "tvp514x-0"
1158#define TVP5147_CH1 "tvp514x-1"
1159
1160/* VPIF capture configuration */
1161static struct tvp514x_platform_data tvp5146_pdata = {
1162 .clk_polarity = 0,
1163 .hs_polarity = 1,
1164 .vs_polarity = 1,
1165};
1166
1167#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
1168
1169static const struct vpif_input da850_ch0_inputs[] = {
1170 {
1171 .input = {
1172 .index = 0,
1173 .name = "Composite",
1174 .type = V4L2_INPUT_TYPE_CAMERA,
7aaad131 1175 .capabilities = V4L2_IN_CAP_STD,
1e046d17
MH		 1176 .std = TVP514X_STD_ALL,
1177 },
7aaad131
HV		 1178 .input_route = INPUT_CVBS_VI2B,
1179 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
1e046d17
MH		 1180 .subdev_name = TVP5147_CH0,
1181 },
1182};
1183
1184static const struct vpif_input da850_ch1_inputs[] = {
1185 {
1186 .input = {
1187 .index = 0,
1188 .name = "S-Video",
1189 .type = V4L2_INPUT_TYPE_CAMERA,
7aaad131 1190 .capabilities = V4L2_IN_CAP_STD,
1e046d17
MH		 1191 .std = TVP514X_STD_ALL,
1192 },
7aaad131
HV		 1193 .input_route = INPUT_SVIDEO_VI2C_VI1C,
1194 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
1e046d17
MH		 1195 .subdev_name = TVP5147_CH1,
1196 },
1197};
1198
1199static struct vpif_subdev_info da850_vpif_capture_sdev_info[] = {
1200 {
1201 .name = TVP5147_CH0,
1202 .board_info = {
1203 I2C_BOARD_INFO("tvp5146", 0x5d),
1204 .platform_data = &tvp5146_pdata,
1205 },
1e046d17
MH		 1206 },
1207 {
1208 .name = TVP5147_CH1,
1209 .board_info = {
1210 I2C_BOARD_INFO("tvp5146", 0x5c),
1211 .platform_data = &tvp5146_pdata,
1212 },
1e046d17
MH		 1213 },
1214};
1215
1216static struct vpif_capture_config da850_vpif_capture_config = {
1217 .subdev_info = da850_vpif_capture_sdev_info,
1218 .subdev_count = ARRAY_SIZE(da850_vpif_capture_sdev_info),
ce932a0b 1219 .i2c_adapter_id = 1,
1e046d17
MH		 1220 .chan_config[0] = {
1221 .inputs = da850_ch0_inputs,
1222 .input_count = ARRAY_SIZE(da850_ch0_inputs),
0d4f35f3
HV		 1223 .vpif_if = {
1224 .if_type = VPIF_IF_BT656,
1225 .hd_pol = 1,
1226 .vd_pol = 1,
1227 .fid_pol = 0,
1228 },
1e046d17
MH		 1229 },
1230 .chan_config[1] = {
1231 .inputs = da850_ch1_inputs,
1232 .input_count = ARRAY_SIZE(da850_ch1_inputs),
0d4f35f3
HV		 1233 .vpif_if = {
1234 .if_type = VPIF_IF_BT656,
1235 .hd_pol = 1,
1236 .vd_pol = 1,
1237 .fid_pol = 0,
1238 },
1e046d17
MH		 1239 },
1240 .card_name = "DA850/OMAP-L138 Video Capture",
1241};
1242
1243/* VPIF display configuration */
3e85a44a
LP		 1244
1245static struct adv7343_platform_data adv7343_pdata = {
1246 .mode_config = {
5e95814f 1247 .dac = { 1, 1, 1 },
3e85a44a
LP		 1248 },
1249 .sd_config = {
5e95814f 1250 .sd_dac_out = { 1 },
3e85a44a
LP		 1251 },
1252};
1253
1e046d17
MH		 1254static struct vpif_subdev_info da850_vpif_subdev[] = {
1255 {
1256 .name = "adv7343",
1257 .board_info = {
1258 I2C_BOARD_INFO("adv7343", 0x2a),
3e85a44a 1259 .platform_data = &adv7343_pdata,
1e046d17
MH		 1260 },
1261 },
1262};
1263
2bd4e58c
LP		 1264static const struct vpif_output da850_ch0_outputs[] = {
1265 {
1266 .output = {
1267 .index = 0,
1268 .name = "Composite",
1269 .type = V4L2_OUTPUT_TYPE_ANALOG,
1270 .capabilities = V4L2_OUT_CAP_STD,
1271 .std = V4L2_STD_ALL,
1272 },
1273 .subdev_name = "adv7343",
1274 .output_route = ADV7343_COMPOSITE_ID,
1275 },
1276 {
1277 .output = {
1278 .index = 1,
1279 .name = "S-Video",
1280 .type = V4L2_OUTPUT_TYPE_ANALOG,
1281 .capabilities = V4L2_OUT_CAP_STD,
1282 .std = V4L2_STD_ALL,
1283 },
1284 .subdev_name = "adv7343",
1285 .output_route = ADV7343_SVIDEO_ID,
1286 },
1e046d17
MH		 1287};
1288
1289static struct vpif_display_config da850_vpif_display_config = {
1290 .subdevinfo = da850_vpif_subdev,
1291 .subdev_count = ARRAY_SIZE(da850_vpif_subdev),
2bd4e58c
LP		 1292 .chan_config[0] = {
1293 .outputs = da850_ch0_outputs,
1294 .output_count = ARRAY_SIZE(da850_ch0_outputs),
1295 },
1e046d17 1296 .card_name = "DA850/OMAP-L138 Video Display",
a16cb91a 1297 .i2c_adapter_id = 1,
1e046d17
MH		 1298};
1299
1300static __init void da850_vpif_init(void)
1301{
1302 int ret;
1303
1304 ret = da850_register_vpif();
1305 if (ret)
1306 pr_warn("da850_evm_init: VPIF setup failed: %d\n", ret);
1307
1308 ret = davinci_cfg_reg_list(da850_vpif_capture_pins);
1309 if (ret)
1310 pr_warn("da850_evm_init: VPIF capture mux setup failed: %d\n",
1311 ret);
1312
1313 ret = da850_register_vpif_capture(&da850_vpif_capture_config);
1314 if (ret)
1315 pr_warn("da850_evm_init: VPIF capture setup failed: %d\n", ret);
1316
1317 ret = davinci_cfg_reg_list(da850_vpif_display_pins);
1318 if (ret)
1319 pr_warn("da850_evm_init: VPIF display mux setup failed: %d\n",
1320 ret);
1321
1322 ret = da850_register_vpif_display(&da850_vpif_display_config);
1323 if (ret)
1324 pr_warn("da850_evm_init: VPIF display setup failed: %d\n", ret);
1325}
1326
1327#else
1328static __init void da850_vpif_init(void) {}
1329#endif
1330
8bb2c481
SN		 1331#define DA850EVM_SATA_REFCLKPN_RATE (100 * 1000 * 1000)
1332
0fbc5592
SR		 1333static __init void da850_evm_init(void)
1334{
1335 int ret;
1336
0fcd5411
DL		 1337 ret = da8xx_register_cfgchip();
1338 if (ret)
1339 pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);
1340
b856671e
PA		 1341 ret = da850_register_gpio();
1342 if (ret)
1343 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
1344
9e9bc235
PU		 1345 regulator_register_fixed(0, fixed_supplies, ARRAY_SIZE(fixed_supplies));
1346
a9eb1f67
SN		 1347 ret = pmic_tps65070_init();
1348 if (ret)
6c7c23cc 1349 pr_warn("%s: TPS65070 PMIC init failed: %d\n", __func__, ret);
a9eb1f67 1350
a941c503 1351 ret = da850_register_edma(da850_edma_rsv);
0fbc5592 1352 if (ret)
6c7c23cc 1353 pr_warn("%s: EDMA registration failed: %d\n", __func__, ret);
0fbc5592 1354
3821d10a 1355 ret = davinci_cfg_reg_list(da850_i2c0_pins);
0fbc5592 1356 if (ret)
6c7c23cc 1357 pr_warn("%s: I2C0 mux setup failed: %d\n", __func__, ret);
0fbc5592
SR		 1358
1359 ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
1360 if (ret)
6c7c23cc 1361 pr_warn("%s: I2C0 registration failed: %d\n", __func__, ret);
0fbc5592 1362
5a4b1315 1363
0fbc5592
SR		 1364 ret = da8xx_register_watchdog();
1365 if (ret)
6c7c23cc
RT		 1366 pr_warn("%s: watchdog registration failed: %d\n",
1367 __func__, ret);
0fbc5592 1368
820c4fe3 1369 if (HAS_MMC) {
5a0d80ea 1370 ret = davinci_cfg_reg_list(da850_evm_mmcsd0_pins);
820c4fe3 1371 if (ret)
6c7c23cc
RT		 1372 pr_warn("%s: MMCSD0 mux setup failed: %d\n",
1373 __func__, ret);
820c4fe3 1374
bdf0e836 1375 gpiod_add_lookup_table(&mmc_gpios_table);
820c4fe3
SR		 1376
1377 ret = da8xx_register_mmcsd0(&da850_mmc_config);
1378 if (ret)
6c7c23cc
RT		 1379 pr_warn("%s: MMCSD0 registration failed: %d\n",
1380 __func__, ret);
820c4fe3 1381 }
700691f2 1382
fcf7157b 1383 davinci_serial_init(da8xx_serial_device);
0fbc5592 1384
1a7ff8ff
C		 1385 i2c_register_board_info(1, da850_evm_i2c_devices,
1386 ARRAY_SIZE(da850_evm_i2c_devices));
1387
0fbc5592
SR		 1388 /*
1389 * shut down uart 0 and 1; they are not used on the board and
1390 * accessing them causes endless "too much work in irq53" messages
1391 * with arago fs
1392 */
1393 __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
1394 __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
491214e1 1395
c840fc74 1396 ret = davinci_cfg_reg_list(da850_evm_mcasp_pins);
491214e1 1397 if (ret)
6c7c23cc 1398 pr_warn("%s: McASP mux setup failed: %d\n", __func__, ret);
491214e1 1399
88abfd5b 1400 da850_evm_snd_data.sram_pool = sram_get_gen_pool();
b8864aa4 1401 da8xx_register_mcasp(0, &da850_evm_snd_data);
5cbdf276 1402
3821d10a 1403 ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
5cbdf276 1404 if (ret)
6c7c23cc 1405 pr_warn("%s: LCDC mux setup failed: %d\n", __func__, ret);
5cbdf276 1406
ae41d17a
MP		 1407 ret = da8xx_register_uio_pruss();
1408 if (ret)
1409 pr_warn("da850_evm_init: pruss initialization failed: %d\n",
1410 ret);
1411
7761ef67 1412 /* Handle board specific muxing for LCD here */
3821d10a 1413 ret = davinci_cfg_reg_list(da850_evm_lcdc_pins);
7761ef67 1414 if (ret)
6c7c23cc
RT		 1415 pr_warn("%s: EVM specific LCD mux setup failed: %d\n",
1416 __func__, ret);
7761ef67 1417
5cbdf276
SR		 1418 ret = da850_lcd_hw_init();
1419 if (ret)
6c7c23cc 1420 pr_warn("%s: LCD initialization failed: %d\n", __func__, ret);
5cbdf276 1421
d52f235f 1422 sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
b9e6342b 1423 ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
5cbdf276 1424 if (ret)
6c7c23cc 1425 pr_warn("%s: LCDC registration failed: %d\n", __func__, ret);
c51df70b
MG		 1426
1427 ret = da8xx_register_rtc();
1428 if (ret)
6c7c23cc 1429 pr_warn("%s: RTC setup failed: %d\n", __func__, ret);
09dc2d45 1430
28bd2c34 1431 ret = da850_evm_init_cpufreq();
09dc2d45 1432 if (ret)
6c7c23cc 1433 pr_warn("%s: cpufreq registration failed: %d\n", __func__, ret);
5aeb15aa
SN		 1434
1435 ret = da8xx_register_cpuidle();
1436 if (ret)
6c7c23cc 1437 pr_warn("%s: cpuidle registration failed: %d\n", __func__, ret);
63534443 1438
aa9aa1ec 1439 davinci_pm_init();
1e046d17
MH		 1440 da850_vpif_init();
1441
0273612c
VD		 1442 ret = spi_register_board_info(da850evm_spi_info,
1443 ARRAY_SIZE(da850evm_spi_info));
1444 if (ret)
1445 pr_warn("%s: spi info registration failed: %d\n", __func__,
1446 ret);
1447
1448 ret = da8xx_register_spi_bus(1, ARRAY_SIZE(da850evm_spi_info));
fdce5568 1449 if (ret)
6c7c23cc 1450 pr_warn("%s: SPI 1 registration failed: %d\n", __func__, ret);
8bb2c481
SN		 1451
1452 ret = da850_register_sata(DA850EVM_SATA_REFCLKPN_RATE);
1453 if (ret)
6c7c23cc 1454 pr_warn("%s: SATA registration failed: %d\n", __func__, ret);
810198bc
RS		 1455
1456 da850_evm_setup_mac_addr();
54288134
RT		 1457
1458 ret = da8xx_register_rproc();
1459 if (ret)
1460 pr_warn("%s: dsp/rproc registration failed: %d\n",
1461 __func__, ret);
0fbc5592
SR		 1462}
1463
1464#ifdef CONFIG_SERIAL_8250_CONSOLE
1465static int __init da850_evm_console_init(void)
1466{
1aa5f2a9
MW		 1467 if (!machine_is_davinci_da850_evm())
1468 return 0;
1469
0fbc5592
SR		 1470 return add_preferred_console("ttyS", 2, "115200");
1471}
1472console_initcall(da850_evm_console_init);
1473#endif
1474
0fbc5592
SR		 1475static void __init da850_evm_map_io(void)
1476{
1477 da850_init();
1478}
1479
48ea89ea 1480MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
e7e56014 1481 .atag_offset = 0x100,
0fbc5592 1482 .map_io = da850_evm_map_io,
bd808947 1483 .init_irq = cp_intc_init,
6bb27d73 1484 .init_time = davinci_timer_init,
0fbc5592 1485 .init_machine = da850_evm_init,
3aa3e840 1486 .init_late = davinci_init_late,
f68deabf 1487 .dma_zone_size = SZ_128M,
c6121ddd 1488 .restart = da8xx_restart,
54288134 1489 .reserve = da8xx_rproc_reserve_cma,
0fbc5592 1490MACHINE_END
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