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[mirror_ubuntu-hirsute-kernel.git] / arch / arm / mach-davinci / board-da850-evm.c
CommitLineData
0fbc5592
SR		 1/*
2 * TI DA850/OMAP-L138 EVM board
3 *
4 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Derived from: arch/arm/mach-davinci/board-da830-evm.c
7 * Original Copyrights follow:
8 *
9 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 */
14#include <linux/kernel.h>
0fbc5592
SR		 15#include <linux/init.h>
16#include <linux/console.h>
17#include <linux/i2c.h>
18#include <linux/i2c/at24.h>
75e2ea64 19#include <linux/i2c/pca953x.h>
75929f5e 20#include <linux/input.h>
0bc20bba 21#include <linux/mfd/tps6507x.h>
5cbdf276 22#include <linux/gpio.h>
75929f5e 23#include <linux/gpio_keys.h>
38beb929
SR		 24#include <linux/platform_device.h>
25#include <linux/mtd/mtd.h>
26#include <linux/mtd/nand.h>
27#include <linux/mtd/partitions.h>
7c5ec609 28#include <linux/mtd/physmap.h>
a9eb1f67 29#include <linux/regulator/machine.h>
8b24599e 30#include <linux/regulator/tps6507x.h>
da1e3680 31#include <linux/input/tps6507x-ts.h>
fdce5568
SN		 32#include <linux/spi/spi.h>
33#include <linux/spi/flash.h>
ab3f5c1f
IY		 34#include <linux/delay.h>
35#include <linux/wl12xx.h>
0fbc5592
SR		 36
37#include <asm/mach-types.h>
38#include <asm/mach/arch.h>
9f97da78 39#include <asm/system_info.h>
0fbc5592 40
0fbc5592
SR		 41#include <mach/cp_intc.h>
42#include <mach/da8xx.h>
38beb929 43#include <mach/nand.h>
7761ef67 44#include <mach/mux.h>
18a8505c 45#include <mach/aemif.h>
fdce5568 46#include <mach/spi.h>
0fbc5592 47
1e046d17 48#include <media/tvp514x.h>
2bd4e58c 49#include <media/adv7343.h>
1e046d17 50
f6f97588 51#define DA850_EVM_PHY_ID "davinci_mdio-0:00"
7761ef67 52#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
5cbdf276 53#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
5cbdf276 54
700691f2
SR		 55#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
56#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
57
ab3f5c1f
IY		 58#define DA850_WLAN_EN GPIO_TO_PIN(6, 9)
59#define DA850_WLAN_IRQ GPIO_TO_PIN(6, 10)
60
2206771c
C		 61#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
62
fdce5568
SN		 63static struct mtd_partition da850evm_spiflash_part[] = {
64 [0] = {
65 .name = "UBL",
66 .offset = 0,
67 .size = SZ_64K,
68 .mask_flags = MTD_WRITEABLE,
69 },
70 [1] = {
71 .name = "U-Boot",
72 .offset = MTDPART_OFS_APPEND,
73 .size = SZ_512K,
74 .mask_flags = MTD_WRITEABLE,
75 },
76 [2] = {
77 .name = "U-Boot-Env",
78 .offset = MTDPART_OFS_APPEND,
79 .size = SZ_64K,
80 .mask_flags = MTD_WRITEABLE,
81 },
82 [3] = {
83 .name = "Kernel",
84 .offset = MTDPART_OFS_APPEND,
85 .size = SZ_2M + SZ_512K,
86 .mask_flags = 0,
87 },
88 [4] = {
89 .name = "Filesystem",
90 .offset = MTDPART_OFS_APPEND,
91 .size = SZ_4M,
92 .mask_flags = 0,
93 },
94 [5] = {
95 .name = "MAC-Address",
96 .offset = SZ_8M - SZ_64K,
97 .size = SZ_64K,
98 .mask_flags = MTD_WRITEABLE,
99 },
100};
101
102static struct flash_platform_data da850evm_spiflash_data = {
103 .name = "m25p80",
104 .parts = da850evm_spiflash_part,
105 .nr_parts = ARRAY_SIZE(da850evm_spiflash_part),
106 .type = "m25p64",
107};
108
109static struct davinci_spi_config da850evm_spiflash_cfg = {
110 .io_type = SPI_IO_TYPE_DMA,
111 .c2tdelay = 8,
112 .t2cdelay = 8,
113};
114
115static struct spi_board_info da850evm_spi_info[] = {
116 {
117 .modalias = "m25p80",
118 .platform_data = &da850evm_spiflash_data,
119 .controller_data = &da850evm_spiflash_cfg,
120 .mode = SPI_MODE_0,
121 .max_speed_hz = 30000000,
122 .bus_num = 1,
123 .chip_select = 0,
124 },
125};
126
810198bc
RS		 127#ifdef CONFIG_MTD
128static void da850_evm_m25p80_notify_add(struct mtd_info *mtd)
129{
130 char *mac_addr = davinci_soc_info.emac_pdata->mac_addr;
131 size_t retlen;
132
133 if (!strcmp(mtd->name, "MAC-Address")) {
329ad399 134 mtd_read(mtd, 0, ETH_ALEN, &retlen, mac_addr);
810198bc
RS		 135 if (retlen == ETH_ALEN)
136 pr_info("Read MAC addr from SPI Flash: %pM\n",
137 mac_addr);
138 }
139}
140
141static struct mtd_notifier da850evm_spi_notifier = {
142 .add = da850_evm_m25p80_notify_add,
143};
144
145static void da850_evm_setup_mac_addr(void)
146{
147 register_mtd_user(&da850evm_spi_notifier);
148}
149#else
150static void da850_evm_setup_mac_addr(void) { }
151#endif
152
7c5ec609
SR		 153static struct mtd_partition da850_evm_norflash_partition[] = {
154 {
e2abd5a2 155 .name = "bootloaders + env",
7c5ec609 156 .offset = 0,
e2abd5a2
SR		 157 .size = SZ_512K,
158 .mask_flags = MTD_WRITEABLE,
159 },
160 {
161 .name = "kernel",
162 .offset = MTDPART_OFS_APPEND,
163 .size = SZ_2M,
164 .mask_flags = 0,
165 },
166 {
167 .name = "filesystem",
168 .offset = MTDPART_OFS_APPEND,
7c5ec609
SR		 169 .size = MTDPART_SIZ_FULL,
170 .mask_flags = 0,
171 },
172};
173
174static struct physmap_flash_data da850_evm_norflash_data = {
175 .width = 2,
176 .parts = da850_evm_norflash_partition,
177 .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
178};
179
180static struct resource da850_evm_norflash_resource[] = {
181 {
182 .start = DA8XX_AEMIF_CS2_BASE,
183 .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
184 .flags = IORESOURCE_MEM,
185 },
186};
187
188static struct platform_device da850_evm_norflash_device = {
189 .name = "physmap-flash",
190 .id = 0,
191 .dev = {
192 .platform_data = &da850_evm_norflash_data,
193 },
194 .num_resources = 1,
195 .resource = da850_evm_norflash_resource,
196};
197
63534443
SN		 198static struct davinci_pm_config da850_pm_pdata = {
199 .sleepcount = 128,
200};
201
202static struct platform_device da850_pm_device = {
203 .name = "pm-davinci",
204 .dev = {
205 .platform_data = &da850_pm_pdata,
206 },
207 .id = -1,
208};
209
38beb929
SR		 210/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
211 * (128K blocks). It may be used instead of the (default) SPI flash
212 * to boot, using TI's tools to install the secondary boot loader
213 * (UBL) and U-Boot.
214 */
db549d22 215static struct mtd_partition da850_evm_nandflash_partition[] = {
38beb929
SR		 216 {
217 .name = "u-boot env",
218 .offset = 0,
219 .size = SZ_128K,
220 .mask_flags = MTD_WRITEABLE,
221 },
222 {
223 .name = "UBL",
224 .offset = MTDPART_OFS_APPEND,
225 .size = SZ_128K,
226 .mask_flags = MTD_WRITEABLE,
227 },
228 {
229 .name = "u-boot",
230 .offset = MTDPART_OFS_APPEND,
231 .size = 4 * SZ_128K,
232 .mask_flags = MTD_WRITEABLE,
233 },
234 {
235 .name = "kernel",
236 .offset = 0x200000,
237 .size = SZ_2M,
238 .mask_flags = 0,
239 },
240 {
241 .name = "filesystem",
242 .offset = MTDPART_OFS_APPEND,
243 .size = MTDPART_SIZ_FULL,
244 .mask_flags = 0,
245 },
246};
247
18a8505c
SN		 248static struct davinci_aemif_timing da850_evm_nandflash_timing = {
249 .wsetup = 24,
250 .wstrobe = 21,
251 .whold = 14,
252 .rsetup = 19,
253 .rstrobe = 50,
254 .rhold = 0,
255 .ta = 20,
256};
257
38beb929
SR		 258static struct davinci_nand_pdata da850_evm_nandflash_data = {
259 .parts = da850_evm_nandflash_partition,
260 .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
261 .ecc_mode = NAND_ECC_HW,
fc42e335 262 .ecc_bits = 4,
bb9ebd4e 263 .bbt_options = NAND_BBT_USE_FLASH,
18a8505c 264 .timing = &da850_evm_nandflash_timing,
38beb929
SR		 265};
266
267static struct resource da850_evm_nandflash_resource[] = {
268 {
269 .start = DA8XX_AEMIF_CS3_BASE,
270 .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
271 .flags = IORESOURCE_MEM,
272 },
273 {
274 .start = DA8XX_AEMIF_CTL_BASE,
275 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
276 .flags = IORESOURCE_MEM,
277 },
278};
279
280static struct platform_device da850_evm_nandflash_device = {
281 .name = "davinci_nand",
282 .id = 1,
283 .dev = {
284 .platform_data = &da850_evm_nandflash_data,
285 },
286 .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
287 .resource = da850_evm_nandflash_resource,
288};
289
59858b71 290static struct platform_device *da850_evm_devices[] = {
039c5ee3
SR		 291 &da850_evm_nandflash_device,
292 &da850_evm_norflash_device,
293};
294
295#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
296#define DA8XX_AEMIF_ASIZE_16BIT 0x1
297
298static void __init da850_evm_init_nor(void)
299{
300 void __iomem *aemif_addr;
301
302 aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
303
304 /* Configure data bus width of CS2 to 16 bit */
305 writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
306 DA8XX_AEMIF_ASIZE_16BIT,
307 aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
308
309 iounmap(aemif_addr);
310}
311
f48ecc2f
SS		 312static const short da850_evm_nand_pins[] = {
313 DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
314 DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
315 DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
316 DA850_NEMA_WE, DA850_NEMA_OE,
317 -1
318};
319
320static const short da850_evm_nor_pins[] = {
321 DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
322 DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1,
323 DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5,
324 DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9,
325 DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13,
326 DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1,
327 DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5,
328 DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9,
329 DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13,
330 DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17,
331 DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21,
332 DA850_EMA_A_22, DA850_EMA_A_23,
333 -1
334};
335
039c5ee3
SR		 336#if defined(CONFIG_MMC_DAVINCI) || \
337 defined(CONFIG_MMC_DAVINCI_MODULE)
338#define HAS_MMC 1
339#else
340#define HAS_MMC 0
341#endif
342
f48ecc2f 343static inline void da850_evm_setup_nor_nand(void)
039c5ee3
SR		 344{
345 int ret = 0;
346
b688c2fb 347 if (!HAS_MMC) {
f48ecc2f 348 ret = davinci_cfg_reg_list(da850_evm_nand_pins);
039c5ee3
SR		 349 if (ret)
350 pr_warning("da850_evm_init: nand mux setup failed: "
351 "%d\n", ret);
352
f48ecc2f 353 ret = davinci_cfg_reg_list(da850_evm_nor_pins);
039c5ee3
SR		 354 if (ret)
355 pr_warning("da850_evm_init: nor mux setup failed: %d\n",
356 ret);
357
358 da850_evm_init_nor();
359
360 platform_add_devices(da850_evm_devices,
361 ARRAY_SIZE(da850_evm_devices));
362 }
363}
75e2ea64 364
bae10587
SN		 365#ifdef CONFIG_DA850_UI_RMII
366static inline void da850_evm_setup_emac_rmii(int rmii_sel)
367{
368 struct davinci_soc_info *soc_info = &davinci_soc_info;
369
370 soc_info->emac_pdata->rmii_en = 1;
47e7cb14 371 gpio_set_value_cansleep(rmii_sel, 0);
bae10587
SN		 372}
373#else
374static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
375#endif
376
75929f5e
BG		 377
378#define DA850_KEYS_DEBOUNCE_MS 10
379/*
380 * At 200ms polling interval it is possible to miss an
381 * event by tapping very lightly on the push button but most
382 * pushes do result in an event; longer intervals require the
383 * user to hold the button whereas shorter intervals require
384 * more CPU time for polling.
385 */
386#define DA850_GPIO_KEYS_POLL_MS 200
387
388enum da850_evm_ui_exp_pins {
389 DA850_EVM_UI_EXP_SEL_C = 5,
390 DA850_EVM_UI_EXP_SEL_B,
391 DA850_EVM_UI_EXP_SEL_A,
392 DA850_EVM_UI_EXP_PB8,
393 DA850_EVM_UI_EXP_PB7,
394 DA850_EVM_UI_EXP_PB6,
395 DA850_EVM_UI_EXP_PB5,
396 DA850_EVM_UI_EXP_PB4,
397 DA850_EVM_UI_EXP_PB3,
398 DA850_EVM_UI_EXP_PB2,
399 DA850_EVM_UI_EXP_PB1,
400};
401
402static const char const *da850_evm_ui_exp[] = {
403 [DA850_EVM_UI_EXP_SEL_C] = "sel_c",
404 [DA850_EVM_UI_EXP_SEL_B] = "sel_b",
405 [DA850_EVM_UI_EXP_SEL_A] = "sel_a",
406 [DA850_EVM_UI_EXP_PB8] = "pb8",
407 [DA850_EVM_UI_EXP_PB7] = "pb7",
408 [DA850_EVM_UI_EXP_PB6] = "pb6",
409 [DA850_EVM_UI_EXP_PB5] = "pb5",
410 [DA850_EVM_UI_EXP_PB4] = "pb4",
411 [DA850_EVM_UI_EXP_PB3] = "pb3",
412 [DA850_EVM_UI_EXP_PB2] = "pb2",
413 [DA850_EVM_UI_EXP_PB1] = "pb1",
414};
415
416#define DA850_N_UI_PB 8
417
418static struct gpio_keys_button da850_evm_ui_keys[] = {
419 [0 ... DA850_N_UI_PB - 1] = {
420 .type = EV_KEY,
421 .active_low = 1,
422 .wakeup = 0,
423 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
424 .code = -1, /* assigned at runtime */
425 .gpio = -1, /* assigned at runtime */
426 .desc = NULL, /* assigned at runtime */
427 },
428};
429
430static struct gpio_keys_platform_data da850_evm_ui_keys_pdata = {
431 .buttons = da850_evm_ui_keys,
432 .nbuttons = ARRAY_SIZE(da850_evm_ui_keys),
433 .poll_interval = DA850_GPIO_KEYS_POLL_MS,
434};
435
436static struct platform_device da850_evm_ui_keys_device = {
437 .name = "gpio-keys-polled",
438 .id = 0,
439 .dev = {
440 .platform_data = &da850_evm_ui_keys_pdata
441 },
442};
443
444static void da850_evm_ui_keys_init(unsigned gpio)
445{
446 int i;
447 struct gpio_keys_button *button;
448
449 for (i = 0; i < DA850_N_UI_PB; i++) {
450 button = &da850_evm_ui_keys[i];
451 button->code = KEY_F8 - i;
452 button->desc = (char *)
453 da850_evm_ui_exp[DA850_EVM_UI_EXP_PB8 + i];
454 button->gpio = gpio + DA850_EVM_UI_EXP_PB8 + i;
455 }
456}
457
1e046d17
MH		 458#ifdef CONFIG_DA850_UI_SD_VIDEO_PORT
459static inline void da850_evm_setup_video_port(int video_sel)
460{
461 gpio_set_value_cansleep(video_sel, 0);
462}
463#else
464static inline void da850_evm_setup_video_port(int video_sel) { }
465#endif
466
75e2ea64
C		 467static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
468 unsigned ngpio, void *c)
469{
470 int sel_a, sel_b, sel_c, ret;
471
53c2897d
BG		 472 sel_a = gpio + DA850_EVM_UI_EXP_SEL_A;
473 sel_b = gpio + DA850_EVM_UI_EXP_SEL_B;
474 sel_c = gpio + DA850_EVM_UI_EXP_SEL_C;
75e2ea64 475
53c2897d 476 ret = gpio_request(sel_a, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_A]);
75e2ea64
C		 477 if (ret) {
478 pr_warning("Cannot open UI expander pin %d\n", sel_a);
479 goto exp_setup_sela_fail;
480 }
481
53c2897d 482 ret = gpio_request(sel_b, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_B]);
75e2ea64
C		 483 if (ret) {
484 pr_warning("Cannot open UI expander pin %d\n", sel_b);
485 goto exp_setup_selb_fail;
486 }
487
53c2897d 488 ret = gpio_request(sel_c, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_C]);
75e2ea64
C		 489 if (ret) {
490 pr_warning("Cannot open UI expander pin %d\n", sel_c);
491 goto exp_setup_selc_fail;
492 }
493
494 /* deselect all functionalities */
495 gpio_direction_output(sel_a, 1);
496 gpio_direction_output(sel_b, 1);
497 gpio_direction_output(sel_c, 1);
498
75929f5e
BG		 499 da850_evm_ui_keys_init(gpio);
500 ret = platform_device_register(&da850_evm_ui_keys_device);
501 if (ret) {
502 pr_warning("Could not register UI GPIO expander push-buttons");
503 goto exp_setup_keys_fail;
504 }
505
75e2ea64
C		 506 pr_info("DA850/OMAP-L138 EVM UI card detected\n");
507
508 da850_evm_setup_nor_nand();
509
bae10587 510 da850_evm_setup_emac_rmii(sel_a);
2206771c 511
1e046d17
MH		 512 da850_evm_setup_video_port(sel_c);
513
75e2ea64
C		 514 return 0;
515
75929f5e
BG		 516exp_setup_keys_fail:
517 gpio_free(sel_c);
75e2ea64
C		 518exp_setup_selc_fail:
519 gpio_free(sel_b);
520exp_setup_selb_fail:
521 gpio_free(sel_a);
522exp_setup_sela_fail:
523 return ret;
524}
525
526static int da850_evm_ui_expander_teardown(struct i2c_client *client,
527 unsigned gpio, unsigned ngpio, void *c)
528{
75929f5e
BG		 529 platform_device_unregister(&da850_evm_ui_keys_device);
530
75e2ea64 531 /* deselect all functionalities */
53c2897d
BG		 532 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_C, 1);
533 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_B, 1);
534 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_A, 1);
75e2ea64 535
53c2897d
BG		 536 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_C);
537 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_B);
538 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_A);
75e2ea64
C		 539
540 return 0;
541}
542
70b30939
BG		 543/* assign the baseboard expander's GPIOs after the UI board's */
544#define DA850_UI_EXPANDER_N_GPIOS ARRAY_SIZE(da850_evm_ui_exp)
545#define DA850_BB_EXPANDER_GPIO_BASE (DAVINCI_N_GPIO + DA850_UI_EXPANDER_N_GPIOS)
546
547enum da850_evm_bb_exp_pins {
548 DA850_EVM_BB_EXP_DEEP_SLEEP_EN = 0,
549 DA850_EVM_BB_EXP_SW_RST,
550 DA850_EVM_BB_EXP_TP_23,
551 DA850_EVM_BB_EXP_TP_22,
552 DA850_EVM_BB_EXP_TP_21,
553 DA850_EVM_BB_EXP_USER_PB1,
554 DA850_EVM_BB_EXP_USER_LED2,
555 DA850_EVM_BB_EXP_USER_LED1,
556 DA850_EVM_BB_EXP_USER_SW1,
557 DA850_EVM_BB_EXP_USER_SW2,
558 DA850_EVM_BB_EXP_USER_SW3,
559 DA850_EVM_BB_EXP_USER_SW4,
560 DA850_EVM_BB_EXP_USER_SW5,
561 DA850_EVM_BB_EXP_USER_SW6,
562 DA850_EVM_BB_EXP_USER_SW7,
563 DA850_EVM_BB_EXP_USER_SW8
564};
565
566static const char const *da850_evm_bb_exp[] = {
567 [DA850_EVM_BB_EXP_DEEP_SLEEP_EN] = "deep_sleep_en",
568 [DA850_EVM_BB_EXP_SW_RST] = "sw_rst",
569 [DA850_EVM_BB_EXP_TP_23] = "tp_23",
570 [DA850_EVM_BB_EXP_TP_22] = "tp_22",
571 [DA850_EVM_BB_EXP_TP_21] = "tp_21",
572 [DA850_EVM_BB_EXP_USER_PB1] = "user_pb1",
573 [DA850_EVM_BB_EXP_USER_LED2] = "user_led2",
574 [DA850_EVM_BB_EXP_USER_LED1] = "user_led1",
575 [DA850_EVM_BB_EXP_USER_SW1] = "user_sw1",
576 [DA850_EVM_BB_EXP_USER_SW2] = "user_sw2",
577 [DA850_EVM_BB_EXP_USER_SW3] = "user_sw3",
578 [DA850_EVM_BB_EXP_USER_SW4] = "user_sw4",
579 [DA850_EVM_BB_EXP_USER_SW5] = "user_sw5",
580 [DA850_EVM_BB_EXP_USER_SW6] = "user_sw6",
581 [DA850_EVM_BB_EXP_USER_SW7] = "user_sw7",
582 [DA850_EVM_BB_EXP_USER_SW8] = "user_sw8",
583};
584
585#define DA850_N_BB_USER_SW 8
586
587static struct gpio_keys_button da850_evm_bb_keys[] = {
588 [0] = {
589 .type = EV_KEY,
590 .active_low = 1,
591 .wakeup = 0,
592 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
593 .code = KEY_PROG1,
594 .desc = NULL, /* assigned at runtime */
595 .gpio = -1, /* assigned at runtime */
596 },
597 [1 ... DA850_N_BB_USER_SW] = {
598 .type = EV_SW,
599 .active_low = 1,
600 .wakeup = 0,
601 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
602 .code = -1, /* assigned at runtime */
603 .desc = NULL, /* assigned at runtime */
604 .gpio = -1, /* assigned at runtime */
605 },
606};
607
608static struct gpio_keys_platform_data da850_evm_bb_keys_pdata = {
609 .buttons = da850_evm_bb_keys,
610 .nbuttons = ARRAY_SIZE(da850_evm_bb_keys),
611 .poll_interval = DA850_GPIO_KEYS_POLL_MS,
612};
613
614static struct platform_device da850_evm_bb_keys_device = {
615 .name = "gpio-keys-polled",
616 .id = 1,
617 .dev = {
618 .platform_data = &da850_evm_bb_keys_pdata
619 },
620};
621
622static void da850_evm_bb_keys_init(unsigned gpio)
623{
624 int i;
625 struct gpio_keys_button *button;
626
627 button = &da850_evm_bb_keys[0];
628 button->desc = (char *)
629 da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_PB1];
630 button->gpio = gpio + DA850_EVM_BB_EXP_USER_PB1;
631
632 for (i = 0; i < DA850_N_BB_USER_SW; i++) {
633 button = &da850_evm_bb_keys[i + 1];
634 button->code = SW_LID + i;
635 button->desc = (char *)
636 da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_SW1 + i];
637 button->gpio = gpio + DA850_EVM_BB_EXP_USER_SW1 + i;
638 }
639}
640
641#define DA850_N_BB_USER_LED 2
642
643static struct gpio_led da850_evm_bb_leds[] = {
644 [0 ... DA850_N_BB_USER_LED - 1] = {
645 .active_low = 1,
646 .gpio = -1, /* assigned at runtime */
647 .name = NULL, /* assigned at runtime */
648 },
649};
650
651static struct gpio_led_platform_data da850_evm_bb_leds_pdata = {
652 .leds = da850_evm_bb_leds,
653 .num_leds = ARRAY_SIZE(da850_evm_bb_leds),
654};
655
656static struct platform_device da850_evm_bb_leds_device = {
657 .name = "leds-gpio",
658 .id = -1,
659 .dev = {
660 .platform_data = &da850_evm_bb_leds_pdata
661 }
662};
663
664static void da850_evm_bb_leds_init(unsigned gpio)
665{
666 int i;
667 struct gpio_led *led;
668
669 for (i = 0; i < DA850_N_BB_USER_LED; i++) {
670 led = &da850_evm_bb_leds[i];
671
672 led->gpio = gpio + DA850_EVM_BB_EXP_USER_LED2 + i;
673 led->name =
674 da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_LED2 + i];
675 }
676}
677
678static int da850_evm_bb_expander_setup(struct i2c_client *client,
679 unsigned gpio, unsigned ngpio,
680 void *c)
681{
682 int ret;
683
684 /*
685 * Register the switches and pushbutton on the baseboard as a gpio-keys
686 * device.
687 */
688 da850_evm_bb_keys_init(gpio);
689 ret = platform_device_register(&da850_evm_bb_keys_device);
690 if (ret) {
691 pr_warning("Could not register baseboard GPIO expander keys");
692 goto io_exp_setup_sw_fail;
693 }
694
695 da850_evm_bb_leds_init(gpio);
696 ret = platform_device_register(&da850_evm_bb_leds_device);
697 if (ret) {
698 pr_warning("Could not register baseboard GPIO expander LEDS");
699 goto io_exp_setup_leds_fail;
700 }
701
702 return 0;
703
704io_exp_setup_leds_fail:
705 platform_device_unregister(&da850_evm_bb_keys_device);
706io_exp_setup_sw_fail:
707 return ret;
708}
709
710static int da850_evm_bb_expander_teardown(struct i2c_client *client,
711 unsigned gpio, unsigned ngpio, void *c)
712{
713 platform_device_unregister(&da850_evm_bb_leds_device);
714 platform_device_unregister(&da850_evm_bb_keys_device);
715
716 return 0;
717}
718
75e2ea64
C		 719static struct pca953x_platform_data da850_evm_ui_expander_info = {
720 .gpio_base = DAVINCI_N_GPIO,
721 .setup = da850_evm_ui_expander_setup,
722 .teardown = da850_evm_ui_expander_teardown,
75929f5e 723 .names = da850_evm_ui_exp,
75e2ea64
C		 724};
725
70b30939
BG		 726static struct pca953x_platform_data da850_evm_bb_expander_info = {
727 .gpio_base = DA850_BB_EXPANDER_GPIO_BASE,
728 .setup = da850_evm_bb_expander_setup,
729 .teardown = da850_evm_bb_expander_teardown,
730 .names = da850_evm_bb_exp,
731};
732
1a7ff8ff
C		 733static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
734 {
735 I2C_BOARD_INFO("tlv320aic3x", 0x18),
75e2ea64
C		 736 },
737 {
738 I2C_BOARD_INFO("tca6416", 0x20),
739 .platform_data = &da850_evm_ui_expander_info,
740 },
70b30939
BG		 741 {
742 I2C_BOARD_INFO("tca6416", 0x21),
743 .platform_data = &da850_evm_bb_expander_info,
744 },
1a7ff8ff
C		 745};
746
0fbc5592
SR		 747static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
748 .bus_freq = 100, /* kHz */
749 .bus_delay = 0, /* usec */
750};
751
752static struct davinci_uart_config da850_evm_uart_config __initdata = {
753 .enabled_uarts = 0x7,
754};
755
491214e1
C		 756/* davinci da850 evm audio machine driver */
757static u8 da850_iis_serializer_direction[] = {
758 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
759 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
760 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
761 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
762};
763
764static struct snd_platform_data da850_evm_snd_data = {
765 .tx_dma_offset = 0x2000,
766 .rx_dma_offset = 0x2000,
767 .op_mode = DAVINCI_MCASP_IIS_MODE,
768 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
769 .tdm_slots = 2,
770 .serial_dir = da850_iis_serializer_direction,
f1b21c52 771 .asp_chan_q = EVENTQ_0,
491214e1
C		 772 .version = MCASP_VERSION_2,
773 .txnumevt = 1,
774 .rxnumevt = 1,
775};
776
c840fc74
MW		 777static const short da850_evm_mcasp_pins[] __initconst = {
778 DA850_AHCLKX, DA850_ACLKX, DA850_AFSX,
779 DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE,
780 DA850_AXR_11, DA850_AXR_12,
781 -1
782};
783
700691f2
SR		 784static int da850_evm_mmc_get_ro(int index)
785{
786 return gpio_get_value(DA850_MMCSD_WP_PIN);
787}
788
789static int da850_evm_mmc_get_cd(int index)
790{
791 return !gpio_get_value(DA850_MMCSD_CD_PIN);
792}
793
794static struct davinci_mmc_config da850_mmc_config = {
795 .get_ro = da850_evm_mmc_get_ro,
796 .get_cd = da850_evm_mmc_get_cd,
797 .wires = 4,
0046d0bf
C		 798 .max_freq = 50000000,
799 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
700691f2
SR		 800 .version = MMC_CTLR_VERSION_2,
801};
802
5a0d80ea
MW		 803static const short da850_evm_mmcsd0_pins[] __initconst = {
804 DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2,
805 DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD,
806 DA850_GPIO4_0, DA850_GPIO4_1,
807 -1
808};
809
d52f235f
C		 810static void da850_panel_power_ctrl(int val)
811{
812 /* lcd backlight */
813 gpio_set_value(DA850_LCD_BL_PIN, val);
814
815 /* lcd power */
816 gpio_set_value(DA850_LCD_PWR_PIN, val);
817}
818
5cbdf276
SR		 819static int da850_lcd_hw_init(void)
820{
821 int status;
822
823 status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
824 if (status < 0)
825 return status;
826
827 status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
828 if (status < 0) {
829 gpio_free(DA850_LCD_BL_PIN);
830 return status;
831 }
832
833 gpio_direction_output(DA850_LCD_BL_PIN, 0);
834 gpio_direction_output(DA850_LCD_PWR_PIN, 0);
835
d52f235f
C		 836 /* Switch off panel power and backlight */
837 da850_panel_power_ctrl(0);
5cbdf276 838
d52f235f
C		 839 /* Switch on panel power and backlight */
840 da850_panel_power_ctrl(1);
5cbdf276
SR		 841
842 return 0;
843}
491214e1 844
a9eb1f67
SN		 845/* TPS65070 voltage regulator support */
846
847/* 3.3V */
db549d22 848static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
a9eb1f67
SN		 849 {
850 .supply = "usb0_vdda33",
851 },
852 {
853 .supply = "usb1_vdda33",
854 },
855};
856
857/* 3.3V or 1.8V */
db549d22 858static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
a9eb1f67
SN		 859 {
860 .supply = "dvdd3318_a",
861 },
862 {
863 .supply = "dvdd3318_b",
864 },
865 {
866 .supply = "dvdd3318_c",
867 },
868};
869
870/* 1.2V */
db549d22 871static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
a9eb1f67
SN		 872 {
873 .supply = "cvdd",
874 },
875};
876
877/* 1.8V LDO */
db549d22 878static struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
a9eb1f67
SN		 879 {
880 .supply = "sata_vddr",
881 },
882 {
883 .supply = "usb0_vdda18",
884 },
885 {
886 .supply = "usb1_vdda18",
887 },
888 {
889 .supply = "ddr_dvdd18",
890 },
891};
892
893/* 1.2V LDO */
db549d22 894static struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
a9eb1f67
SN		 895 {
896 .supply = "sata_vdd",
897 },
898 {
899 .supply = "pll0_vdda",
900 },
901 {
902 .supply = "pll1_vdda",
903 },
904 {
905 .supply = "usbs_cvdd",
906 },
907 {
908 .supply = "vddarnwa1",
909 },
910};
911
8b24599e
SN		 912/* We take advantage of the fact that both defdcdc{2,3} are tied high */
913static struct tps6507x_reg_platform_data tps6507x_platform_data = {
914 .defdcdc_default = true,
915};
916
db549d22 917static struct regulator_init_data tps65070_regulator_data[] = {
a9eb1f67
SN		 918 /* dcdc1 */
919 {
920 .constraints = {
921 .min_uV = 3150000,
922 .max_uV = 3450000,
923 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
924 REGULATOR_CHANGE_STATUS),
925 .boot_on = 1,
926 },
927 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
928 .consumer_supplies = tps65070_dcdc1_consumers,
929 },
930
931 /* dcdc2 */
932 {
933 .constraints = {
934 .min_uV = 1710000,
935 .max_uV = 3450000,
936 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
937 REGULATOR_CHANGE_STATUS),
938 .boot_on = 1,
939 },
940 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
941 .consumer_supplies = tps65070_dcdc2_consumers,
8b24599e 942 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 943 },
944
945 /* dcdc3 */
946 {
947 .constraints = {
948 .min_uV = 950000,
28bd2c34 949 .max_uV = 1350000,
a9eb1f67
SN		 950 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
951 REGULATOR_CHANGE_STATUS),
952 .boot_on = 1,
953 },
954 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
955 .consumer_supplies = tps65070_dcdc3_consumers,
8b24599e 956 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 957 },
958
959 /* ldo1 */
960 {
961 .constraints = {
962 .min_uV = 1710000,
963 .max_uV = 1890000,
964 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
965 REGULATOR_CHANGE_STATUS),
966 .boot_on = 1,
967 },
968 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
969 .consumer_supplies = tps65070_ldo1_consumers,
970 },
971
972 /* ldo2 */
973 {
974 .constraints = {
975 .min_uV = 1140000,
976 .max_uV = 1320000,
977 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
978 REGULATOR_CHANGE_STATUS),
979 .boot_on = 1,
980 },
981 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
982 .consumer_supplies = tps65070_ldo2_consumers,
983 },
984};
985
da1e3680
TF		 986static struct touchscreen_init_data tps6507x_touchscreen_data = {
987 .poll_period = 30, /* ms between touch samples */
988 .min_pressure = 0x30, /* minimum pressure to trigger touch */
989 .vref = 0, /* turn off vref when not using A/D */
990 .vendor = 0, /* /sys/class/input/input?/id/vendor */
991 .product = 65070, /* /sys/class/input/input?/id/product */
992 .version = 0x100, /* /sys/class/input/input?/id/version */
993};
994
0bc20bba
TF		 995static struct tps6507x_board tps_board = {
996 .tps6507x_pmic_init_data = &tps65070_regulator_data[0],
da1e3680 997 .tps6507x_ts_init_data = &tps6507x_touchscreen_data,
0bc20bba
TF		 998};
999
3506f277 1000static struct i2c_board_info __initdata da850_evm_tps65070_info[] = {
a9eb1f67
SN		 1001 {
1002 I2C_BOARD_INFO("tps6507x", 0x48),
0bc20bba 1003 .platform_data = &tps_board,
a9eb1f67
SN		 1004 },
1005};
1006
1007static int __init pmic_tps65070_init(void)
1008{
3506f277
BG		 1009 return i2c_register_board_info(1, da850_evm_tps65070_info,
1010 ARRAY_SIZE(da850_evm_tps65070_info));
a9eb1f67
SN		 1011}
1012
7761ef67
SR		 1013static const short da850_evm_lcdc_pins[] = {
1014 DA850_GPIO2_8, DA850_GPIO2_15,
1015 -1
1016};
1017
85b8307f
SS		 1018static const short da850_evm_mii_pins[] = {
1019 DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
1020 DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
1021 DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
1022 DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
1023 DA850_MDIO_D,
1024 -1
1025};
1026
1027static const short da850_evm_rmii_pins[] = {
1028 DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
1029 DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
1030 DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
1031 DA850_MDIO_D,
1032 -1
1033};
1034
bae10587 1035static int __init da850_evm_config_emac(void)
2206771c
C		 1036{
1037 void __iomem *cfg_chip3_base;
1038 int ret;
1039 u32 val;
bae10587
SN		 1040 struct davinci_soc_info *soc_info = &davinci_soc_info;
1041 u8 rmii_en = soc_info->emac_pdata->rmii_en;
1042
1043 if (!machine_is_davinci_da850_evm())
1044 return 0;
2206771c 1045
d2de0582 1046 cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
2206771c 1047
2206771c 1048 val = __raw_readl(cfg_chip3_base);
17fadd9a
SN		 1049
1050 if (rmii_en) {
2206771c 1051 val |= BIT(8);
85b8307f 1052 ret = davinci_cfg_reg_list(da850_evm_rmii_pins);
17fadd9a
SN		 1053 pr_info("EMAC: RMII PHY configured, MII PHY will not be"
1054 " functional\n");
1055 } else {
2206771c 1056 val &= ~BIT(8);
85b8307f 1057 ret = davinci_cfg_reg_list(da850_evm_mii_pins);
17fadd9a
SN		 1058 pr_info("EMAC: MII PHY configured, RMII PHY will not be"
1059 " functional\n");
1060 }
1061
2206771c
C		 1062 if (ret)
1063 pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
1064 ret);
1065
17fadd9a
SN		 1066 /* configure the CFGCHIP3 register for RMII or MII */
1067 __raw_writel(val, cfg_chip3_base);
1068
2206771c
C		 1069 ret = davinci_cfg_reg(DA850_GPIO2_6);
1070 if (ret)
1071 pr_warning("da850_evm_init:GPIO(2,6) mux setup "
1072 "failed\n");
1073
1074 ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
1075 if (ret) {
1076 pr_warning("Cannot open GPIO %d\n",
1077 DA850_MII_MDIO_CLKEN_PIN);
1078 return ret;
1079 }
1080
17fadd9a
SN		 1081 /* Enable/Disable MII MDIO clock */
1082 gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
2206771c 1083
782f2d78 1084 soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID;
bae10587
SN		 1085
1086 ret = da8xx_register_emac();
1087 if (ret)
1088 pr_warning("da850_evm_init: emac registration failed: %d\n",
1089 ret);
1090
2206771c
C		 1091 return 0;
1092}
bae10587 1093device_initcall(da850_evm_config_emac);
2206771c 1094
a941c503
RS		 1095/*
1096 * The following EDMA channels/slots are not being used by drivers (for
1097 * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence
1098 * they are being reserved for codecs on the DSP side.
1099 */
1100static const s16 da850_dma0_rsv_chans[][2] = {
1101 /* (offset, number) */
1102 { 8, 6},
1103 {24, 4},
1104 {30, 2},
1105 {-1, -1}
1106};
1107
1108static const s16 da850_dma0_rsv_slots[][2] = {
1109 /* (offset, number) */
1110 { 8, 6},
1111 {24, 4},
1112 {30, 50},
1113 {-1, -1}
1114};
1115
1116static const s16 da850_dma1_rsv_chans[][2] = {
1117 /* (offset, number) */
1118 { 0, 28},
1119 {30, 2},
1120 {-1, -1}
1121};
1122
1123static const s16 da850_dma1_rsv_slots[][2] = {
1124 /* (offset, number) */
1125 { 0, 28},
1126 {30, 90},
1127 {-1, -1}
1128};
1129
1130static struct edma_rsv_info da850_edma_cc0_rsv = {
1131 .rsv_chans = da850_dma0_rsv_chans,
1132 .rsv_slots = da850_dma0_rsv_slots,
1133};
1134
1135static struct edma_rsv_info da850_edma_cc1_rsv = {
1136 .rsv_chans = da850_dma1_rsv_chans,
1137 .rsv_slots = da850_dma1_rsv_slots,
1138};
1139
1140static struct edma_rsv_info *da850_edma_rsv[2] = {
1141 &da850_edma_cc0_rsv,
1142 &da850_edma_cc1_rsv,
1143};
1144
28bd2c34
SN		 1145#ifdef CONFIG_CPU_FREQ
1146static __init int da850_evm_init_cpufreq(void)
1147{
1148 switch (system_rev & 0xF) {
1149 case 3:
1150 da850_max_speed = 456000;
1151 break;
1152 case 2:
1153 da850_max_speed = 408000;
1154 break;
1155 case 1:
1156 da850_max_speed = 372000;
1157 break;
1158 }
1159
1160 return da850_register_cpufreq("pll0_sysclk3");
1161}
1162#else
1163static __init int da850_evm_init_cpufreq(void) { return 0; }
1164#endif
1165
1e046d17
MH		 1166#if defined(CONFIG_DA850_UI_SD_VIDEO_PORT)
1167
1168#define TVP5147_CH0 "tvp514x-0"
1169#define TVP5147_CH1 "tvp514x-1"
1170
1171/* VPIF capture configuration */
1172static struct tvp514x_platform_data tvp5146_pdata = {
1173 .clk_polarity = 0,
1174 .hs_polarity = 1,
1175 .vs_polarity = 1,
1176};
1177
1178#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
1179
1180static const struct vpif_input da850_ch0_inputs[] = {
1181 {
1182 .input = {
1183 .index = 0,
1184 .name = "Composite",
1185 .type = V4L2_INPUT_TYPE_CAMERA,
7aaad131 1186 .capabilities = V4L2_IN_CAP_STD,
1e046d17
MH		 1187 .std = TVP514X_STD_ALL,
1188 },
7aaad131
HV		 1189 .input_route = INPUT_CVBS_VI2B,
1190 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
1e046d17
MH		 1191 .subdev_name = TVP5147_CH0,
1192 },
1193};
1194
1195static const struct vpif_input da850_ch1_inputs[] = {
1196 {
1197 .input = {
1198 .index = 0,
1199 .name = "S-Video",
1200 .type = V4L2_INPUT_TYPE_CAMERA,
7aaad131 1201 .capabilities = V4L2_IN_CAP_STD,
1e046d17
MH		 1202 .std = TVP514X_STD_ALL,
1203 },
7aaad131
HV		 1204 .input_route = INPUT_SVIDEO_VI2C_VI1C,
1205 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
1e046d17
MH		 1206 .subdev_name = TVP5147_CH1,
1207 },
1208};
1209
1210static struct vpif_subdev_info da850_vpif_capture_sdev_info[] = {
1211 {
1212 .name = TVP5147_CH0,
1213 .board_info = {
1214 I2C_BOARD_INFO("tvp5146", 0x5d),
1215 .platform_data = &tvp5146_pdata,
1216 },
1e046d17
MH		 1217 },
1218 {
1219 .name = TVP5147_CH1,
1220 .board_info = {
1221 I2C_BOARD_INFO("tvp5146", 0x5c),
1222 .platform_data = &tvp5146_pdata,
1223 },
1e046d17
MH		 1224 },
1225};
1226
1227static struct vpif_capture_config da850_vpif_capture_config = {
1228 .subdev_info = da850_vpif_capture_sdev_info,
1229 .subdev_count = ARRAY_SIZE(da850_vpif_capture_sdev_info),
1230 .chan_config[0] = {
1231 .inputs = da850_ch0_inputs,
1232 .input_count = ARRAY_SIZE(da850_ch0_inputs),
0d4f35f3
HV		 1233 .vpif_if = {
1234 .if_type = VPIF_IF_BT656,
1235 .hd_pol = 1,
1236 .vd_pol = 1,
1237 .fid_pol = 0,
1238 },
1e046d17
MH		 1239 },
1240 .chan_config[1] = {
1241 .inputs = da850_ch1_inputs,
1242 .input_count = ARRAY_SIZE(da850_ch1_inputs),
0d4f35f3
HV		 1243 .vpif_if = {
1244 .if_type = VPIF_IF_BT656,
1245 .hd_pol = 1,
1246 .vd_pol = 1,
1247 .fid_pol = 0,
1248 },
1e046d17
MH		 1249 },
1250 .card_name = "DA850/OMAP-L138 Video Capture",
1251};
1252
1253/* VPIF display configuration */
1254static struct vpif_subdev_info da850_vpif_subdev[] = {
1255 {
1256 .name = "adv7343",
1257 .board_info = {
1258 I2C_BOARD_INFO("adv7343", 0x2a),
1259 },
1260 },
1261};
1262
2bd4e58c
LP		 1263static const struct vpif_output da850_ch0_outputs[] = {
1264 {
1265 .output = {
1266 .index = 0,
1267 .name = "Composite",
1268 .type = V4L2_OUTPUT_TYPE_ANALOG,
1269 .capabilities = V4L2_OUT_CAP_STD,
1270 .std = V4L2_STD_ALL,
1271 },
1272 .subdev_name = "adv7343",
1273 .output_route = ADV7343_COMPOSITE_ID,
1274 },
1275 {
1276 .output = {
1277 .index = 1,
1278 .name = "S-Video",
1279 .type = V4L2_OUTPUT_TYPE_ANALOG,
1280 .capabilities = V4L2_OUT_CAP_STD,
1281 .std = V4L2_STD_ALL,
1282 },
1283 .subdev_name = "adv7343",
1284 .output_route = ADV7343_SVIDEO_ID,
1285 },
1e046d17
MH		 1286};
1287
1288static struct vpif_display_config da850_vpif_display_config = {
1289 .subdevinfo = da850_vpif_subdev,
1290 .subdev_count = ARRAY_SIZE(da850_vpif_subdev),
2bd4e58c
LP		 1291 .chan_config[0] = {
1292 .outputs = da850_ch0_outputs,
1293 .output_count = ARRAY_SIZE(da850_ch0_outputs),
1294 },
1e046d17
MH		 1295 .card_name = "DA850/OMAP-L138 Video Display",
1296};
1297
1298static __init void da850_vpif_init(void)
1299{
1300 int ret;
1301
1302 ret = da850_register_vpif();
1303 if (ret)
1304 pr_warn("da850_evm_init: VPIF setup failed: %d\n", ret);
1305
1306 ret = davinci_cfg_reg_list(da850_vpif_capture_pins);
1307 if (ret)
1308 pr_warn("da850_evm_init: VPIF capture mux setup failed: %d\n",
1309 ret);
1310
1311 ret = da850_register_vpif_capture(&da850_vpif_capture_config);
1312 if (ret)
1313 pr_warn("da850_evm_init: VPIF capture setup failed: %d\n", ret);
1314
1315 ret = davinci_cfg_reg_list(da850_vpif_display_pins);
1316 if (ret)
1317 pr_warn("da850_evm_init: VPIF display mux setup failed: %d\n",
1318 ret);
1319
1320 ret = da850_register_vpif_display(&da850_vpif_display_config);
1321 if (ret)
1322 pr_warn("da850_evm_init: VPIF display setup failed: %d\n", ret);
1323}
1324
1325#else
1326static __init void da850_vpif_init(void) {}
1327#endif
1328
ab3f5c1f
IY		 1329#ifdef CONFIG_DA850_WL12XX
1330
1331static void wl12xx_set_power(int index, bool power_on)
1332{
1333 static bool power_state;
1334
1335 pr_debug("Powering %s wl12xx", power_on ? "on" : "off");
1336
1337 if (power_on == power_state)
1338 return;
1339 power_state = power_on;
1340
1341 if (power_on) {
1342 /* Power up sequence required for wl127x devices */
1343 gpio_set_value(DA850_WLAN_EN, 1);
1344 usleep_range(15000, 15000);
1345 gpio_set_value(DA850_WLAN_EN, 0);
1346 usleep_range(1000, 1000);
1347 gpio_set_value(DA850_WLAN_EN, 1);
1348 msleep(70);
1349 } else {
1350 gpio_set_value(DA850_WLAN_EN, 0);
1351 }
1352}
1353
1354static struct davinci_mmc_config da850_wl12xx_mmc_config = {
1355 .set_power = wl12xx_set_power,
1356 .wires = 4,
1357 .max_freq = 25000000,
1358 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_NONREMOVABLE |
1359 MMC_CAP_POWER_OFF_CARD,
1360 .version = MMC_CTLR_VERSION_2,
1361};
1362
1363static const short da850_wl12xx_pins[] __initconst = {
1364 DA850_MMCSD1_DAT_0, DA850_MMCSD1_DAT_1, DA850_MMCSD1_DAT_2,
1365 DA850_MMCSD1_DAT_3, DA850_MMCSD1_CLK, DA850_MMCSD1_CMD,
1366 DA850_GPIO6_9, DA850_GPIO6_10,
1367 -1
1368};
1369
1370static struct wl12xx_platform_data da850_wl12xx_wlan_data __initdata = {
1371 .irq = -1,
1372 .board_ref_clock = WL12XX_REFCLOCK_38,
1373 .platform_quirks = WL12XX_PLATFORM_QUIRK_EDGE_IRQ,
1374};
1375
1376static __init int da850_wl12xx_init(void)
1377{
1378 int ret;
1379
1380 ret = davinci_cfg_reg_list(da850_wl12xx_pins);
1381 if (ret) {
1382 pr_err("wl12xx/mmc mux setup failed: %d\n", ret);
1383 goto exit;
1384 }
1385
1386 ret = da850_register_mmcsd1(&da850_wl12xx_mmc_config);
1387 if (ret) {
1388 pr_err("wl12xx/mmc registration failed: %d\n", ret);
1389 goto exit;
1390 }
1391
1392 ret = gpio_request_one(DA850_WLAN_EN, GPIOF_OUT_INIT_LOW, "wl12xx_en");
1393 if (ret) {
1394 pr_err("Could not request wl12xx enable gpio: %d\n", ret);
1395 goto exit;
1396 }
1397
1398 ret = gpio_request_one(DA850_WLAN_IRQ, GPIOF_IN, "wl12xx_irq");
1399 if (ret) {
1400 pr_err("Could not request wl12xx irq gpio: %d\n", ret);
1401 goto free_wlan_en;
1402 }
1403
1404 da850_wl12xx_wlan_data.irq = gpio_to_irq(DA850_WLAN_IRQ);
1405
1406 ret = wl12xx_set_platform_data(&da850_wl12xx_wlan_data);
1407 if (ret) {
1408 pr_err("Could not set wl12xx data: %d\n", ret);
1409 goto free_wlan_irq;
1410 }
1411
1412 return 0;
1413
1414free_wlan_irq:
1415 gpio_free(DA850_WLAN_IRQ);
1416
1417free_wlan_en:
1418 gpio_free(DA850_WLAN_EN);
1419
1420exit:
1421 return ret;
1422}
1423
1424#else /* CONFIG_DA850_WL12XX */
1425
1426static __init int da850_wl12xx_init(void)
1427{
1428 return 0;
1429}
1430
1431#endif /* CONFIG_DA850_WL12XX */
1432
8bb2c481
SN		 1433#define DA850EVM_SATA_REFCLKPN_RATE (100 * 1000 * 1000)
1434
0fbc5592
SR		 1435static __init void da850_evm_init(void)
1436{
1437 int ret;
1438
a9eb1f67
SN		 1439 ret = pmic_tps65070_init();
1440 if (ret)
1441 pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
1442 ret);
1443
a941c503 1444 ret = da850_register_edma(da850_edma_rsv);
0fbc5592
SR		 1445 if (ret)
1446 pr_warning("da850_evm_init: edma registration failed: %d\n",
1447 ret);
1448
3821d10a 1449 ret = davinci_cfg_reg_list(da850_i2c0_pins);
0fbc5592
SR		 1450 if (ret)
1451 pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
1452 ret);
1453
1454 ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
1455 if (ret)
1456 pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
1457 ret);
1458
5a4b1315 1459
0fbc5592
SR		 1460 ret = da8xx_register_watchdog();
1461 if (ret)
1462 pr_warning("da830_evm_init: watchdog registration failed: %d\n",
1463 ret);
1464
820c4fe3 1465 if (HAS_MMC) {
5a0d80ea 1466 ret = davinci_cfg_reg_list(da850_evm_mmcsd0_pins);
820c4fe3
SR		 1467 if (ret)
1468 pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
1469 " %d\n", ret);
1470
1471 ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
1472 if (ret)
1473 pr_warning("da850_evm_init: can not open GPIO %d\n",
1474 DA850_MMCSD_CD_PIN);
1475 gpio_direction_input(DA850_MMCSD_CD_PIN);
1476
1477 ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
1478 if (ret)
1479 pr_warning("da850_evm_init: can not open GPIO %d\n",
1480 DA850_MMCSD_WP_PIN);
1481 gpio_direction_input(DA850_MMCSD_WP_PIN);
1482
1483 ret = da8xx_register_mmcsd0(&da850_mmc_config);
1484 if (ret)
1485 pr_warning("da850_evm_init: mmcsd0 registration failed:"
1486 " %d\n", ret);
ab3f5c1f
IY		 1487
1488 ret = da850_wl12xx_init();
1489 if (ret)
1490 pr_warning("da850_evm_init: wl12xx initialization"
1491 " failed: %d\n", ret);
820c4fe3 1492 }
700691f2 1493
0fbc5592
SR		 1494 davinci_serial_init(&da850_evm_uart_config);
1495
1a7ff8ff
C		 1496 i2c_register_board_info(1, da850_evm_i2c_devices,
1497 ARRAY_SIZE(da850_evm_i2c_devices));
1498
0fbc5592
SR		 1499 /*
1500 * shut down uart 0 and 1; they are not used on the board and
1501 * accessing them causes endless "too much work in irq53" messages
1502 * with arago fs
1503 */
1504 __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
1505 __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
491214e1 1506
c840fc74 1507 ret = davinci_cfg_reg_list(da850_evm_mcasp_pins);
491214e1
C		 1508 if (ret)
1509 pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
1510 ret);
1511
b8864aa4 1512 da8xx_register_mcasp(0, &da850_evm_snd_data);
5cbdf276 1513
3821d10a 1514 ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
5cbdf276
SR		 1515 if (ret)
1516 pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
1517 ret);
1518
7761ef67 1519 /* Handle board specific muxing for LCD here */
3821d10a 1520 ret = davinci_cfg_reg_list(da850_evm_lcdc_pins);
7761ef67
SR		 1521 if (ret)
1522 pr_warning("da850_evm_init: evm specific lcd mux setup "
1523 "failed: %d\n", ret);
1524
5cbdf276
SR		 1525 ret = da850_lcd_hw_init();
1526 if (ret)
1527 pr_warning("da850_evm_init: lcd initialization failed: %d\n",
1528 ret);
1529
d52f235f 1530 sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
b9e6342b 1531 ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
5cbdf276
SR		 1532 if (ret)
1533 pr_warning("da850_evm_init: lcdc registration failed: %d\n",
1534 ret);
c51df70b
MG		 1535
1536 ret = da8xx_register_rtc();
1537 if (ret)
1538 pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
09dc2d45 1539
28bd2c34 1540 ret = da850_evm_init_cpufreq();
09dc2d45
SN		 1541 if (ret)
1542 pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
1543 ret);
5aeb15aa
SN		 1544
1545 ret = da8xx_register_cpuidle();
1546 if (ret)
1547 pr_warning("da850_evm_init: cpuidle registration failed: %d\n",
1548 ret);
63534443
SN		 1549
1550 ret = da850_register_pm(&da850_pm_device);
1551 if (ret)
1552 pr_warning("da850_evm_init: suspend registration failed: %d\n",
1553 ret);
fdce5568 1554
1e046d17
MH		 1555 da850_vpif_init();
1556
fdce5568
SN		 1557 ret = da8xx_register_spi(1, da850evm_spi_info,
1558 ARRAY_SIZE(da850evm_spi_info));
1559 if (ret)
1560 pr_warning("da850_evm_init: spi 1 registration failed: %d\n",
1561 ret);
8bb2c481
SN		 1562
1563 ret = da850_register_sata(DA850EVM_SATA_REFCLKPN_RATE);
1564 if (ret)
1565 pr_warning("da850_evm_init: sata registration failed: %d\n",
1566 ret);
810198bc
RS		 1567
1568 da850_evm_setup_mac_addr();
0fbc5592
SR		 1569}
1570
1571#ifdef CONFIG_SERIAL_8250_CONSOLE
1572static int __init da850_evm_console_init(void)
1573{
1aa5f2a9
MW		 1574 if (!machine_is_davinci_da850_evm())
1575 return 0;
1576
0fbc5592
SR		 1577 return add_preferred_console("ttyS", 2, "115200");
1578}
1579console_initcall(da850_evm_console_init);
1580#endif
1581
0fbc5592
SR		 1582static void __init da850_evm_map_io(void)
1583{
1584 da850_init();
1585}
1586
48ea89ea 1587MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
e7e56014 1588 .atag_offset = 0x100,
0fbc5592 1589 .map_io = da850_evm_map_io,
bd808947 1590 .init_irq = cp_intc_init,
0fbc5592
SR		 1591 .timer = &davinci_timer,
1592 .init_machine = da850_evm_init,
3aa3e840 1593 .init_late = davinci_init_late,
f68deabf 1594 .dma_zone_size = SZ_128M,
c6121ddd 1595 .restart = da8xx_restart,
0fbc5592 1596MACHINE_END
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