]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/blame - arch/arm/mach-davinci/board-da850-evm.c
projects / mirror_ubuntu-hirsute-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ARM: provide a late_initcall hook for platform initialization
[mirror_ubuntu-hirsute-kernel.git] / arch / arm / mach-davinci / board-da850-evm.c
CommitLineData
0fbc5592
SR		 1/*
2 * TI DA850/OMAP-L138 EVM board
3 *
4 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Derived from: arch/arm/mach-davinci/board-da830-evm.c
7 * Original Copyrights follow:
8 *
9 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 */
14#include <linux/kernel.h>
0fbc5592
SR		 15#include <linux/init.h>
16#include <linux/console.h>
17#include <linux/i2c.h>
18#include <linux/i2c/at24.h>
75e2ea64 19#include <linux/i2c/pca953x.h>
75929f5e 20#include <linux/input.h>
0bc20bba 21#include <linux/mfd/tps6507x.h>
5cbdf276 22#include <linux/gpio.h>
75929f5e 23#include <linux/gpio_keys.h>
38beb929
SR		 24#include <linux/platform_device.h>
25#include <linux/mtd/mtd.h>
26#include <linux/mtd/nand.h>
27#include <linux/mtd/partitions.h>
7c5ec609 28#include <linux/mtd/physmap.h>
a9eb1f67 29#include <linux/regulator/machine.h>
8b24599e 30#include <linux/regulator/tps6507x.h>
da1e3680 31#include <linux/input/tps6507x-ts.h>
fdce5568
SN		 32#include <linux/spi/spi.h>
33#include <linux/spi/flash.h>
ab3f5c1f
IY		 34#include <linux/delay.h>
35#include <linux/wl12xx.h>
0fbc5592
SR		 36
37#include <asm/mach-types.h>
38#include <asm/mach/arch.h>
9f97da78 39#include <asm/system_info.h>
0fbc5592 40
0fbc5592
SR		 41#include <mach/cp_intc.h>
42#include <mach/da8xx.h>
38beb929 43#include <mach/nand.h>
7761ef67 44#include <mach/mux.h>
18a8505c 45#include <mach/aemif.h>
fdce5568 46#include <mach/spi.h>
0fbc5592 47
f6f97588 48#define DA850_EVM_PHY_ID "davinci_mdio-0:00"
7761ef67 49#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
5cbdf276 50#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
5cbdf276 51
700691f2
SR		 52#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
53#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
54
ab3f5c1f
IY		 55#define DA850_WLAN_EN GPIO_TO_PIN(6, 9)
56#define DA850_WLAN_IRQ GPIO_TO_PIN(6, 10)
57
2206771c
C		 58#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
59
fdce5568
SN		 60static struct mtd_partition da850evm_spiflash_part[] = {
61 [0] = {
62 .name = "UBL",
63 .offset = 0,
64 .size = SZ_64K,
65 .mask_flags = MTD_WRITEABLE,
66 },
67 [1] = {
68 .name = "U-Boot",
69 .offset = MTDPART_OFS_APPEND,
70 .size = SZ_512K,
71 .mask_flags = MTD_WRITEABLE,
72 },
73 [2] = {
74 .name = "U-Boot-Env",
75 .offset = MTDPART_OFS_APPEND,
76 .size = SZ_64K,
77 .mask_flags = MTD_WRITEABLE,
78 },
79 [3] = {
80 .name = "Kernel",
81 .offset = MTDPART_OFS_APPEND,
82 .size = SZ_2M + SZ_512K,
83 .mask_flags = 0,
84 },
85 [4] = {
86 .name = "Filesystem",
87 .offset = MTDPART_OFS_APPEND,
88 .size = SZ_4M,
89 .mask_flags = 0,
90 },
91 [5] = {
92 .name = "MAC-Address",
93 .offset = SZ_8M - SZ_64K,
94 .size = SZ_64K,
95 .mask_flags = MTD_WRITEABLE,
96 },
97};
98
99static struct flash_platform_data da850evm_spiflash_data = {
100 .name = "m25p80",
101 .parts = da850evm_spiflash_part,
102 .nr_parts = ARRAY_SIZE(da850evm_spiflash_part),
103 .type = "m25p64",
104};
105
106static struct davinci_spi_config da850evm_spiflash_cfg = {
107 .io_type = SPI_IO_TYPE_DMA,
108 .c2tdelay = 8,
109 .t2cdelay = 8,
110};
111
112static struct spi_board_info da850evm_spi_info[] = {
113 {
114 .modalias = "m25p80",
115 .platform_data = &da850evm_spiflash_data,
116 .controller_data = &da850evm_spiflash_cfg,
117 .mode = SPI_MODE_0,
118 .max_speed_hz = 30000000,
119 .bus_num = 1,
120 .chip_select = 0,
121 },
122};
123
810198bc
RS		 124#ifdef CONFIG_MTD
125static void da850_evm_m25p80_notify_add(struct mtd_info *mtd)
126{
127 char *mac_addr = davinci_soc_info.emac_pdata->mac_addr;
128 size_t retlen;
129
130 if (!strcmp(mtd->name, "MAC-Address")) {
329ad399 131 mtd_read(mtd, 0, ETH_ALEN, &retlen, mac_addr);
810198bc
RS		 132 if (retlen == ETH_ALEN)
133 pr_info("Read MAC addr from SPI Flash: %pM\n",
134 mac_addr);
135 }
136}
137
138static struct mtd_notifier da850evm_spi_notifier = {
139 .add = da850_evm_m25p80_notify_add,
140};
141
142static void da850_evm_setup_mac_addr(void)
143{
144 register_mtd_user(&da850evm_spi_notifier);
145}
146#else
147static void da850_evm_setup_mac_addr(void) { }
148#endif
149
7c5ec609
SR		 150static struct mtd_partition da850_evm_norflash_partition[] = {
151 {
e2abd5a2 152 .name = "bootloaders + env",
7c5ec609 153 .offset = 0,
e2abd5a2
SR		 154 .size = SZ_512K,
155 .mask_flags = MTD_WRITEABLE,
156 },
157 {
158 .name = "kernel",
159 .offset = MTDPART_OFS_APPEND,
160 .size = SZ_2M,
161 .mask_flags = 0,
162 },
163 {
164 .name = "filesystem",
165 .offset = MTDPART_OFS_APPEND,
7c5ec609
SR		 166 .size = MTDPART_SIZ_FULL,
167 .mask_flags = 0,
168 },
169};
170
171static struct physmap_flash_data da850_evm_norflash_data = {
172 .width = 2,
173 .parts = da850_evm_norflash_partition,
174 .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
175};
176
177static struct resource da850_evm_norflash_resource[] = {
178 {
179 .start = DA8XX_AEMIF_CS2_BASE,
180 .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
181 .flags = IORESOURCE_MEM,
182 },
183};
184
185static struct platform_device da850_evm_norflash_device = {
186 .name = "physmap-flash",
187 .id = 0,
188 .dev = {
189 .platform_data = &da850_evm_norflash_data,
190 },
191 .num_resources = 1,
192 .resource = da850_evm_norflash_resource,
193};
194
63534443
SN		 195static struct davinci_pm_config da850_pm_pdata = {
196 .sleepcount = 128,
197};
198
199static struct platform_device da850_pm_device = {
200 .name = "pm-davinci",
201 .dev = {
202 .platform_data = &da850_pm_pdata,
203 },
204 .id = -1,
205};
206
38beb929
SR		 207/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
208 * (128K blocks). It may be used instead of the (default) SPI flash
209 * to boot, using TI's tools to install the secondary boot loader
210 * (UBL) and U-Boot.
211 */
db549d22 212static struct mtd_partition da850_evm_nandflash_partition[] = {
38beb929
SR		 213 {
214 .name = "u-boot env",
215 .offset = 0,
216 .size = SZ_128K,
217 .mask_flags = MTD_WRITEABLE,
218 },
219 {
220 .name = "UBL",
221 .offset = MTDPART_OFS_APPEND,
222 .size = SZ_128K,
223 .mask_flags = MTD_WRITEABLE,
224 },
225 {
226 .name = "u-boot",
227 .offset = MTDPART_OFS_APPEND,
228 .size = 4 * SZ_128K,
229 .mask_flags = MTD_WRITEABLE,
230 },
231 {
232 .name = "kernel",
233 .offset = 0x200000,
234 .size = SZ_2M,
235 .mask_flags = 0,
236 },
237 {
238 .name = "filesystem",
239 .offset = MTDPART_OFS_APPEND,
240 .size = MTDPART_SIZ_FULL,
241 .mask_flags = 0,
242 },
243};
244
18a8505c
SN		 245static struct davinci_aemif_timing da850_evm_nandflash_timing = {
246 .wsetup = 24,
247 .wstrobe = 21,
248 .whold = 14,
249 .rsetup = 19,
250 .rstrobe = 50,
251 .rhold = 0,
252 .ta = 20,
253};
254
38beb929
SR		 255static struct davinci_nand_pdata da850_evm_nandflash_data = {
256 .parts = da850_evm_nandflash_partition,
257 .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
258 .ecc_mode = NAND_ECC_HW,
fc42e335 259 .ecc_bits = 4,
bb9ebd4e 260 .bbt_options = NAND_BBT_USE_FLASH,
18a8505c 261 .timing = &da850_evm_nandflash_timing,
38beb929
SR		 262};
263
264static struct resource da850_evm_nandflash_resource[] = {
265 {
266 .start = DA8XX_AEMIF_CS3_BASE,
267 .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
268 .flags = IORESOURCE_MEM,
269 },
270 {
271 .start = DA8XX_AEMIF_CTL_BASE,
272 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
273 .flags = IORESOURCE_MEM,
274 },
275};
276
277static struct platform_device da850_evm_nandflash_device = {
278 .name = "davinci_nand",
279 .id = 1,
280 .dev = {
281 .platform_data = &da850_evm_nandflash_data,
282 },
283 .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
284 .resource = da850_evm_nandflash_resource,
285};
286
039c5ee3
SR		 287static struct platform_device *da850_evm_devices[] __initdata = {
288 &da850_evm_nandflash_device,
289 &da850_evm_norflash_device,
290};
291
292#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
293#define DA8XX_AEMIF_ASIZE_16BIT 0x1
294
295static void __init da850_evm_init_nor(void)
296{
297 void __iomem *aemif_addr;
298
299 aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
300
301 /* Configure data bus width of CS2 to 16 bit */
302 writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
303 DA8XX_AEMIF_ASIZE_16BIT,
304 aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
305
306 iounmap(aemif_addr);
307}
308
f48ecc2f
SS		 309static const short da850_evm_nand_pins[] = {
310 DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
311 DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
312 DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
313 DA850_NEMA_WE, DA850_NEMA_OE,
314 -1
315};
316
317static const short da850_evm_nor_pins[] = {
318 DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
319 DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1,
320 DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5,
321 DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9,
322 DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13,
323 DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1,
324 DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5,
325 DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9,
326 DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13,
327 DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17,
328 DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21,
329 DA850_EMA_A_22, DA850_EMA_A_23,
330 -1
331};
332
039c5ee3
SR		 333#if defined(CONFIG_MMC_DAVINCI) || \
334 defined(CONFIG_MMC_DAVINCI_MODULE)
335#define HAS_MMC 1
336#else
337#define HAS_MMC 0
338#endif
339
f48ecc2f 340static inline void da850_evm_setup_nor_nand(void)
039c5ee3
SR		 341{
342 int ret = 0;
343
b688c2fb 344 if (!HAS_MMC) {
f48ecc2f 345 ret = davinci_cfg_reg_list(da850_evm_nand_pins);
039c5ee3
SR		 346 if (ret)
347 pr_warning("da850_evm_init: nand mux setup failed: "
348 "%d\n", ret);
349
f48ecc2f 350 ret = davinci_cfg_reg_list(da850_evm_nor_pins);
039c5ee3
SR		 351 if (ret)
352 pr_warning("da850_evm_init: nor mux setup failed: %d\n",
353 ret);
354
355 da850_evm_init_nor();
356
357 platform_add_devices(da850_evm_devices,
358 ARRAY_SIZE(da850_evm_devices));
359 }
360}
75e2ea64 361
bae10587
SN		 362#ifdef CONFIG_DA850_UI_RMII
363static inline void da850_evm_setup_emac_rmii(int rmii_sel)
364{
365 struct davinci_soc_info *soc_info = &davinci_soc_info;
366
367 soc_info->emac_pdata->rmii_en = 1;
47e7cb14 368 gpio_set_value_cansleep(rmii_sel, 0);
bae10587
SN		 369}
370#else
371static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
372#endif
373
75929f5e
BG		 374
375#define DA850_KEYS_DEBOUNCE_MS 10
376/*
377 * At 200ms polling interval it is possible to miss an
378 * event by tapping very lightly on the push button but most
379 * pushes do result in an event; longer intervals require the
380 * user to hold the button whereas shorter intervals require
381 * more CPU time for polling.
382 */
383#define DA850_GPIO_KEYS_POLL_MS 200
384
385enum da850_evm_ui_exp_pins {
386 DA850_EVM_UI_EXP_SEL_C = 5,
387 DA850_EVM_UI_EXP_SEL_B,
388 DA850_EVM_UI_EXP_SEL_A,
389 DA850_EVM_UI_EXP_PB8,
390 DA850_EVM_UI_EXP_PB7,
391 DA850_EVM_UI_EXP_PB6,
392 DA850_EVM_UI_EXP_PB5,
393 DA850_EVM_UI_EXP_PB4,
394 DA850_EVM_UI_EXP_PB3,
395 DA850_EVM_UI_EXP_PB2,
396 DA850_EVM_UI_EXP_PB1,
397};
398
399static const char const *da850_evm_ui_exp[] = {
400 [DA850_EVM_UI_EXP_SEL_C] = "sel_c",
401 [DA850_EVM_UI_EXP_SEL_B] = "sel_b",
402 [DA850_EVM_UI_EXP_SEL_A] = "sel_a",
403 [DA850_EVM_UI_EXP_PB8] = "pb8",
404 [DA850_EVM_UI_EXP_PB7] = "pb7",
405 [DA850_EVM_UI_EXP_PB6] = "pb6",
406 [DA850_EVM_UI_EXP_PB5] = "pb5",
407 [DA850_EVM_UI_EXP_PB4] = "pb4",
408 [DA850_EVM_UI_EXP_PB3] = "pb3",
409 [DA850_EVM_UI_EXP_PB2] = "pb2",
410 [DA850_EVM_UI_EXP_PB1] = "pb1",
411};
412
413#define DA850_N_UI_PB 8
414
415static struct gpio_keys_button da850_evm_ui_keys[] = {
416 [0 ... DA850_N_UI_PB - 1] = {
417 .type = EV_KEY,
418 .active_low = 1,
419 .wakeup = 0,
420 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
421 .code = -1, /* assigned at runtime */
422 .gpio = -1, /* assigned at runtime */
423 .desc = NULL, /* assigned at runtime */
424 },
425};
426
427static struct gpio_keys_platform_data da850_evm_ui_keys_pdata = {
428 .buttons = da850_evm_ui_keys,
429 .nbuttons = ARRAY_SIZE(da850_evm_ui_keys),
430 .poll_interval = DA850_GPIO_KEYS_POLL_MS,
431};
432
433static struct platform_device da850_evm_ui_keys_device = {
434 .name = "gpio-keys-polled",
435 .id = 0,
436 .dev = {
437 .platform_data = &da850_evm_ui_keys_pdata
438 },
439};
440
441static void da850_evm_ui_keys_init(unsigned gpio)
442{
443 int i;
444 struct gpio_keys_button *button;
445
446 for (i = 0; i < DA850_N_UI_PB; i++) {
447 button = &da850_evm_ui_keys[i];
448 button->code = KEY_F8 - i;
449 button->desc = (char *)
450 da850_evm_ui_exp[DA850_EVM_UI_EXP_PB8 + i];
451 button->gpio = gpio + DA850_EVM_UI_EXP_PB8 + i;
452 }
453}
454
75e2ea64
C		 455static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
456 unsigned ngpio, void *c)
457{
458 int sel_a, sel_b, sel_c, ret;
459
53c2897d
BG		 460 sel_a = gpio + DA850_EVM_UI_EXP_SEL_A;
461 sel_b = gpio + DA850_EVM_UI_EXP_SEL_B;
462 sel_c = gpio + DA850_EVM_UI_EXP_SEL_C;
75e2ea64 463
53c2897d 464 ret = gpio_request(sel_a, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_A]);
75e2ea64
C		 465 if (ret) {
466 pr_warning("Cannot open UI expander pin %d\n", sel_a);
467 goto exp_setup_sela_fail;
468 }
469
53c2897d 470 ret = gpio_request(sel_b, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_B]);
75e2ea64
C		 471 if (ret) {
472 pr_warning("Cannot open UI expander pin %d\n", sel_b);
473 goto exp_setup_selb_fail;
474 }
475
53c2897d 476 ret = gpio_request(sel_c, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_C]);
75e2ea64
C		 477 if (ret) {
478 pr_warning("Cannot open UI expander pin %d\n", sel_c);
479 goto exp_setup_selc_fail;
480 }
481
482 /* deselect all functionalities */
483 gpio_direction_output(sel_a, 1);
484 gpio_direction_output(sel_b, 1);
485 gpio_direction_output(sel_c, 1);
486
75929f5e
BG		 487 da850_evm_ui_keys_init(gpio);
488 ret = platform_device_register(&da850_evm_ui_keys_device);
489 if (ret) {
490 pr_warning("Could not register UI GPIO expander push-buttons");
491 goto exp_setup_keys_fail;
492 }
493
75e2ea64
C		 494 pr_info("DA850/OMAP-L138 EVM UI card detected\n");
495
496 da850_evm_setup_nor_nand();
497
bae10587 498 da850_evm_setup_emac_rmii(sel_a);
2206771c 499
75e2ea64
C		 500 return 0;
501
75929f5e
BG		 502exp_setup_keys_fail:
503 gpio_free(sel_c);
75e2ea64
C		 504exp_setup_selc_fail:
505 gpio_free(sel_b);
506exp_setup_selb_fail:
507 gpio_free(sel_a);
508exp_setup_sela_fail:
509 return ret;
510}
511
512static int da850_evm_ui_expander_teardown(struct i2c_client *client,
513 unsigned gpio, unsigned ngpio, void *c)
514{
75929f5e
BG		 515 platform_device_unregister(&da850_evm_ui_keys_device);
516
75e2ea64 517 /* deselect all functionalities */
53c2897d
BG		 518 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_C, 1);
519 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_B, 1);
520 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_A, 1);
75e2ea64 521
53c2897d
BG		 522 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_C);
523 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_B);
524 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_A);
75e2ea64
C		 525
526 return 0;
527}
528
70b30939
BG		 529/* assign the baseboard expander's GPIOs after the UI board's */
530#define DA850_UI_EXPANDER_N_GPIOS ARRAY_SIZE(da850_evm_ui_exp)
531#define DA850_BB_EXPANDER_GPIO_BASE (DAVINCI_N_GPIO + DA850_UI_EXPANDER_N_GPIOS)
532
533enum da850_evm_bb_exp_pins {
534 DA850_EVM_BB_EXP_DEEP_SLEEP_EN = 0,
535 DA850_EVM_BB_EXP_SW_RST,
536 DA850_EVM_BB_EXP_TP_23,
537 DA850_EVM_BB_EXP_TP_22,
538 DA850_EVM_BB_EXP_TP_21,
539 DA850_EVM_BB_EXP_USER_PB1,
540 DA850_EVM_BB_EXP_USER_LED2,
541 DA850_EVM_BB_EXP_USER_LED1,
542 DA850_EVM_BB_EXP_USER_SW1,
543 DA850_EVM_BB_EXP_USER_SW2,
544 DA850_EVM_BB_EXP_USER_SW3,
545 DA850_EVM_BB_EXP_USER_SW4,
546 DA850_EVM_BB_EXP_USER_SW5,
547 DA850_EVM_BB_EXP_USER_SW6,
548 DA850_EVM_BB_EXP_USER_SW7,
549 DA850_EVM_BB_EXP_USER_SW8
550};
551
552static const char const *da850_evm_bb_exp[] = {
553 [DA850_EVM_BB_EXP_DEEP_SLEEP_EN] = "deep_sleep_en",
554 [DA850_EVM_BB_EXP_SW_RST] = "sw_rst",
555 [DA850_EVM_BB_EXP_TP_23] = "tp_23",
556 [DA850_EVM_BB_EXP_TP_22] = "tp_22",
557 [DA850_EVM_BB_EXP_TP_21] = "tp_21",
558 [DA850_EVM_BB_EXP_USER_PB1] = "user_pb1",
559 [DA850_EVM_BB_EXP_USER_LED2] = "user_led2",
560 [DA850_EVM_BB_EXP_USER_LED1] = "user_led1",
561 [DA850_EVM_BB_EXP_USER_SW1] = "user_sw1",
562 [DA850_EVM_BB_EXP_USER_SW2] = "user_sw2",
563 [DA850_EVM_BB_EXP_USER_SW3] = "user_sw3",
564 [DA850_EVM_BB_EXP_USER_SW4] = "user_sw4",
565 [DA850_EVM_BB_EXP_USER_SW5] = "user_sw5",
566 [DA850_EVM_BB_EXP_USER_SW6] = "user_sw6",
567 [DA850_EVM_BB_EXP_USER_SW7] = "user_sw7",
568 [DA850_EVM_BB_EXP_USER_SW8] = "user_sw8",
569};
570
571#define DA850_N_BB_USER_SW 8
572
573static struct gpio_keys_button da850_evm_bb_keys[] = {
574 [0] = {
575 .type = EV_KEY,
576 .active_low = 1,
577 .wakeup = 0,
578 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
579 .code = KEY_PROG1,
580 .desc = NULL, /* assigned at runtime */
581 .gpio = -1, /* assigned at runtime */
582 },
583 [1 ... DA850_N_BB_USER_SW] = {
584 .type = EV_SW,
585 .active_low = 1,
586 .wakeup = 0,
587 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
588 .code = -1, /* assigned at runtime */
589 .desc = NULL, /* assigned at runtime */
590 .gpio = -1, /* assigned at runtime */
591 },
592};
593
594static struct gpio_keys_platform_data da850_evm_bb_keys_pdata = {
595 .buttons = da850_evm_bb_keys,
596 .nbuttons = ARRAY_SIZE(da850_evm_bb_keys),
597 .poll_interval = DA850_GPIO_KEYS_POLL_MS,
598};
599
600static struct platform_device da850_evm_bb_keys_device = {
601 .name = "gpio-keys-polled",
602 .id = 1,
603 .dev = {
604 .platform_data = &da850_evm_bb_keys_pdata
605 },
606};
607
608static void da850_evm_bb_keys_init(unsigned gpio)
609{
610 int i;
611 struct gpio_keys_button *button;
612
613 button = &da850_evm_bb_keys[0];
614 button->desc = (char *)
615 da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_PB1];
616 button->gpio = gpio + DA850_EVM_BB_EXP_USER_PB1;
617
618 for (i = 0; i < DA850_N_BB_USER_SW; i++) {
619 button = &da850_evm_bb_keys[i + 1];
620 button->code = SW_LID + i;
621 button->desc = (char *)
622 da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_SW1 + i];
623 button->gpio = gpio + DA850_EVM_BB_EXP_USER_SW1 + i;
624 }
625}
626
627#define DA850_N_BB_USER_LED 2
628
629static struct gpio_led da850_evm_bb_leds[] = {
630 [0 ... DA850_N_BB_USER_LED - 1] = {
631 .active_low = 1,
632 .gpio = -1, /* assigned at runtime */
633 .name = NULL, /* assigned at runtime */
634 },
635};
636
637static struct gpio_led_platform_data da850_evm_bb_leds_pdata = {
638 .leds = da850_evm_bb_leds,
639 .num_leds = ARRAY_SIZE(da850_evm_bb_leds),
640};
641
642static struct platform_device da850_evm_bb_leds_device = {
643 .name = "leds-gpio",
644 .id = -1,
645 .dev = {
646 .platform_data = &da850_evm_bb_leds_pdata
647 }
648};
649
650static void da850_evm_bb_leds_init(unsigned gpio)
651{
652 int i;
653 struct gpio_led *led;
654
655 for (i = 0; i < DA850_N_BB_USER_LED; i++) {
656 led = &da850_evm_bb_leds[i];
657
658 led->gpio = gpio + DA850_EVM_BB_EXP_USER_LED2 + i;
659 led->name =
660 da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_LED2 + i];
661 }
662}
663
664static int da850_evm_bb_expander_setup(struct i2c_client *client,
665 unsigned gpio, unsigned ngpio,
666 void *c)
667{
668 int ret;
669
670 /*
671 * Register the switches and pushbutton on the baseboard as a gpio-keys
672 * device.
673 */
674 da850_evm_bb_keys_init(gpio);
675 ret = platform_device_register(&da850_evm_bb_keys_device);
676 if (ret) {
677 pr_warning("Could not register baseboard GPIO expander keys");
678 goto io_exp_setup_sw_fail;
679 }
680
681 da850_evm_bb_leds_init(gpio);
682 ret = platform_device_register(&da850_evm_bb_leds_device);
683 if (ret) {
684 pr_warning("Could not register baseboard GPIO expander LEDS");
685 goto io_exp_setup_leds_fail;
686 }
687
688 return 0;
689
690io_exp_setup_leds_fail:
691 platform_device_unregister(&da850_evm_bb_keys_device);
692io_exp_setup_sw_fail:
693 return ret;
694}
695
696static int da850_evm_bb_expander_teardown(struct i2c_client *client,
697 unsigned gpio, unsigned ngpio, void *c)
698{
699 platform_device_unregister(&da850_evm_bb_leds_device);
700 platform_device_unregister(&da850_evm_bb_keys_device);
701
702 return 0;
703}
704
75e2ea64
C		 705static struct pca953x_platform_data da850_evm_ui_expander_info = {
706 .gpio_base = DAVINCI_N_GPIO,
707 .setup = da850_evm_ui_expander_setup,
708 .teardown = da850_evm_ui_expander_teardown,
75929f5e 709 .names = da850_evm_ui_exp,
75e2ea64
C		 710};
711
70b30939
BG		 712static struct pca953x_platform_data da850_evm_bb_expander_info = {
713 .gpio_base = DA850_BB_EXPANDER_GPIO_BASE,
714 .setup = da850_evm_bb_expander_setup,
715 .teardown = da850_evm_bb_expander_teardown,
716 .names = da850_evm_bb_exp,
717};
718
1a7ff8ff
C		 719static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
720 {
721 I2C_BOARD_INFO("tlv320aic3x", 0x18),
75e2ea64
C		 722 },
723 {
724 I2C_BOARD_INFO("tca6416", 0x20),
725 .platform_data = &da850_evm_ui_expander_info,
726 },
70b30939
BG		 727 {
728 I2C_BOARD_INFO("tca6416", 0x21),
729 .platform_data = &da850_evm_bb_expander_info,
730 },
1a7ff8ff
C		 731};
732
0fbc5592
SR		 733static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
734 .bus_freq = 100, /* kHz */
735 .bus_delay = 0, /* usec */
736};
737
738static struct davinci_uart_config da850_evm_uart_config __initdata = {
739 .enabled_uarts = 0x7,
740};
741
491214e1
C		 742/* davinci da850 evm audio machine driver */
743static u8 da850_iis_serializer_direction[] = {
744 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
745 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
746 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
747 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
748};
749
750static struct snd_platform_data da850_evm_snd_data = {
751 .tx_dma_offset = 0x2000,
752 .rx_dma_offset = 0x2000,
753 .op_mode = DAVINCI_MCASP_IIS_MODE,
754 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
755 .tdm_slots = 2,
756 .serial_dir = da850_iis_serializer_direction,
f1b21c52 757 .asp_chan_q = EVENTQ_0,
491214e1
C		 758 .version = MCASP_VERSION_2,
759 .txnumevt = 1,
760 .rxnumevt = 1,
761};
762
c840fc74
MW		 763static const short da850_evm_mcasp_pins[] __initconst = {
764 DA850_AHCLKX, DA850_ACLKX, DA850_AFSX,
765 DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE,
766 DA850_AXR_11, DA850_AXR_12,
767 -1
768};
769
700691f2
SR		 770static int da850_evm_mmc_get_ro(int index)
771{
772 return gpio_get_value(DA850_MMCSD_WP_PIN);
773}
774
775static int da850_evm_mmc_get_cd(int index)
776{
777 return !gpio_get_value(DA850_MMCSD_CD_PIN);
778}
779
780static struct davinci_mmc_config da850_mmc_config = {
781 .get_ro = da850_evm_mmc_get_ro,
782 .get_cd = da850_evm_mmc_get_cd,
783 .wires = 4,
0046d0bf
C		 784 .max_freq = 50000000,
785 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
700691f2
SR		 786 .version = MMC_CTLR_VERSION_2,
787};
788
5a0d80ea
MW		 789static const short da850_evm_mmcsd0_pins[] __initconst = {
790 DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2,
791 DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD,
792 DA850_GPIO4_0, DA850_GPIO4_1,
793 -1
794};
795
d52f235f
C		 796static void da850_panel_power_ctrl(int val)
797{
798 /* lcd backlight */
799 gpio_set_value(DA850_LCD_BL_PIN, val);
800
801 /* lcd power */
802 gpio_set_value(DA850_LCD_PWR_PIN, val);
803}
804
5cbdf276
SR		 805static int da850_lcd_hw_init(void)
806{
807 int status;
808
809 status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
810 if (status < 0)
811 return status;
812
813 status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
814 if (status < 0) {
815 gpio_free(DA850_LCD_BL_PIN);
816 return status;
817 }
818
819 gpio_direction_output(DA850_LCD_BL_PIN, 0);
820 gpio_direction_output(DA850_LCD_PWR_PIN, 0);
821
d52f235f
C		 822 /* Switch off panel power and backlight */
823 da850_panel_power_ctrl(0);
5cbdf276 824
d52f235f
C		 825 /* Switch on panel power and backlight */
826 da850_panel_power_ctrl(1);
5cbdf276
SR		 827
828 return 0;
829}
491214e1 830
a9eb1f67
SN		 831/* TPS65070 voltage regulator support */
832
833/* 3.3V */
db549d22 834static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
a9eb1f67
SN		 835 {
836 .supply = "usb0_vdda33",
837 },
838 {
839 .supply = "usb1_vdda33",
840 },
841};
842
843/* 3.3V or 1.8V */
db549d22 844static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
a9eb1f67
SN		 845 {
846 .supply = "dvdd3318_a",
847 },
848 {
849 .supply = "dvdd3318_b",
850 },
851 {
852 .supply = "dvdd3318_c",
853 },
854};
855
856/* 1.2V */
db549d22 857static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
a9eb1f67
SN		 858 {
859 .supply = "cvdd",
860 },
861};
862
863/* 1.8V LDO */
db549d22 864static struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
a9eb1f67
SN		 865 {
866 .supply = "sata_vddr",
867 },
868 {
869 .supply = "usb0_vdda18",
870 },
871 {
872 .supply = "usb1_vdda18",
873 },
874 {
875 .supply = "ddr_dvdd18",
876 },
877};
878
879/* 1.2V LDO */
db549d22 880static struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
a9eb1f67
SN		 881 {
882 .supply = "sata_vdd",
883 },
884 {
885 .supply = "pll0_vdda",
886 },
887 {
888 .supply = "pll1_vdda",
889 },
890 {
891 .supply = "usbs_cvdd",
892 },
893 {
894 .supply = "vddarnwa1",
895 },
896};
897
8b24599e
SN		 898/* We take advantage of the fact that both defdcdc{2,3} are tied high */
899static struct tps6507x_reg_platform_data tps6507x_platform_data = {
900 .defdcdc_default = true,
901};
902
db549d22 903static struct regulator_init_data tps65070_regulator_data[] = {
a9eb1f67
SN		 904 /* dcdc1 */
905 {
906 .constraints = {
907 .min_uV = 3150000,
908 .max_uV = 3450000,
909 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
910 REGULATOR_CHANGE_STATUS),
911 .boot_on = 1,
912 },
913 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
914 .consumer_supplies = tps65070_dcdc1_consumers,
915 },
916
917 /* dcdc2 */
918 {
919 .constraints = {
920 .min_uV = 1710000,
921 .max_uV = 3450000,
922 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
923 REGULATOR_CHANGE_STATUS),
924 .boot_on = 1,
925 },
926 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
927 .consumer_supplies = tps65070_dcdc2_consumers,
8b24599e 928 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 929 },
930
931 /* dcdc3 */
932 {
933 .constraints = {
934 .min_uV = 950000,
28bd2c34 935 .max_uV = 1350000,
a9eb1f67
SN		 936 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
937 REGULATOR_CHANGE_STATUS),
938 .boot_on = 1,
939 },
940 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
941 .consumer_supplies = tps65070_dcdc3_consumers,
8b24599e 942 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 943 },
944
945 /* ldo1 */
946 {
947 .constraints = {
948 .min_uV = 1710000,
949 .max_uV = 1890000,
950 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
951 REGULATOR_CHANGE_STATUS),
952 .boot_on = 1,
953 },
954 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
955 .consumer_supplies = tps65070_ldo1_consumers,
956 },
957
958 /* ldo2 */
959 {
960 .constraints = {
961 .min_uV = 1140000,
962 .max_uV = 1320000,
963 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
964 REGULATOR_CHANGE_STATUS),
965 .boot_on = 1,
966 },
967 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
968 .consumer_supplies = tps65070_ldo2_consumers,
969 },
970};
971
da1e3680
TF		 972static struct touchscreen_init_data tps6507x_touchscreen_data = {
973 .poll_period = 30, /* ms between touch samples */
974 .min_pressure = 0x30, /* minimum pressure to trigger touch */
975 .vref = 0, /* turn off vref when not using A/D */
976 .vendor = 0, /* /sys/class/input/input?/id/vendor */
977 .product = 65070, /* /sys/class/input/input?/id/product */
978 .version = 0x100, /* /sys/class/input/input?/id/version */
979};
980
0bc20bba
TF		 981static struct tps6507x_board tps_board = {
982 .tps6507x_pmic_init_data = &tps65070_regulator_data[0],
da1e3680 983 .tps6507x_ts_init_data = &tps6507x_touchscreen_data,
0bc20bba
TF		 984};
985
3506f277 986static struct i2c_board_info __initdata da850_evm_tps65070_info[] = {
a9eb1f67
SN		 987 {
988 I2C_BOARD_INFO("tps6507x", 0x48),
0bc20bba 989 .platform_data = &tps_board,
a9eb1f67
SN		 990 },
991};
992
993static int __init pmic_tps65070_init(void)
994{
3506f277
BG		 995 return i2c_register_board_info(1, da850_evm_tps65070_info,
996 ARRAY_SIZE(da850_evm_tps65070_info));
a9eb1f67
SN		 997}
998
7761ef67
SR		 999static const short da850_evm_lcdc_pins[] = {
1000 DA850_GPIO2_8, DA850_GPIO2_15,
1001 -1
1002};
1003
85b8307f
SS		 1004static const short da850_evm_mii_pins[] = {
1005 DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
1006 DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
1007 DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
1008 DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
1009 DA850_MDIO_D,
1010 -1
1011};
1012
1013static const short da850_evm_rmii_pins[] = {
1014 DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
1015 DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
1016 DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
1017 DA850_MDIO_D,
1018 -1
1019};
1020
bae10587 1021static int __init da850_evm_config_emac(void)
2206771c
C		 1022{
1023 void __iomem *cfg_chip3_base;
1024 int ret;
1025 u32 val;
bae10587
SN		 1026 struct davinci_soc_info *soc_info = &davinci_soc_info;
1027 u8 rmii_en = soc_info->emac_pdata->rmii_en;
1028
1029 if (!machine_is_davinci_da850_evm())
1030 return 0;
2206771c 1031
d2de0582 1032 cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
2206771c 1033
2206771c 1034 val = __raw_readl(cfg_chip3_base);
17fadd9a
SN		 1035
1036 if (rmii_en) {
2206771c 1037 val |= BIT(8);
85b8307f 1038 ret = davinci_cfg_reg_list(da850_evm_rmii_pins);
17fadd9a
SN		 1039 pr_info("EMAC: RMII PHY configured, MII PHY will not be"
1040 " functional\n");
1041 } else {
2206771c 1042 val &= ~BIT(8);
85b8307f 1043 ret = davinci_cfg_reg_list(da850_evm_mii_pins);
17fadd9a
SN		 1044 pr_info("EMAC: MII PHY configured, RMII PHY will not be"
1045 " functional\n");
1046 }
1047
2206771c
C		 1048 if (ret)
1049 pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
1050 ret);
1051
17fadd9a
SN		 1052 /* configure the CFGCHIP3 register for RMII or MII */
1053 __raw_writel(val, cfg_chip3_base);
1054
2206771c
C		 1055 ret = davinci_cfg_reg(DA850_GPIO2_6);
1056 if (ret)
1057 pr_warning("da850_evm_init:GPIO(2,6) mux setup "
1058 "failed\n");
1059
1060 ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
1061 if (ret) {
1062 pr_warning("Cannot open GPIO %d\n",
1063 DA850_MII_MDIO_CLKEN_PIN);
1064 return ret;
1065 }
1066
17fadd9a
SN		 1067 /* Enable/Disable MII MDIO clock */
1068 gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
2206771c 1069
782f2d78 1070 soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID;
bae10587
SN		 1071
1072 ret = da8xx_register_emac();
1073 if (ret)
1074 pr_warning("da850_evm_init: emac registration failed: %d\n",
1075 ret);
1076
2206771c
C		 1077 return 0;
1078}
bae10587 1079device_initcall(da850_evm_config_emac);
2206771c 1080
a941c503
RS		 1081/*
1082 * The following EDMA channels/slots are not being used by drivers (for
1083 * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence
1084 * they are being reserved for codecs on the DSP side.
1085 */
1086static const s16 da850_dma0_rsv_chans[][2] = {
1087 /* (offset, number) */
1088 { 8, 6},
1089 {24, 4},
1090 {30, 2},
1091 {-1, -1}
1092};
1093
1094static const s16 da850_dma0_rsv_slots[][2] = {
1095 /* (offset, number) */
1096 { 8, 6},
1097 {24, 4},
1098 {30, 50},
1099 {-1, -1}
1100};
1101
1102static const s16 da850_dma1_rsv_chans[][2] = {
1103 /* (offset, number) */
1104 { 0, 28},
1105 {30, 2},
1106 {-1, -1}
1107};
1108
1109static const s16 da850_dma1_rsv_slots[][2] = {
1110 /* (offset, number) */
1111 { 0, 28},
1112 {30, 90},
1113 {-1, -1}
1114};
1115
1116static struct edma_rsv_info da850_edma_cc0_rsv = {
1117 .rsv_chans = da850_dma0_rsv_chans,
1118 .rsv_slots = da850_dma0_rsv_slots,
1119};
1120
1121static struct edma_rsv_info da850_edma_cc1_rsv = {
1122 .rsv_chans = da850_dma1_rsv_chans,
1123 .rsv_slots = da850_dma1_rsv_slots,
1124};
1125
1126static struct edma_rsv_info *da850_edma_rsv[2] = {
1127 &da850_edma_cc0_rsv,
1128 &da850_edma_cc1_rsv,
1129};
1130
28bd2c34
SN		 1131#ifdef CONFIG_CPU_FREQ
1132static __init int da850_evm_init_cpufreq(void)
1133{
1134 switch (system_rev & 0xF) {
1135 case 3:
1136 da850_max_speed = 456000;
1137 break;
1138 case 2:
1139 da850_max_speed = 408000;
1140 break;
1141 case 1:
1142 da850_max_speed = 372000;
1143 break;
1144 }
1145
1146 return da850_register_cpufreq("pll0_sysclk3");
1147}
1148#else
1149static __init int da850_evm_init_cpufreq(void) { return 0; }
1150#endif
1151
ab3f5c1f
IY		 1152#ifdef CONFIG_DA850_WL12XX
1153
1154static void wl12xx_set_power(int index, bool power_on)
1155{
1156 static bool power_state;
1157
1158 pr_debug("Powering %s wl12xx", power_on ? "on" : "off");
1159
1160 if (power_on == power_state)
1161 return;
1162 power_state = power_on;
1163
1164 if (power_on) {
1165 /* Power up sequence required for wl127x devices */
1166 gpio_set_value(DA850_WLAN_EN, 1);
1167 usleep_range(15000, 15000);
1168 gpio_set_value(DA850_WLAN_EN, 0);
1169 usleep_range(1000, 1000);
1170 gpio_set_value(DA850_WLAN_EN, 1);
1171 msleep(70);
1172 } else {
1173 gpio_set_value(DA850_WLAN_EN, 0);
1174 }
1175}
1176
1177static struct davinci_mmc_config da850_wl12xx_mmc_config = {
1178 .set_power = wl12xx_set_power,
1179 .wires = 4,
1180 .max_freq = 25000000,
1181 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_NONREMOVABLE |
1182 MMC_CAP_POWER_OFF_CARD,
1183 .version = MMC_CTLR_VERSION_2,
1184};
1185
1186static const short da850_wl12xx_pins[] __initconst = {
1187 DA850_MMCSD1_DAT_0, DA850_MMCSD1_DAT_1, DA850_MMCSD1_DAT_2,
1188 DA850_MMCSD1_DAT_3, DA850_MMCSD1_CLK, DA850_MMCSD1_CMD,
1189 DA850_GPIO6_9, DA850_GPIO6_10,
1190 -1
1191};
1192
1193static struct wl12xx_platform_data da850_wl12xx_wlan_data __initdata = {
1194 .irq = -1,
1195 .board_ref_clock = WL12XX_REFCLOCK_38,
1196 .platform_quirks = WL12XX_PLATFORM_QUIRK_EDGE_IRQ,
1197};
1198
1199static __init int da850_wl12xx_init(void)
1200{
1201 int ret;
1202
1203 ret = davinci_cfg_reg_list(da850_wl12xx_pins);
1204 if (ret) {
1205 pr_err("wl12xx/mmc mux setup failed: %d\n", ret);
1206 goto exit;
1207 }
1208
1209 ret = da850_register_mmcsd1(&da850_wl12xx_mmc_config);
1210 if (ret) {
1211 pr_err("wl12xx/mmc registration failed: %d\n", ret);
1212 goto exit;
1213 }
1214
1215 ret = gpio_request_one(DA850_WLAN_EN, GPIOF_OUT_INIT_LOW, "wl12xx_en");
1216 if (ret) {
1217 pr_err("Could not request wl12xx enable gpio: %d\n", ret);
1218 goto exit;
1219 }
1220
1221 ret = gpio_request_one(DA850_WLAN_IRQ, GPIOF_IN, "wl12xx_irq");
1222 if (ret) {
1223 pr_err("Could not request wl12xx irq gpio: %d\n", ret);
1224 goto free_wlan_en;
1225 }
1226
1227 da850_wl12xx_wlan_data.irq = gpio_to_irq(DA850_WLAN_IRQ);
1228
1229 ret = wl12xx_set_platform_data(&da850_wl12xx_wlan_data);
1230 if (ret) {
1231 pr_err("Could not set wl12xx data: %d\n", ret);
1232 goto free_wlan_irq;
1233 }
1234
1235 return 0;
1236
1237free_wlan_irq:
1238 gpio_free(DA850_WLAN_IRQ);
1239
1240free_wlan_en:
1241 gpio_free(DA850_WLAN_EN);
1242
1243exit:
1244 return ret;
1245}
1246
1247#else /* CONFIG_DA850_WL12XX */
1248
1249static __init int da850_wl12xx_init(void)
1250{
1251 return 0;
1252}
1253
1254#endif /* CONFIG_DA850_WL12XX */
1255
8bb2c481
SN		 1256#define DA850EVM_SATA_REFCLKPN_RATE (100 * 1000 * 1000)
1257
0fbc5592
SR		 1258static __init void da850_evm_init(void)
1259{
1260 int ret;
1261
a9eb1f67
SN		 1262 ret = pmic_tps65070_init();
1263 if (ret)
1264 pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
1265 ret);
1266
a941c503 1267 ret = da850_register_edma(da850_edma_rsv);
0fbc5592
SR		 1268 if (ret)
1269 pr_warning("da850_evm_init: edma registration failed: %d\n",
1270 ret);
1271
3821d10a 1272 ret = davinci_cfg_reg_list(da850_i2c0_pins);
0fbc5592
SR		 1273 if (ret)
1274 pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
1275 ret);
1276
1277 ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
1278 if (ret)
1279 pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
1280 ret);
1281
5a4b1315 1282
0fbc5592
SR		 1283 ret = da8xx_register_watchdog();
1284 if (ret)
1285 pr_warning("da830_evm_init: watchdog registration failed: %d\n",
1286 ret);
1287
820c4fe3 1288 if (HAS_MMC) {
5a0d80ea 1289 ret = davinci_cfg_reg_list(da850_evm_mmcsd0_pins);
820c4fe3
SR		 1290 if (ret)
1291 pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
1292 " %d\n", ret);
1293
1294 ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
1295 if (ret)
1296 pr_warning("da850_evm_init: can not open GPIO %d\n",
1297 DA850_MMCSD_CD_PIN);
1298 gpio_direction_input(DA850_MMCSD_CD_PIN);
1299
1300 ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
1301 if (ret)
1302 pr_warning("da850_evm_init: can not open GPIO %d\n",
1303 DA850_MMCSD_WP_PIN);
1304 gpio_direction_input(DA850_MMCSD_WP_PIN);
1305
1306 ret = da8xx_register_mmcsd0(&da850_mmc_config);
1307 if (ret)
1308 pr_warning("da850_evm_init: mmcsd0 registration failed:"
1309 " %d\n", ret);
ab3f5c1f
IY		 1310
1311 ret = da850_wl12xx_init();
1312 if (ret)
1313 pr_warning("da850_evm_init: wl12xx initialization"
1314 " failed: %d\n", ret);
820c4fe3 1315 }
700691f2 1316
0fbc5592
SR		 1317 davinci_serial_init(&da850_evm_uart_config);
1318
1a7ff8ff
C		 1319 i2c_register_board_info(1, da850_evm_i2c_devices,
1320 ARRAY_SIZE(da850_evm_i2c_devices));
1321
0fbc5592
SR		 1322 /*
1323 * shut down uart 0 and 1; they are not used on the board and
1324 * accessing them causes endless "too much work in irq53" messages
1325 * with arago fs
1326 */
1327 __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
1328 __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
491214e1 1329
c840fc74 1330 ret = davinci_cfg_reg_list(da850_evm_mcasp_pins);
491214e1
C		 1331 if (ret)
1332 pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
1333 ret);
1334
b8864aa4 1335 da8xx_register_mcasp(0, &da850_evm_snd_data);
5cbdf276 1336
3821d10a 1337 ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
5cbdf276
SR		 1338 if (ret)
1339 pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
1340 ret);
1341
7761ef67 1342 /* Handle board specific muxing for LCD here */
3821d10a 1343 ret = davinci_cfg_reg_list(da850_evm_lcdc_pins);
7761ef67
SR		 1344 if (ret)
1345 pr_warning("da850_evm_init: evm specific lcd mux setup "
1346 "failed: %d\n", ret);
1347
5cbdf276
SR		 1348 ret = da850_lcd_hw_init();
1349 if (ret)
1350 pr_warning("da850_evm_init: lcd initialization failed: %d\n",
1351 ret);
1352
d52f235f 1353 sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
b9e6342b 1354 ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
5cbdf276
SR		 1355 if (ret)
1356 pr_warning("da850_evm_init: lcdc registration failed: %d\n",
1357 ret);
c51df70b
MG		 1358
1359 ret = da8xx_register_rtc();
1360 if (ret)
1361 pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
09dc2d45 1362
28bd2c34 1363 ret = da850_evm_init_cpufreq();
09dc2d45
SN		 1364 if (ret)
1365 pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
1366 ret);
5aeb15aa
SN		 1367
1368 ret = da8xx_register_cpuidle();
1369 if (ret)
1370 pr_warning("da850_evm_init: cpuidle registration failed: %d\n",
1371 ret);
63534443
SN		 1372
1373 ret = da850_register_pm(&da850_pm_device);
1374 if (ret)
1375 pr_warning("da850_evm_init: suspend registration failed: %d\n",
1376 ret);
fdce5568
SN		 1377
1378 ret = da8xx_register_spi(1, da850evm_spi_info,
1379 ARRAY_SIZE(da850evm_spi_info));
1380 if (ret)
1381 pr_warning("da850_evm_init: spi 1 registration failed: %d\n",
1382 ret);
8bb2c481
SN		 1383
1384 ret = da850_register_sata(DA850EVM_SATA_REFCLKPN_RATE);
1385 if (ret)
1386 pr_warning("da850_evm_init: sata registration failed: %d\n",
1387 ret);
810198bc
RS		 1388
1389 da850_evm_setup_mac_addr();
0fbc5592
SR		 1390}
1391
1392#ifdef CONFIG_SERIAL_8250_CONSOLE
1393static int __init da850_evm_console_init(void)
1394{
1aa5f2a9
MW		 1395 if (!machine_is_davinci_da850_evm())
1396 return 0;
1397
0fbc5592
SR		 1398 return add_preferred_console("ttyS", 2, "115200");
1399}
1400console_initcall(da850_evm_console_init);
1401#endif
1402
0fbc5592
SR		 1403static void __init da850_evm_map_io(void)
1404{
1405 da850_init();
1406}
1407
48ea89ea 1408MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
e7e56014 1409 .atag_offset = 0x100,
0fbc5592 1410 .map_io = da850_evm_map_io,
bd808947 1411 .init_irq = cp_intc_init,
0fbc5592
SR		 1412 .timer = &davinci_timer,
1413 .init_machine = da850_evm_init,
f68deabf 1414 .dma_zone_size = SZ_128M,
c6121ddd 1415 .restart = da8xx_restart,
0fbc5592 1416MACHINE_END
Ubuntu Hirsute Linux kernel mirror