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Commit | Line | Data |
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95a3477f KH |
1 | /* |
2 | * TI DaVinci EVM board support | |
3 | * | |
4 | * Author: Kevin Hilman, Deep Root Systems, LLC | |
5 | * | |
6 | * 2007 (c) MontaVista Software, Inc. This file is licensed under | |
7 | * the terms of the GNU General Public License version 2. This program | |
8 | * is licensed "as is" without any warranty of any kind, whether express | |
9 | * or implied. | |
10 | */ | |
11 | #include <linux/kernel.h> | |
95a3477f | 12 | #include <linux/init.h> |
42d399e4 | 13 | #include <linux/err.h> |
95a3477f KH |
14 | #include <linux/platform_device.h> |
15 | #include <linux/mtd/mtd.h> | |
16 | #include <linux/mtd/partitions.h> | |
d4092d76 | 17 | #include <linux/mtd/rawnand.h> |
95a3477f | 18 | #include <linux/i2c.h> |
95a3477f | 19 | #include <linux/gpio.h> |
e5353765 | 20 | #include <linux/gpio/machine.h> |
95a3477f | 21 | #include <linux/clk.h> |
5c054de2 | 22 | #include <linux/dm9000.h> |
51e68e27 | 23 | #include <linux/videodev2.h> |
b5dcee22 | 24 | #include <media/i2c/tvp514x.h> |
95a3477f KH |
25 | #include <linux/spi/spi.h> |
26 | #include <linux/spi/eeprom.h> | |
834acb2a PA |
27 | #include <linux/platform_data/gpio-davinci.h> |
28 | #include <linux/platform_data/i2c-davinci.h> | |
29 | #include <linux/platform_data/mtd-davinci.h> | |
30 | #include <linux/platform_data/mmc-davinci.h> | |
31 | #include <linux/platform_data/usb-davinci.h> | |
95a3477f | 32 | |
95a3477f KH |
33 | #include <asm/mach-types.h> |
34 | #include <asm/mach/arch.h> | |
95a3477f | 35 | |
95a3477f | 36 | #include <mach/serial.h> |
834acb2a | 37 | #include <mach/common.h> |
95a3477f | 38 | |
39c6d2d1 MH |
39 | #include "davinci.h" |
40 | ||
95a3477f KH |
41 | /* NOTE: this is geared for the standard config, with a socketed |
42 | * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you | |
43 | * swap chips, maybe with a different block size, partitioning may | |
44 | * need to be changed. | |
45 | */ | |
46 | #define NAND_BLOCK_SIZE SZ_128K | |
47 | ||
48 | static struct mtd_partition davinci_nand_partitions[] = { | |
49 | { | |
50 | /* UBL (a few copies) plus U-Boot */ | |
51 | .name = "bootloader", | |
52 | .offset = 0, | |
53 | .size = 15 * NAND_BLOCK_SIZE, | |
54 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
55 | }, { | |
56 | /* U-Boot environment */ | |
57 | .name = "params", | |
58 | .offset = MTDPART_OFS_APPEND, | |
59 | .size = 1 * NAND_BLOCK_SIZE, | |
60 | .mask_flags = 0, | |
61 | }, { | |
62 | .name = "kernel", | |
63 | .offset = MTDPART_OFS_APPEND, | |
64 | .size = SZ_4M, | |
65 | .mask_flags = 0, | |
66 | }, { | |
67 | .name = "filesystem1", | |
68 | .offset = MTDPART_OFS_APPEND, | |
69 | .size = SZ_512M, | |
70 | .mask_flags = 0, | |
71 | }, { | |
72 | .name = "filesystem2", | |
73 | .offset = MTDPART_OFS_APPEND, | |
74 | .size = MTDPART_SIZ_FULL, | |
75 | .mask_flags = 0, | |
76 | } | |
77 | /* two blocks with bad block table (and mirror) at the end */ | |
78 | }; | |
79 | ||
80 | static struct davinci_nand_pdata davinci_nand_data = { | |
39bdf863 | 81 | .core_chipsel = 0, |
95a3477f KH |
82 | .mask_chipsel = BIT(14), |
83 | .parts = davinci_nand_partitions, | |
84 | .nr_parts = ARRAY_SIZE(davinci_nand_partitions), | |
74c987a0 | 85 | .ecc_mode = NAND_ECC_HW, |
bb9ebd4e | 86 | .bbt_options = NAND_BBT_USE_FLASH, |
74c987a0 | 87 | .ecc_bits = 4, |
95a3477f KH |
88 | }; |
89 | ||
90 | static struct resource davinci_nand_resources[] = { | |
91 | { | |
70342174 SS |
92 | .start = DM355_ASYNC_EMIF_DATA_CE0_BASE, |
93 | .end = DM355_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1, | |
95a3477f KH |
94 | .flags = IORESOURCE_MEM, |
95 | }, { | |
70342174 SS |
96 | .start = DM355_ASYNC_EMIF_CONTROL_BASE, |
97 | .end = DM355_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, | |
95a3477f KH |
98 | .flags = IORESOURCE_MEM, |
99 | }, | |
100 | }; | |
101 | ||
102 | static struct platform_device davinci_nand_device = { | |
103 | .name = "davinci_nand", | |
104 | .id = 0, | |
105 | ||
106 | .num_resources = ARRAY_SIZE(davinci_nand_resources), | |
107 | .resource = davinci_nand_resources, | |
108 | ||
109 | .dev = { | |
110 | .platform_data = &davinci_nand_data, | |
111 | }, | |
112 | }; | |
113 | ||
9411ac07 SN |
114 | #define DM355_I2C_SDA_PIN GPIO_TO_PIN(0, 15) |
115 | #define DM355_I2C_SCL_PIN GPIO_TO_PIN(0, 14) | |
116 | ||
e5353765 | 117 | static struct gpiod_lookup_table i2c_recovery_gpiod_table = { |
9411ac07 | 118 | .dev_id = "i2c_davinci.1", |
e5353765 | 119 | .table = { |
94777ed3 | 120 | GPIO_LOOKUP("davinci_gpio", DM355_I2C_SDA_PIN, "sda", |
e5353765 | 121 | GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), |
94777ed3 | 122 | GPIO_LOOKUP("davinci_gpio", DM355_I2C_SCL_PIN, "scl", |
e5353765 LW |
123 | GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), |
124 | }, | |
125 | }; | |
126 | ||
95a3477f KH |
127 | static struct davinci_i2c_platform_data i2c_pdata = { |
128 | .bus_freq = 400 /* kHz */, | |
129 | .bus_delay = 0 /* usec */, | |
e5353765 | 130 | .gpio_recovery = true, |
95a3477f KH |
131 | }; |
132 | ||
133 | static int dm355evm_mmc_gpios = -EINVAL; | |
134 | ||
135 | static void dm355evm_mmcsd_gpios(unsigned gpio) | |
136 | { | |
137 | gpio_request(gpio + 0, "mmc0_ro"); | |
138 | gpio_request(gpio + 1, "mmc0_cd"); | |
139 | gpio_request(gpio + 2, "mmc1_ro"); | |
140 | gpio_request(gpio + 3, "mmc1_cd"); | |
141 | ||
142 | /* we "know" these are input-only so we don't | |
143 | * need to call gpio_direction_input() | |
144 | */ | |
145 | ||
146 | dm355evm_mmc_gpios = gpio; | |
147 | } | |
148 | ||
149 | static struct i2c_board_info dm355evm_i2c_info[] = { | |
51e68e27 | 150 | { I2C_BOARD_INFO("dm355evm_msp", 0x25), |
95a3477f | 151 | .platform_data = dm355evm_mmcsd_gpios, |
51e68e27 MK |
152 | }, |
153 | /* { plus irq }, */ | |
1a7ff8ff | 154 | { I2C_BOARD_INFO("tlv320aic33", 0x1b), }, |
95a3477f KH |
155 | }; |
156 | ||
157 | static void __init evm_init_i2c(void) | |
158 | { | |
e5353765 | 159 | gpiod_add_lookup_table(&i2c_recovery_gpiod_table); |
95a3477f KH |
160 | davinci_init_i2c(&i2c_pdata); |
161 | ||
162 | gpio_request(5, "dm355evm_msp"); | |
163 | gpio_direction_input(5); | |
164 | dm355evm_i2c_info[0].irq = gpio_to_irq(5); | |
165 | ||
166 | i2c_register_board_info(1, dm355evm_i2c_info, | |
167 | ARRAY_SIZE(dm355evm_i2c_info)); | |
168 | } | |
169 | ||
170 | static struct resource dm355evm_dm9000_rsrc[] = { | |
171 | { | |
172 | /* addr */ | |
173 | .start = 0x04014000, | |
174 | .end = 0x04014001, | |
175 | .flags = IORESOURCE_MEM, | |
176 | }, { | |
177 | /* data */ | |
178 | .start = 0x04014002, | |
179 | .end = 0x04014003, | |
180 | .flags = IORESOURCE_MEM, | |
181 | }, { | |
182 | .flags = IORESOURCE_IRQ | |
183 | | IORESOURCE_IRQ_HIGHEDGE /* rising (active high) */, | |
184 | }, | |
185 | }; | |
186 | ||
5c054de2 SN |
187 | static struct dm9000_plat_data dm335evm_dm9000_platdata; |
188 | ||
95a3477f KH |
189 | static struct platform_device dm355evm_dm9000 = { |
190 | .name = "dm9000", | |
191 | .id = -1, | |
192 | .resource = dm355evm_dm9000_rsrc, | |
193 | .num_resources = ARRAY_SIZE(dm355evm_dm9000_rsrc), | |
5c054de2 SN |
194 | .dev = { |
195 | .platform_data = &dm335evm_dm9000_platdata, | |
196 | }, | |
95a3477f KH |
197 | }; |
198 | ||
51e68e27 MK |
199 | static struct tvp514x_platform_data tvp5146_pdata = { |
200 | .clk_polarity = 0, | |
201 | .hs_polarity = 1, | |
202 | .vs_polarity = 1 | |
203 | }; | |
204 | ||
205 | #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) | |
206 | /* Inputs available at the TVP5146 */ | |
207 | static struct v4l2_input tvp5146_inputs[] = { | |
208 | { | |
209 | .index = 0, | |
210 | .name = "Composite", | |
211 | .type = V4L2_INPUT_TYPE_CAMERA, | |
212 | .std = TVP514X_STD_ALL, | |
213 | }, | |
214 | { | |
215 | .index = 1, | |
216 | .name = "S-Video", | |
217 | .type = V4L2_INPUT_TYPE_CAMERA, | |
218 | .std = TVP514X_STD_ALL, | |
219 | }, | |
220 | }; | |
221 | ||
222 | /* | |
223 | * this is the route info for connecting each input to decoder | |
224 | * ouput that goes to vpfe. There is a one to one correspondence | |
225 | * with tvp5146_inputs | |
226 | */ | |
227 | static struct vpfe_route tvp5146_routes[] = { | |
228 | { | |
229 | .input = INPUT_CVBS_VI2B, | |
230 | .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, | |
231 | }, | |
232 | { | |
233 | .input = INPUT_SVIDEO_VI2C_VI1C, | |
234 | .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, | |
235 | }, | |
236 | }; | |
237 | ||
238 | static struct vpfe_subdev_info vpfe_sub_devs[] = { | |
239 | { | |
240 | .name = "tvp5146", | |
241 | .grp_id = 0, | |
242 | .num_inputs = ARRAY_SIZE(tvp5146_inputs), | |
243 | .inputs = tvp5146_inputs, | |
244 | .routes = tvp5146_routes, | |
245 | .can_route = 1, | |
246 | .ccdc_if_params = { | |
247 | .if_type = VPFE_BT656, | |
248 | .hdpol = VPFE_PINPOL_POSITIVE, | |
249 | .vdpol = VPFE_PINPOL_POSITIVE, | |
250 | }, | |
251 | .board_info = { | |
252 | I2C_BOARD_INFO("tvp5146", 0x5d), | |
253 | .platform_data = &tvp5146_pdata, | |
254 | }, | |
255 | } | |
256 | }; | |
257 | ||
258 | static struct vpfe_config vpfe_cfg = { | |
259 | .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), | |
077639f4 | 260 | .i2c_adapter_id = 1, |
51e68e27 MK |
261 | .sub_devs = vpfe_sub_devs, |
262 | .card_name = "DM355 EVM", | |
263 | .ccdc = "DM355 CCDC", | |
264 | }; | |
265 | ||
87756177 LP |
266 | /* venc standards timings */ |
267 | static struct vpbe_enc_mode_info dm355evm_enc_preset_timing[] = { | |
268 | { | |
269 | .name = "ntsc", | |
270 | .timings_type = VPBE_ENC_STD, | |
89cdbba8 | 271 | .std_id = V4L2_STD_NTSC, |
87756177 LP |
272 | .interlaced = 1, |
273 | .xres = 720, | |
274 | .yres = 480, | |
275 | .aspect = {11, 10}, | |
276 | .fps = {30000, 1001}, | |
277 | .left_margin = 0x79, | |
278 | .upper_margin = 0x10, | |
279 | }, | |
280 | { | |
281 | .name = "pal", | |
282 | .timings_type = VPBE_ENC_STD, | |
89cdbba8 | 283 | .std_id = V4L2_STD_PAL, |
87756177 LP |
284 | .interlaced = 1, |
285 | .xres = 720, | |
286 | .yres = 576, | |
287 | .aspect = {54, 59}, | |
288 | .fps = {25, 1}, | |
289 | .left_margin = 0x7E, | |
290 | .upper_margin = 0x16 | |
291 | }, | |
292 | }; | |
293 | ||
294 | #define VENC_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) | |
295 | ||
296 | /* | |
297 | * The outputs available from VPBE + ecnoders. Keep the | |
298 | * the order same as that of encoders. First those from venc followed by that | |
299 | * from encoders. Index in the output refers to index on a particular encoder. | |
300 | * Driver uses this index to pass it to encoder when it supports more than | |
301 | * one output. Application uses index of the array to set an output. | |
302 | */ | |
303 | static struct vpbe_output dm355evm_vpbe_outputs[] = { | |
304 | { | |
305 | .output = { | |
306 | .index = 0, | |
307 | .name = "Composite", | |
308 | .type = V4L2_OUTPUT_TYPE_ANALOG, | |
309 | .std = VENC_STD_ALL, | |
310 | .capabilities = V4L2_OUT_CAP_STD, | |
311 | }, | |
312 | .subdev_name = DM355_VPBE_VENC_SUBDEV_NAME, | |
313 | .default_mode = "ntsc", | |
314 | .num_modes = ARRAY_SIZE(dm355evm_enc_preset_timing), | |
315 | .modes = dm355evm_enc_preset_timing, | |
27ffaeb0 | 316 | .if_params = MEDIA_BUS_FMT_FIXED, |
87756177 LP |
317 | }, |
318 | }; | |
319 | ||
320 | static struct vpbe_config dm355evm_display_cfg = { | |
321 | .module_name = "dm355-vpbe-display", | |
322 | .i2c_adapter_id = 1, | |
323 | .osd = { | |
324 | .module_name = DM355_VPBE_OSD_SUBDEV_NAME, | |
325 | }, | |
326 | .venc = { | |
327 | .module_name = DM355_VPBE_VENC_SUBDEV_NAME, | |
328 | }, | |
329 | .num_outputs = ARRAY_SIZE(dm355evm_vpbe_outputs), | |
330 | .outputs = dm355evm_vpbe_outputs, | |
331 | }; | |
332 | ||
95a3477f KH |
333 | static struct platform_device *davinci_evm_devices[] __initdata = { |
334 | &dm355evm_dm9000, | |
335 | &davinci_nand_device, | |
336 | }; | |
337 | ||
95a3477f KH |
338 | static void __init dm355_evm_map_io(void) |
339 | { | |
95a3477f KH |
340 | dm355_init(); |
341 | } | |
342 | ||
2dbf56ae KH |
343 | static int dm355evm_mmc_get_cd(int module) |
344 | { | |
345 | if (!gpio_is_valid(dm355evm_mmc_gpios)) | |
346 | return -ENXIO; | |
347 | /* low == card present */ | |
348 | return !gpio_get_value_cansleep(dm355evm_mmc_gpios + 2 * module + 1); | |
349 | } | |
350 | ||
351 | static int dm355evm_mmc_get_ro(int module) | |
352 | { | |
353 | if (!gpio_is_valid(dm355evm_mmc_gpios)) | |
354 | return -ENXIO; | |
355 | /* high == card's write protect switch active */ | |
356 | return gpio_get_value_cansleep(dm355evm_mmc_gpios + 2 * module + 0); | |
357 | } | |
358 | ||
359 | static struct davinci_mmc_config dm355evm_mmc_config = { | |
360 | .get_cd = dm355evm_mmc_get_cd, | |
361 | .get_ro = dm355evm_mmc_get_ro, | |
362 | .wires = 4, | |
363 | .max_freq = 50000000, | |
364 | .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, | |
2dbf56ae KH |
365 | }; |
366 | ||
95a3477f KH |
367 | /* Don't connect anything to J10 unless you're only using USB host |
368 | * mode *and* have to do so with some kind of gender-bender. If | |
369 | * you have proper Mini-B or Mini-A cables (or Mini-A adapters) | |
370 | * the ID pin won't need any help. | |
371 | */ | |
95a3477f | 372 | #define USB_ID_VALUE 1 /* ID pulled low */ |
95a3477f KH |
373 | |
374 | static struct spi_eeprom at25640a = { | |
375 | .byte_len = SZ_64K / 8, | |
376 | .name = "at25640a", | |
377 | .page_size = 32, | |
378 | .flags = EE_ADDR2, | |
379 | }; | |
380 | ||
eec51afc | 381 | static const struct spi_board_info dm355_evm_spi_info[] __initconst = { |
95a3477f KH |
382 | { |
383 | .modalias = "at25", | |
384 | .platform_data = &at25640a, | |
385 | .max_speed_hz = 10 * 1000 * 1000, /* at 3v3 */ | |
386 | .bus_num = 0, | |
387 | .chip_select = 0, | |
388 | .mode = SPI_MODE_0, | |
389 | }, | |
390 | }; | |
391 | ||
392 | static __init void dm355_evm_init(void) | |
393 | { | |
394 | struct clk *aemif; | |
834acb2a PA |
395 | int ret; |
396 | ||
5b19f66d DL |
397 | dm355_register_clocks(); |
398 | ||
834acb2a PA |
399 | ret = dm355_gpio_register(); |
400 | if (ret) | |
401 | pr_warn("%s: GPIO init failed: %d\n", __func__, ret); | |
95a3477f KH |
402 | |
403 | gpio_request(1, "dm9000"); | |
404 | gpio_direction_input(1); | |
405 | dm355evm_dm9000_rsrc[2].start = gpio_to_irq(1); | |
406 | ||
407 | aemif = clk_get(&dm355evm_dm9000.dev, "aemif"); | |
5bcd9272 | 408 | if (!WARN(IS_ERR(aemif), "unable to get AEMIF clock\n")) |
b6f1ffed | 409 | clk_prepare_enable(aemif); |
95a3477f KH |
410 | |
411 | platform_add_devices(davinci_evm_devices, | |
412 | ARRAY_SIZE(davinci_evm_devices)); | |
413 | evm_init_i2c(); | |
fcf7157b | 414 | davinci_serial_init(dm355_serial_device); |
95a3477f KH |
415 | |
416 | /* NOTE: NAND flash timings set by the UBL are slower than | |
417 | * needed by MT29F16G08FAA chips ... EMIF.A1CR is 0x40400204 | |
418 | * but could be 0x0400008c for about 25% faster page reads. | |
419 | */ | |
420 | ||
421 | gpio_request(2, "usb_id_toggle"); | |
422 | gpio_direction_output(2, USB_ID_VALUE); | |
423 | /* irlml6401 switches over 1A in under 8 msec */ | |
355fb4e3 | 424 | davinci_setup_usb(1000, 8); |
95a3477f | 425 | |
2dbf56ae KH |
426 | davinci_setup_mmc(0, &dm355evm_mmc_config); |
427 | davinci_setup_mmc(1, &dm355evm_mmc_config); | |
428 | ||
87756177 | 429 | dm355_init_video(&vpfe_cfg, &dm355evm_display_cfg); |
62a2d6cd | 430 | |
95a3477f KH |
431 | dm355_init_spi0(BIT(0), dm355_evm_spi_info, |
432 | ARRAY_SIZE(dm355_evm_spi_info)); | |
25acf553 C |
433 | |
434 | /* DM335 EVM uses ASP1; line-out is a stereo mini-jack */ | |
6bce5efd | 435 | dm355_init_asp1(ASP1_TX_EVT_EN | ASP1_RX_EVT_EN); |
95a3477f KH |
436 | } |
437 | ||
95a3477f | 438 | MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM") |
e7e56014 | 439 | .atag_offset = 0x100, |
95a3477f | 440 | .map_io = dm355_evm_map_io, |
bd808947 | 441 | .init_irq = davinci_irq_init, |
96c08173 | 442 | .init_time = dm355_init_time, |
95a3477f | 443 | .init_machine = dm355_evm_init, |
3aa3e840 | 444 | .init_late = davinci_init_late, |
f68deabf | 445 | .dma_zone_size = SZ_128M, |
95a3477f | 446 | MACHINE_END |