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1/*
2 * TI DaVinci EVM board support
3 *
4 * Author: Kevin Hilman, Deep Root Systems, LLC
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/dma-mapping.h>
15#include <linux/platform_device.h>
16#include <linux/mtd/mtd.h>
17#include <linux/mtd/partitions.h>
18#include <linux/mtd/nand.h>
19#include <linux/i2c.h>
20#include <linux/io.h>
21#include <linux/gpio.h>
22#include <linux/clk.h>
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23#include <linux/videodev2.h>
24#include <media/tvp514x.h>
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25#include <linux/spi/spi.h>
26#include <linux/spi/eeprom.h>
27
28#include <asm/setup.h>
29#include <asm/mach-types.h>
30#include <asm/mach/arch.h>
31#include <asm/mach/map.h>
32#include <asm/mach/flash.h>
33
34#include <mach/hardware.h>
35#include <mach/dm355.h>
36#include <mach/psc.h>
37#include <mach/common.h>
38#include <mach/i2c.h>
39#include <mach/serial.h>
40#include <mach/nand.h>
2dbf56ae 41#include <mach/mmc.h>
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42
43#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e10000
44#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
45
46/* NOTE: this is geared for the standard config, with a socketed
47 * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you
48 * swap chips, maybe with a different block size, partitioning may
49 * need to be changed.
50 */
51#define NAND_BLOCK_SIZE SZ_128K
52
53static struct mtd_partition davinci_nand_partitions[] = {
54 {
55 /* UBL (a few copies) plus U-Boot */
56 .name = "bootloader",
57 .offset = 0,
58 .size = 15 * NAND_BLOCK_SIZE,
59 .mask_flags = MTD_WRITEABLE, /* force read-only */
60 }, {
61 /* U-Boot environment */
62 .name = "params",
63 .offset = MTDPART_OFS_APPEND,
64 .size = 1 * NAND_BLOCK_SIZE,
65 .mask_flags = 0,
66 }, {
67 .name = "kernel",
68 .offset = MTDPART_OFS_APPEND,
69 .size = SZ_4M,
70 .mask_flags = 0,
71 }, {
72 .name = "filesystem1",
73 .offset = MTDPART_OFS_APPEND,
74 .size = SZ_512M,
75 .mask_flags = 0,
76 }, {
77 .name = "filesystem2",
78 .offset = MTDPART_OFS_APPEND,
79 .size = MTDPART_SIZ_FULL,
80 .mask_flags = 0,
81 }
82 /* two blocks with bad block table (and mirror) at the end */
83};
84
85static struct davinci_nand_pdata davinci_nand_data = {
86 .mask_chipsel = BIT(14),
87 .parts = davinci_nand_partitions,
88 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
89 .ecc_mode = NAND_ECC_HW_SYNDROME,
90 .options = NAND_USE_FLASH_BBT,
91};
92
93static struct resource davinci_nand_resources[] = {
94 {
95 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
96 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
97 .flags = IORESOURCE_MEM,
98 }, {
99 .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
100 .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
101 .flags = IORESOURCE_MEM,
102 },
103};
104
105static struct platform_device davinci_nand_device = {
106 .name = "davinci_nand",
107 .id = 0,
108
109 .num_resources = ARRAY_SIZE(davinci_nand_resources),
110 .resource = davinci_nand_resources,
111
112 .dev = {
113 .platform_data = &davinci_nand_data,
114 },
115};
116
117static struct davinci_i2c_platform_data i2c_pdata = {
118 .bus_freq = 400 /* kHz */,
119 .bus_delay = 0 /* usec */,
120};
121
61aa0732 122static struct snd_platform_data dm355_evm_snd_data;
25acf553 123
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124static int dm355evm_mmc_gpios = -EINVAL;
125
126static void dm355evm_mmcsd_gpios(unsigned gpio)
127{
128 gpio_request(gpio + 0, "mmc0_ro");
129 gpio_request(gpio + 1, "mmc0_cd");
130 gpio_request(gpio + 2, "mmc1_ro");
131 gpio_request(gpio + 3, "mmc1_cd");
132
133 /* we "know" these are input-only so we don't
134 * need to call gpio_direction_input()
135 */
136
137 dm355evm_mmc_gpios = gpio;
138}
139
140static struct i2c_board_info dm355evm_i2c_info[] = {
51e68e27 141 { I2C_BOARD_INFO("dm355evm_msp", 0x25),
95a3477f 142 .platform_data = dm355evm_mmcsd_gpios,
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143 },
144 /* { plus irq }, */
1a7ff8ff 145 { I2C_BOARD_INFO("tlv320aic33", 0x1b), },
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146};
147
148static void __init evm_init_i2c(void)
149{
150 davinci_init_i2c(&i2c_pdata);
151
152 gpio_request(5, "dm355evm_msp");
153 gpio_direction_input(5);
154 dm355evm_i2c_info[0].irq = gpio_to_irq(5);
155
156 i2c_register_board_info(1, dm355evm_i2c_info,
157 ARRAY_SIZE(dm355evm_i2c_info));
158}
159
160static struct resource dm355evm_dm9000_rsrc[] = {
161 {
162 /* addr */
163 .start = 0x04014000,
164 .end = 0x04014001,
165 .flags = IORESOURCE_MEM,
166 }, {
167 /* data */
168 .start = 0x04014002,
169 .end = 0x04014003,
170 .flags = IORESOURCE_MEM,
171 }, {
172 .flags = IORESOURCE_IRQ
173 | IORESOURCE_IRQ_HIGHEDGE /* rising (active high) */,
174 },
175};
176
177static struct platform_device dm355evm_dm9000 = {
178 .name = "dm9000",
179 .id = -1,
180 .resource = dm355evm_dm9000_rsrc,
181 .num_resources = ARRAY_SIZE(dm355evm_dm9000_rsrc),
182};
183
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184static struct tvp514x_platform_data tvp5146_pdata = {
185 .clk_polarity = 0,
186 .hs_polarity = 1,
187 .vs_polarity = 1
188};
189
190#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
191/* Inputs available at the TVP5146 */
192static struct v4l2_input tvp5146_inputs[] = {
193 {
194 .index = 0,
195 .name = "Composite",
196 .type = V4L2_INPUT_TYPE_CAMERA,
197 .std = TVP514X_STD_ALL,
198 },
199 {
200 .index = 1,
201 .name = "S-Video",
202 .type = V4L2_INPUT_TYPE_CAMERA,
203 .std = TVP514X_STD_ALL,
204 },
205};
206
207/*
208 * this is the route info for connecting each input to decoder
209 * ouput that goes to vpfe. There is a one to one correspondence
210 * with tvp5146_inputs
211 */
212static struct vpfe_route tvp5146_routes[] = {
213 {
214 .input = INPUT_CVBS_VI2B,
215 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
216 },
217 {
218 .input = INPUT_SVIDEO_VI2C_VI1C,
219 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
220 },
221};
222
223static struct vpfe_subdev_info vpfe_sub_devs[] = {
224 {
225 .name = "tvp5146",
226 .grp_id = 0,
227 .num_inputs = ARRAY_SIZE(tvp5146_inputs),
228 .inputs = tvp5146_inputs,
229 .routes = tvp5146_routes,
230 .can_route = 1,
231 .ccdc_if_params = {
232 .if_type = VPFE_BT656,
233 .hdpol = VPFE_PINPOL_POSITIVE,
234 .vdpol = VPFE_PINPOL_POSITIVE,
235 },
236 .board_info = {
237 I2C_BOARD_INFO("tvp5146", 0x5d),
238 .platform_data = &tvp5146_pdata,
239 },
240 }
241};
242
243static struct vpfe_config vpfe_cfg = {
244 .num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
245 .sub_devs = vpfe_sub_devs,
246 .card_name = "DM355 EVM",
247 .ccdc = "DM355 CCDC",
248};
249
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250static struct platform_device *davinci_evm_devices[] __initdata = {
251 &dm355evm_dm9000,
252 &davinci_nand_device,
253};
254
255static struct davinci_uart_config uart_config __initdata = {
256 .enabled_uarts = (1 << 0),
257};
258
259static void __init dm355_evm_map_io(void)
260{
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261 /* setup input configuration for VPFE input devices */
262 dm355_set_vpfe_config(&vpfe_cfg);
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263 dm355_init();
264}
265
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266static int dm355evm_mmc_get_cd(int module)
267{
268 if (!gpio_is_valid(dm355evm_mmc_gpios))
269 return -ENXIO;
270 /* low == card present */
271 return !gpio_get_value_cansleep(dm355evm_mmc_gpios + 2 * module + 1);
272}
273
274static int dm355evm_mmc_get_ro(int module)
275{
276 if (!gpio_is_valid(dm355evm_mmc_gpios))
277 return -ENXIO;
278 /* high == card's write protect switch active */
279 return gpio_get_value_cansleep(dm355evm_mmc_gpios + 2 * module + 0);
280}
281
282static struct davinci_mmc_config dm355evm_mmc_config = {
283 .get_cd = dm355evm_mmc_get_cd,
284 .get_ro = dm355evm_mmc_get_ro,
285 .wires = 4,
286 .max_freq = 50000000,
287 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
288 .version = MMC_CTLR_VERSION_1,
289};
290
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291/* Don't connect anything to J10 unless you're only using USB host
292 * mode *and* have to do so with some kind of gender-bender. If
293 * you have proper Mini-B or Mini-A cables (or Mini-A adapters)
294 * the ID pin won't need any help.
295 */
296#ifdef CONFIG_USB_MUSB_PERIPHERAL
297#define USB_ID_VALUE 0 /* ID pulled high; *should* float */
298#else
299#define USB_ID_VALUE 1 /* ID pulled low */
300#endif
301
302static struct spi_eeprom at25640a = {
303 .byte_len = SZ_64K / 8,
304 .name = "at25640a",
305 .page_size = 32,
306 .flags = EE_ADDR2,
307};
308
309static struct spi_board_info dm355_evm_spi_info[] __initconst = {
310 {
311 .modalias = "at25",
312 .platform_data = &at25640a,
313 .max_speed_hz = 10 * 1000 * 1000, /* at 3v3 */
314 .bus_num = 0,
315 .chip_select = 0,
316 .mode = SPI_MODE_0,
317 },
318};
319
320static __init void dm355_evm_init(void)
321{
322 struct clk *aemif;
323
324 gpio_request(1, "dm9000");
325 gpio_direction_input(1);
326 dm355evm_dm9000_rsrc[2].start = gpio_to_irq(1);
327
328 aemif = clk_get(&dm355evm_dm9000.dev, "aemif");
329 if (IS_ERR(aemif))
330 WARN("%s: unable to get AEMIF clock\n", __func__);
331 else
332 clk_enable(aemif);
333
334 platform_add_devices(davinci_evm_devices,
335 ARRAY_SIZE(davinci_evm_devices));
336 evm_init_i2c();
337 davinci_serial_init(&uart_config);
338
339 /* NOTE: NAND flash timings set by the UBL are slower than
340 * needed by MT29F16G08FAA chips ... EMIF.A1CR is 0x40400204
341 * but could be 0x0400008c for about 25% faster page reads.
342 */
343
344 gpio_request(2, "usb_id_toggle");
345 gpio_direction_output(2, USB_ID_VALUE);
346 /* irlml6401 switches over 1A in under 8 msec */
347 setup_usb(500, 8);
348
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349 davinci_setup_mmc(0, &dm355evm_mmc_config);
350 davinci_setup_mmc(1, &dm355evm_mmc_config);
351
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352 dm355_init_spi0(BIT(0), dm355_evm_spi_info,
353 ARRAY_SIZE(dm355_evm_spi_info));
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354
355 /* DM335 EVM uses ASP1; line-out is a stereo mini-jack */
356 dm355_init_asp1(ASP1_TX_EVT_EN | ASP1_RX_EVT_EN, &dm355_evm_snd_data);
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357}
358
359static __init void dm355_evm_irq_init(void)
360{
361 davinci_irq_init();
362}
363
364MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
365 .phys_io = IO_PHYS,
366 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
367 .boot_params = (0x80000100),
368 .map_io = dm355_evm_map_io,
369 .init_irq = dm355_evm_irq_init,
370 .timer = &davinci_timer,
371 .init_machine = dm355_evm_init,
372MACHINE_END