[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-davinci / devices.c

/*
 * mach-davinci/devices.c
 *
 * DaVinci platform device setup/initialization
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/io.h>
#include <linux/reboot.h>

#include <mach/hardware.h>
#include <linux/platform_data/i2c-davinci.h>
#include <mach/irqs.h>
#include <mach/cputype.h>
#include <mach/mux.h>
#include <linux/platform_data/mmc-davinci.h>
#include <mach/time.h>
#include <linux/platform_data/edma.h>


#include "davinci.h"
#include "clock.h"

#define DAVINCI_I2C_BASE	     0x01C21000
#define DAVINCI_ATA_BASE	     0x01C66000
#define DAVINCI_MMCSD0_BASE	     0x01E10000
#define DM355_MMCSD0_BASE	     0x01E11000
#define DM355_MMCSD1_BASE	     0x01E00000
#define DM365_MMCSD0_BASE	     0x01D11000
#define DM365_MMCSD1_BASE	     0x01D00000

void __iomem  *davinci_sysmod_base;

void davinci_map_sysmod(void)
{
	davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE,
					      0x800);
	/*
	 * Throw a bug since a lot of board initialization code depends
	 * on system module availability. ioremap() failing this early
	 * need careful looking into anyway.
	 */
	BUG_ON(!davinci_sysmod_base);
}

static struct resource i2c_resources[] = {
	{
		.start		= DAVINCI_I2C_BASE,
		.end		= DAVINCI_I2C_BASE + 0x40,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= IRQ_I2C,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct platform_device davinci_i2c_device = {
	.name           = "i2c_davinci",
	.id             = 1,
	.num_resources	= ARRAY_SIZE(i2c_resources),
	.resource	= i2c_resources,
};

void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
{
	if (cpu_is_davinci_dm644x())
		davinci_cfg_reg(DM644X_I2C);

	davinci_i2c_device.dev.platform_data = pdata;
	(void) platform_device_register(&davinci_i2c_device);
}

static struct resource ide_resources[] = {
	{
		.start		= DAVINCI_ATA_BASE,
		.end		= DAVINCI_ATA_BASE + 0x7ff,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= IRQ_IDE,
		.end		= IRQ_IDE,
		.flags		= IORESOURCE_IRQ,
	},
};

static u64 ide_dma_mask = DMA_BIT_MASK(32);

static struct platform_device ide_device = {
	.name           = "palm_bk3710",
	.id             = -1,
	.resource       = ide_resources,
	.num_resources  = ARRAY_SIZE(ide_resources),
	.dev = {
		.dma_mask		= &ide_dma_mask,
		.coherent_dma_mask      = DMA_BIT_MASK(32),
	},
};

void __init davinci_init_ide(void)
{
	if (cpu_is_davinci_dm644x()) {
		davinci_cfg_reg(DM644X_HPIEN_DISABLE);
		davinci_cfg_reg(DM644X_ATAEN);
		davinci_cfg_reg(DM644X_HDIREN);
	} else if (cpu_is_davinci_dm646x()) {
		/* IRQ_DM646X_IDE is the same as IRQ_IDE */
		davinci_cfg_reg(DM646X_ATAEN);
	} else {
		WARN_ON(1);
		return;
	}

	platform_device_register(&ide_device);
}

#if IS_ENABLED(CONFIG_MMC_DAVINCI)

static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);

static struct resource mmcsd0_resources[] = {
	{
		/* different on dm355 */
		.start = DAVINCI_MMCSD0_BASE,
		.end   = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
		.flags = IORESOURCE_MEM,
	},
	/* IRQs:  MMC/SD, then SDIO */
	{
		.start = IRQ_MMCINT,
		.flags = IORESOURCE_IRQ,
	}, {
		/* different on dm355 */
		.start = IRQ_SDIOINT,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device davinci_mmcsd0_device = {
	.name = "dm6441-mmc",
	.id = 0,
	.dev = {
		.dma_mask = &mmcsd0_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.num_resources = ARRAY_SIZE(mmcsd0_resources),
	.resource = mmcsd0_resources,
};

static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);

static struct resource mmcsd1_resources[] = {
	{
		.start = DM355_MMCSD1_BASE,
		.end   = DM355_MMCSD1_BASE + SZ_4K - 1,
		.flags = IORESOURCE_MEM,
	},
	/* IRQs:  MMC/SD, then SDIO */
	{
		.start = IRQ_DM355_MMCINT1,
		.flags = IORESOURCE_IRQ,
	}, {
		.start = IRQ_DM355_SDIOINT1,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device davinci_mmcsd1_device = {
	.name = "dm6441-mmc",
	.id = 1,
	.dev = {
		.dma_mask = &mmcsd1_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.num_resources = ARRAY_SIZE(mmcsd1_resources),
	.resource = mmcsd1_resources,
};


void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
{
	struct platform_device	*pdev = NULL;

	if (WARN_ON(cpu_is_davinci_dm646x()))
		return;

	/* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
	 * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
	 *
	 * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
	 * not handled right here ...
	 */
	switch (module) {
	case 1:
		if (cpu_is_davinci_dm355()) {
			/* REVISIT we may not need all these pins if e.g. this
			 * is a hard-wired SDIO device...
			 */
			davinci_cfg_reg(DM355_SD1_CMD);
			davinci_cfg_reg(DM355_SD1_CLK);
			davinci_cfg_reg(DM355_SD1_DATA0);
			davinci_cfg_reg(DM355_SD1_DATA1);
			davinci_cfg_reg(DM355_SD1_DATA2);
			davinci_cfg_reg(DM355_SD1_DATA3);
		} else if (cpu_is_davinci_dm365()) {
			/* Configure pull down control */
			unsigned v;

			v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
			__raw_writel(v & ~0xfc0,
					DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));

			mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
			mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
							SZ_4K - 1;
			mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
			davinci_mmcsd1_device.name = "da830-mmc";
		} else
			break;

		pdev = &davinci_mmcsd1_device;
		break;
	case 0:
		if (cpu_is_davinci_dm355()) {
			mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
			mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
			mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;

			/* expose all 6 MMC0 signals:  CLK, CMD, DATA[0..3] */
			davinci_cfg_reg(DM355_MMCSD0);

			/* enable RX EDMA */
			davinci_cfg_reg(DM355_EVT26_MMC0_RX);
		} else if (cpu_is_davinci_dm365()) {
			mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
			mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
							SZ_4K - 1;
			mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
			davinci_mmcsd0_device.name = "da830-mmc";
		} else if (cpu_is_davinci_dm644x()) {
			/* REVISIT: should this be in board-init code? */
			/* Power-on 3.3V IO cells */
			__raw_writel(0,
				DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
			/*Set up the pull regiter for MMC */
			davinci_cfg_reg(DM644X_MSTK);
		}

		pdev = &davinci_mmcsd0_device;
		break;
	}

	if (WARN_ON(!pdev))
		return;

	pdev->dev.platform_data = config;
	platform_device_register(pdev);
}

#else

void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
{
}

#endif

/*-------------------------------------------------------------------------*/

static struct resource wdt_resources[] = {
	{
		.start	= DAVINCI_WDOG_BASE,
		.end	= DAVINCI_WDOG_BASE + SZ_1K - 1,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device davinci_wdt_device = {
	.name		= "davinci-wdt",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(wdt_resources),
	.resource	= wdt_resources,
};

void davinci_restart(enum reboot_mode mode, const char *cmd)
{
	davinci_watchdog_reset(&davinci_wdt_device);
}

int davinci_init_wdt(void)
{
	return platform_device_register(&davinci_wdt_device);
}

static struct platform_device davinci_gpio_device = {
	.name	= "davinci_gpio",
	.id	= -1,
};

int davinci_gpio_register(struct resource *res, int size, void *pdata)
{
	davinci_gpio_device.resource = res;
	davinci_gpio_device.num_resources = size;
	davinci_gpio_device.dev.platform_data = pdata;
	return platform_device_register(&davinci_gpio_device);
}

/*-------------------------------------------------------------------------*/

/*-------------------------------------------------------------------------*/

struct davinci_timer_instance davinci_timer_instance[2] = {
	{
		.base		= DAVINCI_TIMER0_BASE,
		.bottom_irq	= IRQ_TINT0_TINT12,
		.top_irq	= IRQ_TINT0_TINT34,
	},
	{
		.base		= DAVINCI_TIMER1_BASE,
		.bottom_irq	= IRQ_TINT1_TINT12,
		.top_irq	= IRQ_TINT1_TINT34,
	},
};
Commit	Line	Data
d395e6ad KS	1	/*
	2	* mach-davinci/devices.c
	3	*
	4	* DaVinci platform device setup/initialization
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
d395e6ad KS	12	#include <linux/init.h>
	13	#include <linux/platform_device.h>
	14	#include <linux/dma-mapping.h>
	15	#include <linux/io.h>
7b6d864b	16	#include <linux/reboot.h>
d395e6ad	17
d395e6ad	18	#include <mach/hardware.h>
ec2a0833	19	#include <linux/platform_data/i2c-davinci.h>
80b02c17	20	#include <mach/irqs.h>
5526b3f7 KH	21	#include <mach/cputype.h>
5526b3f7 KH	22	#include <mach/mux.h>
ec2a0833	23	#include <linux/platform_data/mmc-davinci.h>
f64691b3	24	#include <mach/time.h>
3ad7a42d MP	25	#include <linux/platform_data/edma.h>
3ad7a42d MP	26
d395e6ad	27
5cfb19ac	28	#include "davinci.h"
28552c2e KH	29	#include "clock.h"
28552c2e KH	30
f5c122da	31	#define DAVINCI_I2C_BASE 0x01C21000
7a9978a1	32	#define DAVINCI_ATA_BASE 0x01C66000
2dbf56ae KH	33	#define DAVINCI_MMCSD0_BASE 0x01E10000
	34	#define DM355_MMCSD0_BASE 0x01E11000
	35	#define DM355_MMCSD1_BASE 0x01E00000
19ff3bf2 SP	36	#define DM365_MMCSD0_BASE 0x01D11000
19ff3bf2 SP	37	#define DM365_MMCSD1_BASE 0x01D00000
f5c122da	38
5cfb19ac MH	39	void __iomem *davinci_sysmod_base;
	40
	41	void davinci_map_sysmod(void)
	42	{
	43	davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE,
	44	0x800);
	45	/*
	46	* Throw a bug since a lot of board initialization code depends
	47	* on system module availability. ioremap() failing this early
	48	* need careful looking into anyway.
	49	*/
	50	BUG_ON(!davinci_sysmod_base);
	51	}
1a717c00	52
d395e6ad KS	53	static struct resource i2c_resources[] = {
	54	{
	55	.start = DAVINCI_I2C_BASE,
	56	.end = DAVINCI_I2C_BASE + 0x40,
	57	.flags = IORESOURCE_MEM,
	58	},
	59	{
	60	.start = IRQ_I2C,
	61	.flags = IORESOURCE_IRQ,
	62	},
	63	};
	64
	65	static struct platform_device davinci_i2c_device = {
	66	.name = "i2c_davinci",
	67	.id = 1,
	68	.num_resources = ARRAY_SIZE(i2c_resources),
	69	.resource = i2c_resources,
	70	};
	71
	72	void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
	73	{
5526b3f7 KH	74	if (cpu_is_davinci_dm644x())
	75	davinci_cfg_reg(DM644X_I2C);
	76
d395e6ad KS	77	davinci_i2c_device.dev.platform_data = pdata;
	78	(void) platform_device_register(&davinci_i2c_device);
	79	}
	80
7a9978a1 SS	81	static struct resource ide_resources[] = {
	82	{
	83	.start = DAVINCI_ATA_BASE,
	84	.end = DAVINCI_ATA_BASE + 0x7ff,
	85	.flags = IORESOURCE_MEM,
	86	},
	87	{
	88	.start = IRQ_IDE,
	89	.end = IRQ_IDE,
	90	.flags = IORESOURCE_IRQ,
	91	},
	92	};
	93
	94	static u64 ide_dma_mask = DMA_BIT_MASK(32);
	95
	96	static struct platform_device ide_device = {
	97	.name = "palm_bk3710",
	98	.id = -1,
	99	.resource = ide_resources,
	100	.num_resources = ARRAY_SIZE(ide_resources),
	101	.dev = {
	102	.dma_mask = &ide_dma_mask,
	103	.coherent_dma_mask = DMA_BIT_MASK(32),
	104	},
	105	};
	106
	107	void __init davinci_init_ide(void)
	108	{
	109	if (cpu_is_davinci_dm644x()) {
	110	davinci_cfg_reg(DM644X_HPIEN_DISABLE);
	111	davinci_cfg_reg(DM644X_ATAEN);
	112	davinci_cfg_reg(DM644X_HDIREN);
	113	} else if (cpu_is_davinci_dm646x()) {
	114	/* IRQ_DM646X_IDE is the same as IRQ_IDE */
	115	davinci_cfg_reg(DM646X_ATAEN);
	116	} else {
	117	WARN_ON(1);
	118	return;
	119	}
	120
	121	platform_device_register(&ide_device);
	122	}
	123
a0a56db9	124	#if IS_ENABLED(CONFIG_MMC_DAVINCI)
2dbf56ae	125
b0958aed	126	static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
2dbf56ae KH	127
	128	static struct resource mmcsd0_resources[] = {
	129	{
	130	/* different on dm355 */
	131	.start = DAVINCI_MMCSD0_BASE,
	132	.end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
	133	.flags = IORESOURCE_MEM,
	134	},
	135	/* IRQs: MMC/SD, then SDIO */
	136	{
	137	.start = IRQ_MMCINT,
	138	.flags = IORESOURCE_IRQ,
	139	}, {
	140	/* different on dm355 */
	141	.start = IRQ_SDIOINT,
	142	.flags = IORESOURCE_IRQ,
	143	},
2dbf56ae KH	144	};
	145
	146	static struct platform_device davinci_mmcsd0_device = {
d7ca4c75	147	.name = "dm6441-mmc",
2dbf56ae KH	148	.id = 0,
	149	.dev = {
	150	.dma_mask = &mmcsd0_dma_mask,
b0958aed	151	.coherent_dma_mask = DMA_BIT_MASK(32),
2dbf56ae KH	152	},
	153	.num_resources = ARRAY_SIZE(mmcsd0_resources),
	154	.resource = mmcsd0_resources,
	155	};
	156
b0958aed	157	static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
2dbf56ae KH	158
	159	static struct resource mmcsd1_resources[] = {
	160	{
	161	.start = DM355_MMCSD1_BASE,
	162	.end = DM355_MMCSD1_BASE + SZ_4K - 1,
	163	.flags = IORESOURCE_MEM,
	164	},
	165	/* IRQs: MMC/SD, then SDIO */
	166	{
	167	.start = IRQ_DM355_MMCINT1,
	168	.flags = IORESOURCE_IRQ,
	169	}, {
	170	.start = IRQ_DM355_SDIOINT1,
	171	.flags = IORESOURCE_IRQ,
	172	},
2dbf56ae KH	173	};
	174
	175	static struct platform_device davinci_mmcsd1_device = {
d7ca4c75	176	.name = "dm6441-mmc",
2dbf56ae KH	177	.id = 1,
	178	.dev = {
	179	.dma_mask = &mmcsd1_dma_mask,
b0958aed	180	.coherent_dma_mask = DMA_BIT_MASK(32),
2dbf56ae KH	181	},
	182	.num_resources = ARRAY_SIZE(mmcsd1_resources),
	183	.resource = mmcsd1_resources,
	184	};
	185
	186
	187	void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
	188	{
	189	struct platform_device *pdev = NULL;
	190
	191	if (WARN_ON(cpu_is_davinci_dm646x()))
	192	return;
	193
	194	/* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
	195	* for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
	196	*
	197	* FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
	198	* not handled right here ...
	199	*/
	200	switch (module) {
	201	case 1:
19ff3bf2 SP	202	if (cpu_is_davinci_dm355()) {
	203	/* REVISIT we may not need all these pins if e.g. this
	204	* is a hard-wired SDIO device...
	205	*/
	206	davinci_cfg_reg(DM355_SD1_CMD);
	207	davinci_cfg_reg(DM355_SD1_CLK);
	208	davinci_cfg_reg(DM355_SD1_DATA0);
	209	davinci_cfg_reg(DM355_SD1_DATA1);
	210	davinci_cfg_reg(DM355_SD1_DATA2);
	211	davinci_cfg_reg(DM355_SD1_DATA3);
	212	} else if (cpu_is_davinci_dm365()) {
19ff3bf2	213	/* Configure pull down control */
5cfb19ac MH	214	unsigned v;
	215
	216	v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
	217	__raw_writel(v & ~0xfc0,
	218	DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
19ff3bf2 SP	219
	220	mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
	221	mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
	222	SZ_4K - 1;
eb5ba378	223	mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
d7ca4c75	224	davinci_mmcsd1_device.name = "da830-mmc";
19ff3bf2	225	} else
2dbf56ae KH	226	break;
2dbf56ae KH	227
2dbf56ae KH	228	pdev = &davinci_mmcsd1_device;
	229	break;
	230	case 0:
	231	if (cpu_is_davinci_dm355()) {
	232	mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
	233	mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
	234	mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
	235
	236	/* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
	237	davinci_cfg_reg(DM355_MMCSD0);
	238
	239	/* enable RX EDMA */
	240	davinci_cfg_reg(DM355_EVT26_MMC0_RX);
19ff3bf2 SP	241	} else if (cpu_is_davinci_dm365()) {
	242	mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
	243	mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
	244	SZ_4K - 1;
	245	mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
d7ca4c75	246	davinci_mmcsd0_device.name = "da830-mmc";
19ff3bf2	247	} else if (cpu_is_davinci_dm644x()) {
2dbf56ae	248	/* REVISIT: should this be in board-init code? */
2dbf56ae	249	/* Power-on 3.3V IO cells */
5cfb19ac MH	250	__raw_writel(0,
5cfb19ac MH	251	DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
2dbf56ae KH	252	/Set up the pull regiter for MMC /
	253	davinci_cfg_reg(DM644X_MSTK);
	254	}
	255
	256	pdev = &davinci_mmcsd0_device;
	257	break;
	258	}
	259
	260	if (WARN_ON(!pdev))
	261	return;
	262
	263	pdev->dev.platform_data = config;
	264	platform_device_register(pdev);
	265	}
	266
	267	#else
	268
	269	void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
	270	{
	271	}
	272
	273	#endif
	274
fb631387 KH	275	/-------------------------------------------------------------------------/
	276
	277	static struct resource wdt_resources[] = {
	278	{
5fcd294d KH	279	.start = DAVINCI_WDOG_BASE,
5fcd294d KH	280	.end = DAVINCI_WDOG_BASE + SZ_1K - 1,
fb631387 KH	281	.flags = IORESOURCE_MEM,
	282	},
	283	};
	284
	285	struct platform_device davinci_wdt_device = {
84374812	286	.name = "davinci-wdt",
fb631387 KH	287	.id = -1,
	288	.num_resources = ARRAY_SIZE(wdt_resources),
	289	.resource = wdt_resources,
	290	};
	291
7b6d864b	292	void davinci_restart(enum reboot_mode mode, const char *cmd)
c6121ddd SN	293	{
	294	davinci_watchdog_reset(&davinci_wdt_device);
	295	}
	296
1233090c	297	int davinci_init_wdt(void)
fb631387	298	{
1233090c	299	return platform_device_register(&davinci_wdt_device);
fb631387 KH	300	}
fb631387 KH	301
9cc1515c PA	302	static struct platform_device davinci_gpio_device = {
	303	.name = "davinci_gpio",
	304	.id = -1,
	305	};
	306
	307	int davinci_gpio_register(struct resource res, int size, void pdata)
	308	{
	309	davinci_gpio_device.resource = res;
	310	davinci_gpio_device.num_resources = size;
	311	davinci_gpio_device.dev.platform_data = pdata;
	312	return platform_device_register(&davinci_gpio_device);
	313	}
	314
fb631387 KH	315	/-------------------------------------------------------------------------/
fb631387 KH	316
f0fba2ad LG	317	/-------------------------------------------------------------------------/
f0fba2ad LG	318
f64691b3 MG	319	struct davinci_timer_instance davinci_timer_instance[2] = {
f64691b3 MG	320	{
1bcd38ad	321	.base = DAVINCI_TIMER0_BASE,
f64691b3 MG	322	.bottom_irq = IRQ_TINT0_TINT12,
	323	.top_irq = IRQ_TINT0_TINT34,
	324	},
	325	{
1bcd38ad	326	.base = DAVINCI_TIMER1_BASE,
f64691b3 MG	327	.bottom_irq = IRQ_TINT1_TINT12,
	328	.top_irq = IRQ_TINT1_TINT34,
	329	},
	330	};
	331