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Merge tag 'at91-ab-4.13-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/abellon...
[mirror_ubuntu-bionic-kernel.git] / arch / arm / mach-davinci / include / mach / da8xx.h
CommitLineData
55c79a40
MG		 1/*
2 * Chip specific defines for DA8XX/OMAP L1XX SoC
3 *
4 * Author: Mark A. Greer <mgreer@mvista.com>
5 *
75392dd3 6 * 2007, 2009-2010 (c) MontaVista Software, Inc. This file is licensed under
55c79a40
MG		 7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#ifndef __ASM_ARCH_DAVINCI_DA8XX_H
12#define __ASM_ARCH_DAVINCI_DA8XX_H
13
b9e6342b
MG		 14#include <video/da8xx-fb.h>
15
75392dd3 16#include <linux/platform_device.h>
8ee2bf9a 17#include <linux/davinci_emac.h>
54ce6883 18#include <linux/spi/spi.h>
896f66b7 19#include <linux/platform_data/davinci_asp.h>
7b6d864b 20#include <linux/reboot.h>
154d54a8 21#include <linux/videodev2.h>
75392dd3 22
55c79a40 23#include <mach/serial.h>
044ca015 24#include <mach/pm.h>
3ad7a42d 25#include <linux/platform_data/edma.h>
ec2a0833
AB		 26#include <linux/platform_data/i2c-davinci.h>
27#include <linux/platform_data/mmc-davinci.h>
28#include <linux/platform_data/usb-davinci.h>
29#include <linux/platform_data/spi-davinci.h>
8e0d72d2 30#include <linux/platform_data/uio_pruss.h>
55c79a40 31
154d54a8
MH		 32#include <media/davinci/vpif_types.h>
33
d2de0582
SN		 34extern void __iomem *da8xx_syscfg0_base;
35extern void __iomem *da8xx_syscfg1_base;
6a28adef 36
39e14550
SN		 37/*
38 * If the DA850/OMAP-L138/AM18x SoC on board is of a higher speed grade
6a53bc75 39 * (than the regular 300MHz variant), the board code should set this up
39e14550
SN		 40 * with the supported speed before calling da850_register_cpufreq().
41 */
42extern unsigned int da850_max_speed;
43
55c79a40
MG		 44/*
45 * The cp_intc interrupt controller for the da8xx isn't in the same
46 * chunk of physical memory space as the other registers (like it is
47 * on the davincis) so it needs to be mapped separately. It will be
48 * mapped early on when the I/O space is mapped and we'll put it just
49 * before the I/O space in the processor's virtual memory space.
50 */
51#define DA8XX_CP_INTC_BASE 0xfffee000
52#define DA8XX_CP_INTC_SIZE SZ_8K
53#define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K)
54
d2de0582
SN		 55#define DA8XX_SYSCFG0_BASE (IO_PHYS + 0x14000)
56#define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x))
cd874448 57#define DA8XX_JTAG_ID_REG 0x18
5c71d618
RT		 58#define DA8XX_HOST1CFG_REG 0x44
59#define DA8XX_CHIPSIG_REG 0x174
683b1e1f 60#define DA8XX_CFGCHIP0_REG 0x17c
bb170e61 61#define DA8XX_CFGCHIP1_REG 0x180
371b53e0 62#define DA8XX_CFGCHIP2_REG 0x184
5d36a332 63#define DA8XX_CFGCHIP3_REG 0x188
0fcd5411 64#define DA8XX_CFGCHIP4_REG 0x18c
55c79a40 65
d2de0582
SN		 66#define DA8XX_SYSCFG1_BASE (IO_PHYS + 0x22C000)
67#define DA8XX_SYSCFG1_VIRT(x) (da8xx_syscfg1_base + (x))
044ca015 68#define DA8XX_DEEPSLEEP_REG 0x8
cbb2c961 69#define DA8XX_PWRDN_REG 0x18
d2de0582 70
bea238f6
RS		 71#define DA8XX_PSC0_BASE 0x01c10000
72#define DA8XX_PLL0_BASE 0x01c11000
bea238f6
RS		 73#define DA8XX_TIMER64P0_BASE 0x01c20000
74#define DA8XX_TIMER64P1_BASE 0x01c21000
154d54a8 75#define DA8XX_VPIF_BASE 0x01e17000
bea238f6
RS		 76#define DA8XX_GPIO_BASE 0x01e26000
77#define DA8XX_PSC1_BASE 0x01e27000
14ff86bc
SA		 78
79#define DA8XX_DSP_L2_RAM_BASE 0x11800000
80#define DA8XX_DSP_L1P_RAM_BASE (DA8XX_DSP_L2_RAM_BASE + 0x600000)
81#define DA8XX_DSP_L1D_RAM_BASE (DA8XX_DSP_L2_RAM_BASE + 0x700000)
82
7c5ec609 83#define DA8XX_AEMIF_CS2_BASE 0x60000000
38beb929
SR		 84#define DA8XX_AEMIF_CS3_BASE 0x62000000
85#define DA8XX_AEMIF_CTL_BASE 0x68000000
c94472d4 86#define DA8XX_SHARED_RAM_BASE 0x80000000
60cd02e1 87#define DA8XX_ARM_RAM_BASE 0xffff0000
bea238f6 88
b464e3cb
LP		 89void da830_init(void);
90void da850_init(void);
55c79a40 91
a941c503
RS		 92int da830_register_edma(struct edma_rsv_info *rsv);
93int da850_register_edma(struct edma_rsv_info *rsv[2]);
55c79a40 94int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata);
0273612c 95int da8xx_register_spi_bus(int instance, unsigned num_chipselect);
55c79a40 96int da8xx_register_watchdog(void);
9b504750 97int da8xx_register_usb_phy(void);
b0ea26e1 98int da8xx_register_usb20(unsigned mA, unsigned potpgt);
e5d3d252 99int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
0004b02a
DL		 100int da8xx_register_usb_refclkin(int rate);
101int da8xx_register_usb20_phy_clk(bool use_usb_refclkin);
102int da8xx_register_usb11_phy_clk(bool use_usb_refclkin);
00bacfbf 103int da850_register_sata_refclk(int rate);
55c79a40 104int da8xx_register_emac(void);
8e0d72d2 105int da8xx_register_uio_pruss(void);
b9e6342b 106int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata);
700691f2 107int da8xx_register_mmcsd0(struct davinci_mmc_config *config);
b8241aef 108int da850_register_mmcsd1(struct davinci_mmc_config *config);
b464e3cb 109void da8xx_register_mcasp(int id, struct snd_platform_data *pdata);
c51df70b 110int da8xx_register_rtc(void);
f606d38d 111int da8xx_register_gpio(void *pdata);
b987c4b2 112int da850_register_cpufreq(char *async_clk);
1960e693 113int da8xx_register_cpuidle(void);
b464e3cb 114void __iomem *da8xx_get_mem_ctlr(void);
b464e3cb
LP		 115int da850_register_sata(unsigned long refclkpn);
116int da850_register_vpif(void);
117int da850_register_vpif_display
154d54a8 118 (struct vpif_display_config *display_config);
b464e3cb 119int da850_register_vpif_capture
154d54a8 120 (struct vpif_capture_config *capture_config);
7b6d864b 121void da8xx_restart(enum reboot_mode mode, const char *cmd);
5c71d618
RT		 122void da8xx_rproc_reserve_cma(void);
123int da8xx_register_rproc(void);
f606d38d
KS		 124int da850_register_gpio(void);
125int da830_register_gpio(void);
0fcd5411 126int da8xx_register_cfgchip(void);
55c79a40 127
19955c3d 128extern struct platform_device da8xx_serial_device[];
55c79a40 129extern struct emac_platform_data da8xx_emac_pdata;
b9e6342b
MG		 130extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata;
131extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata;
55c79a40 132
c78a5bc2 133
55c79a40
MG		 134extern const short da830_emif25_pins[];
135extern const short da830_spi0_pins[];
136extern const short da830_spi1_pins[];
137extern const short da830_mmc_sd_pins[];
138extern const short da830_uart0_pins[];
139extern const short da830_uart1_pins[];
140extern const short da830_uart2_pins[];
141extern const short da830_usb20_pins[];
142extern const short da830_usb11_pins[];
143extern const short da830_uhpi_pins[];
144extern const short da830_cpgmac_pins[];
145extern const short da830_emif3c_pins[];
146extern const short da830_mcasp0_pins[];
147extern const short da830_mcasp1_pins[];
148extern const short da830_mcasp2_pins[];
149extern const short da830_i2c0_pins[];
150extern const short da830_i2c1_pins[];
151extern const short da830_lcdcntl_pins[];
152extern const short da830_pwm_pins[];
153extern const short da830_ecap0_pins[];
154extern const short da830_ecap1_pins[];
155extern const short da830_ecap2_pins[];
156extern const short da830_eqep0_pins[];
157extern const short da830_eqep1_pins[];
154d54a8
MH		 158extern const short da850_vpif_capture_pins[];
159extern const short da850_vpif_display_pins[];
55c79a40 160
e1a8d7e2
SR		 161extern const short da850_i2c0_pins[];
162extern const short da850_i2c1_pins[];
5cbdf276 163extern const short da850_lcdcntl_pins[];
e1a8d7e2 164
55c79a40 165#endif /* __ASM_ARCH_DAVINCI_DA8XX_H */
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