[mirror_ubuntu-bionic-kernel.git] / arch / arm / mach-davinci / include / mach / irqs.h

/*
 * DaVinci interrupt controller definitions
 *
 *  Copyright (C) 2006 Texas Instruments.
 *
 *  This program is free software; you can redistribute  it and/or modify it
 *  under  the terms of  the GNU General  Public License as published by the
 *  Free Software Foundation;  either version 2 of the  License, or (at your
 *  option) any later version.
 *
 *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
 *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
 *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
 *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
 *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *  You should have received a copy of the  GNU General Public License along
 *  with this program; if not, write  to the Free Software Foundation, Inc.,
 *  675 Mass Ave, Cambridge, MA 02139, USA.
 *
 */
#ifndef __ASM_ARCH_IRQS_H
#define __ASM_ARCH_IRQS_H

/* Base address */
#define DAVINCI_ARM_INTC_BASE 0x01C48000

/* Interrupt lines */
#define IRQ_VDINT0       0
#define IRQ_VDINT1       1
#define IRQ_VDINT2       2
#define IRQ_HISTINT      3
#define IRQ_H3AINT       4
#define IRQ_PRVUINT      5
#define IRQ_RSZINT       6
#define IRQ_VFOCINT      7
#define IRQ_VENCINT      8
#define IRQ_ASQINT       9
#define IRQ_IMXINT       10
#define IRQ_VLCDINT      11
#define IRQ_USBINT       12
#define IRQ_EMACINT      13

#define IRQ_CCINT0       16
#define IRQ_CCERRINT     17
#define IRQ_TCERRINT0    18
#define IRQ_TCERRINT     19
#define IRQ_PSCIN        20

#define IRQ_IDE          22
#define IRQ_HPIINT       23
#define IRQ_MBXINT       24
#define IRQ_MBRINT       25
#define IRQ_MMCINT       26
#define IRQ_SDIOINT      27
#define IRQ_MSINT        28
#define IRQ_DDRINT       29
#define IRQ_AEMIFINT     30
#define IRQ_VLQINT       31
#define IRQ_TINT0_TINT12 32
#define IRQ_TINT0_TINT34 33
#define IRQ_TINT1_TINT12 34
#define IRQ_TINT1_TINT34 35
#define IRQ_PWMINT0      36
#define IRQ_PWMINT1      37
#define IRQ_PWMINT2      38
#define IRQ_I2C          39
#define IRQ_UARTINT0     40
#define IRQ_UARTINT1     41
#define IRQ_UARTINT2     42
#define IRQ_SPINT0       43
#define IRQ_SPINT1       44

#define IRQ_DSP2ARM0     46
#define IRQ_DSP2ARM1     47
#define IRQ_GPIO0        48
#define IRQ_GPIO1        49
#define IRQ_GPIO2        50
#define IRQ_GPIO3        51
#define IRQ_GPIO4        52
#define IRQ_GPIO5        53
#define IRQ_GPIO6        54
#define IRQ_GPIO7        55
#define IRQ_GPIOBNK0     56
#define IRQ_GPIOBNK1     57
#define IRQ_GPIOBNK2     58
#define IRQ_GPIOBNK3     59
#define IRQ_GPIOBNK4     60
#define IRQ_COMMTX       61
#define IRQ_COMMRX       62
#define IRQ_EMUINT       63

#define DAVINCI_N_AINTC_IRQ	64
#define DAVINCI_N_GPIO		104

#define NR_IRQS			(DAVINCI_N_AINTC_IRQ + DAVINCI_N_GPIO)

#define ARCH_TIMER_IRQ IRQ_TINT1_TINT34

/* DaVinci DM6467-specific Interrupts */
#define IRQ_DM646X_VP_VERTINT0  0
#define IRQ_DM646X_VP_VERTINT1  1
#define IRQ_DM646X_VP_VERTINT2  2
#define IRQ_DM646X_VP_VERTINT3  3
#define IRQ_DM646X_VP_ERRINT    4
#define IRQ_DM646X_RESERVED_1   5
#define IRQ_DM646X_RESERVED_2   6
#define IRQ_DM646X_WDINT        7
#define IRQ_DM646X_CRGENINT0    8
#define IRQ_DM646X_CRGENINT1    9
#define IRQ_DM646X_TSIFINT0     10
#define IRQ_DM646X_TSIFINT1     11
#define IRQ_DM646X_VDCEINT      12
#define IRQ_DM646X_USBINT       13
#define IRQ_DM646X_USBDMAINT    14
#define IRQ_DM646X_PCIINT       15
#define IRQ_DM646X_TCERRINT2    20
#define IRQ_DM646X_TCERRINT3    21
#define IRQ_DM646X_IDE          22
#define IRQ_DM646X_HPIINT       23
#define IRQ_DM646X_EMACRXTHINT  24
#define IRQ_DM646X_EMACRXINT    25
#define IRQ_DM646X_EMACTXINT    26
#define IRQ_DM646X_EMACMISCINT  27
#define IRQ_DM646X_MCASP0TXINT  28
#define IRQ_DM646X_MCASP0RXINT  29
#define IRQ_DM646X_RESERVED_3   31
#define IRQ_DM646X_MCASP1TXINT  32
#define IRQ_DM646X_VLQINT       38
#define IRQ_DM646X_UARTINT2     42
#define IRQ_DM646X_SPINT0       43
#define IRQ_DM646X_SPINT1       44
#define IRQ_DM646X_DSP2ARMINT   45
#define IRQ_DM646X_RESERVED_4   46
#define IRQ_DM646X_PSCINT       47
#define IRQ_DM646X_GPIO0        48
#define IRQ_DM646X_GPIO1        49
#define IRQ_DM646X_GPIO2        50
#define IRQ_DM646X_GPIO3        51
#define IRQ_DM646X_GPIO4        52
#define IRQ_DM646X_GPIO5        53
#define IRQ_DM646X_GPIO6        54
#define IRQ_DM646X_GPIO7        55
#define IRQ_DM646X_GPIOBNK0     56
#define IRQ_DM646X_GPIOBNK1     57
#define IRQ_DM646X_GPIOBNK2     58
#define IRQ_DM646X_DDRINT       59
#define IRQ_DM646X_AEMIFINT     60

/* DaVinci DM355-specific Interrupts */
#define IRQ_DM355_CCDC_VDINT0	0
#define IRQ_DM355_CCDC_VDINT1	1
#define IRQ_DM355_CCDC_VDINT2	2
#define IRQ_DM355_IPIPE_HST	3
#define IRQ_DM355_H3AINT	4
#define IRQ_DM355_IPIPE_SDR	5
#define IRQ_DM355_IPIPEIFINT	6
#define IRQ_DM355_OSDINT	7
#define IRQ_DM355_VENCINT	8
#define IRQ_DM355_IMCOPINT	11
#define IRQ_DM355_RTOINT	13
#define IRQ_DM355_TINT4		13
#define IRQ_DM355_TINT2_TINT12	13
#define IRQ_DM355_UARTINT2	14
#define IRQ_DM355_TINT5		14
#define IRQ_DM355_TINT2_TINT34	14
#define IRQ_DM355_TINT6		15
#define IRQ_DM355_TINT3_TINT12	15
#define IRQ_DM355_SPINT1_0	17
#define IRQ_DM355_SPINT1_1	18
#define IRQ_DM355_SPINT2_0	19
#define IRQ_DM355_SPINT2_1	21
#define IRQ_DM355_TINT7		22
#define IRQ_DM355_TINT3_TINT34	22
#define IRQ_DM355_SDIOINT0	23
#define IRQ_DM355_MMCINT0	26
#define IRQ_DM355_MSINT		26
#define IRQ_DM355_MMCINT1	27
#define IRQ_DM355_PWMINT3	28
#define IRQ_DM355_SDIOINT1	31
#define IRQ_DM355_SPINT0_0	42
#define IRQ_DM355_SPINT0_1	43
#define IRQ_DM355_GPIO0		44
#define IRQ_DM355_GPIO1		45
#define IRQ_DM355_GPIO2		46
#define IRQ_DM355_GPIO3		47
#define IRQ_DM355_GPIO4		48
#define IRQ_DM355_GPIO5		49
#define IRQ_DM355_GPIO6		50
#define IRQ_DM355_GPIO7		51
#define IRQ_DM355_GPIO8		52
#define IRQ_DM355_GPIO9		53
#define IRQ_DM355_GPIOBNK0	54
#define IRQ_DM355_GPIOBNK1	55
#define IRQ_DM355_GPIOBNK2	56
#define IRQ_DM355_GPIOBNK3	57
#define IRQ_DM355_GPIOBNK4	58
#define IRQ_DM355_GPIOBNK5	59
#define IRQ_DM355_GPIOBNK6	60

#endif /* __ASM_ARCH_IRQS_H */
Commit	Line	Data
7c6337e2 KH	1	/*
	2	* DaVinci interrupt controller definitions
	3	*
	4	* Copyright (C) 2006 Texas Instruments.
	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of the GNU General Public License as published by the
	8	* Free Software Foundation; either version 2 of the License, or (at your
	9	* option) any later version.
	10	*
	11	* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
	12	* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
	13	* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
	14	* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
	15	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
	16	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
	17	* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
	18	* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	19	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
	20	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	21	*
	22	* You should have received a copy of the GNU General Public License along
	23	* with this program; if not, write to the Free Software Foundation, Inc.,
	24	* 675 Mass Ave, Cambridge, MA 02139, USA.
	25	*
	26	*/
	27	#ifndef __ASM_ARCH_IRQS_H
	28	#define __ASM_ARCH_IRQS_H
	29
	30	/* Base address */
	31	#define DAVINCI_ARM_INTC_BASE 0x01C48000
	32
	33	/* Interrupt lines */
	34	#define IRQ_VDINT0 0
	35	#define IRQ_VDINT1 1
	36	#define IRQ_VDINT2 2
	37	#define IRQ_HISTINT 3
	38	#define IRQ_H3AINT 4
	39	#define IRQ_PRVUINT 5
	40	#define IRQ_RSZINT 6
	41	#define IRQ_VFOCINT 7
	42	#define IRQ_VENCINT 8
	43	#define IRQ_ASQINT 9
	44	#define IRQ_IMXINT 10
	45	#define IRQ_VLCDINT 11
	46	#define IRQ_USBINT 12
	47	#define IRQ_EMACINT 13
	48
	49	#define IRQ_CCINT0 16
	50	#define IRQ_CCERRINT 17
	51	#define IRQ_TCERRINT0 18
	52	#define IRQ_TCERRINT 19
	53	#define IRQ_PSCIN 20
	54
	55	#define IRQ_IDE 22
	56	#define IRQ_HPIINT 23
	57	#define IRQ_MBXINT 24
	58	#define IRQ_MBRINT 25
	59	#define IRQ_MMCINT 26
	60	#define IRQ_SDIOINT 27
	61	#define IRQ_MSINT 28
	62	#define IRQ_DDRINT 29
	63	#define IRQ_AEMIFINT 30
	64	#define IRQ_VLQINT 31
65	#define IRQ_TINT0_TINT12 32
66	#define IRQ_TINT0_TINT34 33
67	#define IRQ_TINT1_TINT12 34
68	#define IRQ_TINT1_TINT34 35
69	#define IRQ_PWMINT0 36
70	#define IRQ_PWMINT1 37
71	#define IRQ_PWMINT2 38
72	#define IRQ_I2C 39
73	#define IRQ_UARTINT0 40
74	#define IRQ_UARTINT1 41
75	#define IRQ_UARTINT2 42
76	#define IRQ_SPINT0 43
77	#define IRQ_SPINT1 44
78
79	#define IRQ_DSP2ARM0 46
80	#define IRQ_DSP2ARM1 47
81	#define IRQ_GPIO0 48
82	#define IRQ_GPIO1 49
83	#define IRQ_GPIO2 50
84	#define IRQ_GPIO3 51
85	#define IRQ_GPIO4 52
86	#define IRQ_GPIO5 53
87	#define IRQ_GPIO6 54
88	#define IRQ_GPIO7 55
89	#define IRQ_GPIOBNK0 56
90	#define IRQ_GPIOBNK1 57
91	#define IRQ_GPIOBNK2 58
92	#define IRQ_GPIOBNK3 59
93	#define IRQ_GPIOBNK4 60
94	#define IRQ_COMMTX 61
95	#define IRQ_COMMRX 62
96	#define IRQ_EMUINT 63
97
98	#define DAVINCI_N_AINTC_IRQ 64
9e16469c	99	#define DAVINCI_N_GPIO 104
7c6337e2 KH	100
	101	#define NR_IRQS (DAVINCI_N_AINTC_IRQ + DAVINCI_N_GPIO)
	102
	103	#define ARCH_TIMER_IRQ IRQ_TINT1_TINT34
	104
9e16469c SR	105	/* DaVinci DM6467-specific Interrupts */
	106	#define IRQ_DM646X_VP_VERTINT0 0
	107	#define IRQ_DM646X_VP_VERTINT1 1
	108	#define IRQ_DM646X_VP_VERTINT2 2
	109	#define IRQ_DM646X_VP_VERTINT3 3
	110	#define IRQ_DM646X_VP_ERRINT 4
	111	#define IRQ_DM646X_RESERVED_1 5
	112	#define IRQ_DM646X_RESERVED_2 6
	113	#define IRQ_DM646X_WDINT 7
	114	#define IRQ_DM646X_CRGENINT0 8
	115	#define IRQ_DM646X_CRGENINT1 9
	116	#define IRQ_DM646X_TSIFINT0 10
	117	#define IRQ_DM646X_TSIFINT1 11
	118	#define IRQ_DM646X_VDCEINT 12
	119	#define IRQ_DM646X_USBINT 13
	120	#define IRQ_DM646X_USBDMAINT 14
	121	#define IRQ_DM646X_PCIINT 15
	122	#define IRQ_DM646X_TCERRINT2 20
	123	#define IRQ_DM646X_TCERRINT3 21
	124	#define IRQ_DM646X_IDE 22
	125	#define IRQ_DM646X_HPIINT 23
	126	#define IRQ_DM646X_EMACRXTHINT 24
	127	#define IRQ_DM646X_EMACRXINT 25
	128	#define IRQ_DM646X_EMACTXINT 26
	129	#define IRQ_DM646X_EMACMISCINT 27
	130	#define IRQ_DM646X_MCASP0TXINT 28
	131	#define IRQ_DM646X_MCASP0RXINT 29
	132	#define IRQ_DM646X_RESERVED_3 31
	133	#define IRQ_DM646X_MCASP1TXINT 32
	134	#define IRQ_DM646X_VLQINT 38
	135	#define IRQ_DM646X_UARTINT2 42
	136	#define IRQ_DM646X_SPINT0 43
	137	#define IRQ_DM646X_SPINT1 44
	138	#define IRQ_DM646X_DSP2ARMINT 45
	139	#define IRQ_DM646X_RESERVED_4 46
	140	#define IRQ_DM646X_PSCINT 47
	141	#define IRQ_DM646X_GPIO0 48
	142	#define IRQ_DM646X_GPIO1 49
	143	#define IRQ_DM646X_GPIO2 50
	144	#define IRQ_DM646X_GPIO3 51
	145	#define IRQ_DM646X_GPIO4 52
	146	#define IRQ_DM646X_GPIO5 53
	147	#define IRQ_DM646X_GPIO6 54
	148	#define IRQ_DM646X_GPIO7 55
	149	#define IRQ_DM646X_GPIOBNK0 56
	150	#define IRQ_DM646X_GPIOBNK1 57
	151	#define IRQ_DM646X_GPIOBNK2 58
	152	#define IRQ_DM646X_DDRINT 59
	153	#define IRQ_DM646X_AEMIFINT 60
	154
f9337405	155	/* DaVinci DM355-specific Interrupts */
	156	#define IRQ_DM355_CCDC_VDINT0 0
	157	#define IRQ_DM355_CCDC_VDINT1 1
	158	#define IRQ_DM355_CCDC_VDINT2 2
	159	#define IRQ_DM355_IPIPE_HST 3
	160	#define IRQ_DM355_H3AINT 4
	161	#define IRQ_DM355_IPIPE_SDR 5
	162	#define IRQ_DM355_IPIPEIFINT 6
	163	#define IRQ_DM355_OSDINT 7
	164	#define IRQ_DM355_VENCINT 8
	165	#define IRQ_DM355_IMCOPINT 11
	166	#define IRQ_DM355_RTOINT 13
	167	#define IRQ_DM355_TINT4 13
	168	#define IRQ_DM355_TINT2_TINT12 13
	169	#define IRQ_DM355_UARTINT2 14
	170	#define IRQ_DM355_TINT5 14
	171	#define IRQ_DM355_TINT2_TINT34 14
	172	#define IRQ_DM355_TINT6 15
	173	#define IRQ_DM355_TINT3_TINT12 15
	174	#define IRQ_DM355_SPINT1_0 17
	175	#define IRQ_DM355_SPINT1_1 18
	176	#define IRQ_DM355_SPINT2_0 19
	177	#define IRQ_DM355_SPINT2_1 21
	178	#define IRQ_DM355_TINT7 22
	179	#define IRQ_DM355_TINT3_TINT34 22
	180	#define IRQ_DM355_SDIOINT0 23
	181	#define IRQ_DM355_MMCINT0 26
	182	#define IRQ_DM355_MSINT 26
	183	#define IRQ_DM355_MMCINT1 27
	184	#define IRQ_DM355_PWMINT3 28
	185	#define IRQ_DM355_SDIOINT1 31
	186	#define IRQ_DM355_SPINT0_0 42
	187	#define IRQ_DM355_SPINT0_1 43
	188	#define IRQ_DM355_GPIO0 44
	189	#define IRQ_DM355_GPIO1 45
	190	#define IRQ_DM355_GPIO2 46
	191	#define IRQ_DM355_GPIO3 47
	192	#define IRQ_DM355_GPIO4 48
	193	#define IRQ_DM355_GPIO5 49
	194	#define IRQ_DM355_GPIO6 50
	195	#define IRQ_DM355_GPIO7 51
	196	#define IRQ_DM355_GPIO8 52
	197	#define IRQ_DM355_GPIO9 53
	198	#define IRQ_DM355_GPIOBNK0 54
	199	#define IRQ_DM355_GPIOBNK1 55
	200	#define IRQ_DM355_GPIOBNK2 56
	201	#define IRQ_DM355_GPIOBNK3 57
	202	#define IRQ_DM355_GPIOBNK4 58
	203	#define IRQ_DM355_GPIOBNK5 59
	204	#define IRQ_DM355_GPIOBNK6 60
	205
7c6337e2	206	#endif /* __ASM_ARCH_IRQS_H */