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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
e7736d47 | 2 | /* |
a09e64fb | 3 | * arch/arm/mach-ep93xx/include/mach/hardware.h |
e7736d47 | 4 | */ |
43234b1e | 5 | |
be509729 RK |
6 | #ifndef __ASM_ARCH_HARDWARE_H |
7 | #define __ASM_ARCH_HARDWARE_H | |
e7736d47 | 8 | |
583ddafe | 9 | #include <mach/platform.h> |
e7736d47 | 10 | |
701fac82 HS |
11 | /* |
12 | * The EP93xx has two external crystal oscillators. To generate the | |
13 | * required high-frequency clocks, the processor uses two phase-locked- | |
14 | * loops (PLLs) to multiply the incoming external clock signal to much | |
15 | * higher frequencies that are then divided down by programmable dividers | |
16 | * to produce the needed clocks. The PLLs operate independently of one | |
17 | * another. | |
18 | */ | |
19 | #define EP93XX_EXT_CLK_RATE 14745600 | |
20 | #define EP93XX_EXT_RTC_RATE 32768 | |
21 | ||
22 | #define EP93XX_KEYTCHCLK_DIV4 (EP93XX_EXT_CLK_RATE / 4) | |
23 | #define EP93XX_KEYTCHCLK_DIV16 (EP93XX_EXT_CLK_RATE / 16) | |
24 | ||
be509729 | 25 | #endif |