[mirror_ubuntu-jammy-kernel.git] / arch / arm / mach-ep93xx / ts72xx.c

/*
 * arch/arm/mach-ep93xx/ts72xx.c
 * Technologic Systems TS72xx SBC support.
 *
 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or (at
 * your option) any later version.
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <linux/spi/mmc_spi.h>
#include <linux/mmc/host.h>
#include <linux/platform_data/spi-ep93xx.h>

#include <mach/gpio-ep93xx.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/gpio-ep93xx.h>

#include <asm/mach-types.h>
#include <asm/mach/map.h>
#include <asm/mach/arch.h>

#include "soc.h"
#include "ts72xx.h"

/*************************************************************************
 * IO map
 *************************************************************************/
static struct map_desc ts72xx_io_desc[] __initdata = {
	{
		.virtual	= (unsigned long)TS72XX_MODEL_VIRT_BASE,
		.pfn		= __phys_to_pfn(TS72XX_MODEL_PHYS_BASE),
		.length		= TS72XX_MODEL_SIZE,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)TS72XX_OPTIONS_VIRT_BASE,
		.pfn		= __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE),
		.length		= TS72XX_OPTIONS_SIZE,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)TS72XX_OPTIONS2_VIRT_BASE,
		.pfn		= __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
		.length		= TS72XX_OPTIONS2_SIZE,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)TS72XX_CPLDVER_VIRT_BASE,
		.pfn		= __phys_to_pfn(TS72XX_CPLDVER_PHYS_BASE),
		.length		= TS72XX_CPLDVER_SIZE,
		.type		= MT_DEVICE,
	}
};

static void __init ts72xx_map_io(void)
{
	ep93xx_map_io();
	iotable_init(ts72xx_io_desc, ARRAY_SIZE(ts72xx_io_desc));
}


/*************************************************************************
 * NAND flash
 *************************************************************************/
#define TS72XX_NAND_CONTROL_ADDR_LINE	22	/* 0xN0400000 */
#define TS72XX_NAND_BUSY_ADDR_LINE	23	/* 0xN0800000 */

static void ts72xx_nand_hwcontrol(struct nand_chip *chip,
				  int cmd, unsigned int ctrl)
{
	if (ctrl & NAND_CTRL_CHANGE) {
		void __iomem *addr = chip->legacy.IO_ADDR_R;
		unsigned char bits;

		addr += (1 << TS72XX_NAND_CONTROL_ADDR_LINE);

		bits = __raw_readb(addr) & ~0x07;
		bits |= (ctrl & NAND_NCE) << 2;	/* bit 0 -> bit 2 */
		bits |= (ctrl & NAND_CLE);	/* bit 1 -> bit 1 */
		bits |= (ctrl & NAND_ALE) >> 2;	/* bit 2 -> bit 0 */

		__raw_writeb(bits, addr);
	}

	if (cmd != NAND_CMD_NONE)
		__raw_writeb(cmd, chip->legacy.IO_ADDR_W);
}

static int ts72xx_nand_device_ready(struct nand_chip *chip)
{
	void __iomem *addr = chip->legacy.IO_ADDR_R;

	addr += (1 << TS72XX_NAND_BUSY_ADDR_LINE);

	return !!(__raw_readb(addr) & 0x20);
}

#define TS72XX_BOOTROM_PART_SIZE	(SZ_16K)
#define TS72XX_REDBOOT_PART_SIZE	(SZ_2M + SZ_1M)

static struct mtd_partition ts72xx_nand_parts[] = {
	{
		.name		= "TS-BOOTROM",
		.offset		= 0,
		.size		= TS72XX_BOOTROM_PART_SIZE,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	}, {
		.name		= "Linux",
		.offset		= MTDPART_OFS_RETAIN,
		.size		= TS72XX_REDBOOT_PART_SIZE,
				/* leave so much for last partition */
	}, {
		.name		= "RedBoot",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
};

static struct platform_nand_data ts72xx_nand_data = {
	.chip = {
		.nr_chips	= 1,
		.chip_offset	= 0,
		.chip_delay	= 15,
	},
	.ctrl = {
		.cmd_ctrl	= ts72xx_nand_hwcontrol,
		.dev_ready	= ts72xx_nand_device_ready,
	},
};

static struct resource ts72xx_nand_resource[] = {
	{
		.start		= 0,			/* filled in later */
		.end		= 0,			/* filled in later */
		.flags		= IORESOURCE_MEM,
	},
};

static struct platform_device ts72xx_nand_flash = {
	.name			= "gen_nand",
	.id			= -1,
	.dev.platform_data	= &ts72xx_nand_data,
	.resource		= ts72xx_nand_resource,
	.num_resources		= ARRAY_SIZE(ts72xx_nand_resource),
};

void __init ts72xx_register_flash(struct mtd_partition *parts, int n,
				  resource_size_t start)
{
	/*
	 * TS7200 has NOR flash all other TS72xx board have NAND flash.
	 */
	if (board_is_ts7200()) {
		ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_16M);
	} else {
		ts72xx_nand_resource[0].start = start;
		ts72xx_nand_resource[0].end = start + SZ_16M - 1;

		ts72xx_nand_data.chip.partitions = parts;
		ts72xx_nand_data.chip.nr_partitions = n;

		platform_device_register(&ts72xx_nand_flash);
	}
}

/*************************************************************************
 * RTC M48T86
 *************************************************************************/
#define TS72XX_RTC_INDEX_PHYS_BASE	(EP93XX_CS1_PHYS_BASE + 0x00800000)
#define TS72XX_RTC_DATA_PHYS_BASE	(EP93XX_CS1_PHYS_BASE + 0x01700000)

static struct resource ts72xx_rtc_resources[] = {
	DEFINE_RES_MEM(TS72XX_RTC_INDEX_PHYS_BASE, 0x01),
	DEFINE_RES_MEM(TS72XX_RTC_DATA_PHYS_BASE, 0x01),
};

static struct platform_device ts72xx_rtc_device = {
	.name		= "rtc-m48t86",
	.id		= -1,
	.resource	= ts72xx_rtc_resources,
	.num_resources 	= ARRAY_SIZE(ts72xx_rtc_resources),
};

/*************************************************************************
 * Watchdog (in CPLD)
 *************************************************************************/
#define TS72XX_WDT_CONTROL_PHYS_BASE	(EP93XX_CS2_PHYS_BASE + 0x03800000)
#define TS72XX_WDT_FEED_PHYS_BASE	(EP93XX_CS2_PHYS_BASE + 0x03c00000)

static struct resource ts72xx_wdt_resources[] = {
	DEFINE_RES_MEM(TS72XX_WDT_CONTROL_PHYS_BASE, 0x01),
	DEFINE_RES_MEM(TS72XX_WDT_FEED_PHYS_BASE, 0x01),
};

static struct platform_device ts72xx_wdt_device = {
	.name		= "ts72xx-wdt",
	.id		= -1,
	.resource	= ts72xx_wdt_resources,
	.num_resources	= ARRAY_SIZE(ts72xx_wdt_resources),
};

/*************************************************************************
 * ETH
 *************************************************************************/
static struct ep93xx_eth_data __initdata ts72xx_eth_data = {
	.phy_id		= 1,
};

/*************************************************************************
 * SPI SD/MMC host
 *************************************************************************/
#define BK3_EN_SDCARD_PHYS_BASE         0x12400000
#define BK3_EN_SDCARD_PWR 0x0
#define BK3_DIS_SDCARD_PWR 0x0C
static void bk3_mmc_spi_setpower(struct device *dev, unsigned int vdd)
{
	void __iomem *pwr_sd = ioremap(BK3_EN_SDCARD_PHYS_BASE, SZ_4K);

	if (!pwr_sd) {
		pr_err("Failed to enable SD card power!");
		return;
	}

	pr_debug("%s: SD card pwr %s VDD:0x%x\n", __func__,
		 !!vdd ? "ON" : "OFF", vdd);

	if (!!vdd)
		__raw_writeb(BK3_EN_SDCARD_PWR, pwr_sd);
	else
		__raw_writeb(BK3_DIS_SDCARD_PWR, pwr_sd);

	iounmap(pwr_sd);
}

static struct mmc_spi_platform_data bk3_spi_mmc_data = {
	.detect_delay	= 500,
	.powerup_msecs	= 100,
	.ocr_mask	= MMC_VDD_32_33 | MMC_VDD_33_34,
	.caps		= MMC_CAP_NONREMOVABLE,
	.setpower       = bk3_mmc_spi_setpower,
};

/*************************************************************************
 * SPI Bus - SD card access
 *************************************************************************/
static struct spi_board_info bk3_spi_board_info[] __initdata = {
	{
		.modalias		= "mmc_spi",
		.platform_data		= &bk3_spi_mmc_data,
		.max_speed_hz		= 7.4E6,
		.bus_num		= 0,
		.chip_select		= 0,
		.mode			= SPI_MODE_0,
	},
};

/*
 * This is a stub -> the FGPIO[3] pin is not connected on the schematic
 * The all work is performed automatically by !SPI_FRAME (SFRM1) and
 * goes through CPLD
 */
static int bk3_spi_chipselects[] __initdata = {
	EP93XX_GPIO_LINE_F(3),
};

static struct ep93xx_spi_info bk3_spi_master __initdata = {
	.chipselect	= bk3_spi_chipselects,
	.num_chipselect = ARRAY_SIZE(bk3_spi_chipselects),
	.use_dma	= 1,
};

/*************************************************************************
 * TS72XX support code
 *************************************************************************/
#if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)

/* Relative to EP93XX_CS1_PHYS_BASE */
#define TS73XX_FPGA_LOADER_BASE		0x03c00000

static struct resource ts73xx_fpga_resources[] = {
	{
		.start	= EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE,
		.end	= EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE + 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device ts73xx_fpga_device = {
	.name	= "ts73xx-fpga-mgr",
	.id	= -1,
	.resource = ts73xx_fpga_resources,
	.num_resources = ARRAY_SIZE(ts73xx_fpga_resources),
};

#endif

/*************************************************************************
 * SPI Bus
 *************************************************************************/
static struct spi_board_info ts72xx_spi_devices[] __initdata = {
	{
		.modalias		= "tmp122",
		.max_speed_hz		= 2 * 1000 * 1000,
		.bus_num		= 0,
		.chip_select		= 0,
	},
};

static int ts72xx_spi_chipselects[] __initdata = {
	EP93XX_GPIO_LINE_F(2),		/* DIO_17 */
};

static struct ep93xx_spi_info ts72xx_spi_info __initdata = {
	.chipselect	= ts72xx_spi_chipselects,
	.num_chipselect	= ARRAY_SIZE(ts72xx_spi_chipselects),
};

static void __init ts72xx_init_machine(void)
{
	ep93xx_init_devices();
	ts72xx_register_flash(ts72xx_nand_parts, ARRAY_SIZE(ts72xx_nand_parts),
			      is_ts9420_installed() ?
			      EP93XX_CS7_PHYS_BASE : EP93XX_CS6_PHYS_BASE);
	platform_device_register(&ts72xx_rtc_device);
	platform_device_register(&ts72xx_wdt_device);

	ep93xx_register_eth(&ts72xx_eth_data, 1);
#if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
	if (board_is_ts7300())
		platform_device_register(&ts73xx_fpga_device);
#endif
	ep93xx_register_spi(&ts72xx_spi_info, ts72xx_spi_devices,
			    ARRAY_SIZE(ts72xx_spi_devices));
}

MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
	/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
	.atag_offset	= 0x100,
	.map_io		= ts72xx_map_io,
	.init_irq	= ep93xx_init_irq,
	.init_time	= ep93xx_timer_init,
	.init_machine	= ts72xx_init_machine,
	.init_late	= ep93xx_init_late,
	.restart	= ep93xx_restart,
MACHINE_END

/*************************************************************************
 * EP93xx I2S audio peripheral handling
 *************************************************************************/
static struct resource ep93xx_i2s_resource[] = {
	DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
	DEFINE_RES_IRQ_NAMED(IRQ_EP93XX_SAI, "spilink i2s slave"),
};

static struct platform_device ep93xx_i2s_device = {
	.name		= "ep93xx-spilink-i2s",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(ep93xx_i2s_resource),
	.resource	= ep93xx_i2s_resource,
};

/*************************************************************************
 * BK3 support code
 *************************************************************************/
static struct mtd_partition bk3_nand_parts[] = {
	{
		.name		= "System",
		.offset	= 0x00000000,
		.size		= 0x01e00000,
	}, {
		.name		= "Data",
		.offset	= 0x01e00000,
		.size		= 0x05f20000
	}, {
		.name		= "RedBoot",
		.offset	= 0x07d20000,
		.size		= 0x002e0000,
		.mask_flags	= MTD_WRITEABLE,	/* force RO */
	},
};

static void __init bk3_init_machine(void)
{
	ep93xx_init_devices();

	ts72xx_register_flash(bk3_nand_parts, ARRAY_SIZE(bk3_nand_parts),
			      EP93XX_CS6_PHYS_BASE);

	ep93xx_register_eth(&ts72xx_eth_data, 1);

	ep93xx_register_spi(&bk3_spi_master, bk3_spi_board_info,
			    ARRAY_SIZE(bk3_spi_board_info));

	/* Configure ep93xx's I2S to use AC97 pins */
	ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
	platform_device_register(&ep93xx_i2s_device);
}

MACHINE_START(BK3, "Liebherr controller BK3.1")
	/* Maintainer: Lukasz Majewski <lukma@denx.de> */
	.atag_offset	= 0x100,
	.map_io		= ts72xx_map_io,
	.init_irq	= ep93xx_init_irq,
	.init_time	= ep93xx_timer_init,
	.init_machine	= bk3_init_machine,
	.init_late	= ep93xx_init_late,
	.restart	= ep93xx_restart,
MACHINE_END
Commit	Line	Data
e7736d47 LB	1	/*
	2	* arch/arm/mach-ep93xx/ts72xx.c
	3	* Technologic Systems TS72xx SBC support.
	4	*
	5	* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or (at
	10	* your option) any later version.
	11	*/
	12
030d2dd4 HS	13	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
030d2dd4 HS	14
e7736d47 LB	15	#include <linux/kernel.h>
e7736d47 LB	16	#include <linux/init.h>
7ba01f97	17	#include <linux/platform_device.h>
fced80c7	18	#include <linux/io.h>
d4092d76	19	#include <linux/mtd/rawnand.h>
030d2dd4	20	#include <linux/mtd/partitions.h>
7aef828d	21	#include <linux/spi/spi.h>
c8cee359 LM	22	#include <linux/spi/flash.h>
	23	#include <linux/spi/mmc_spi.h>
	24	#include <linux/mmc/host.h>
7aef828d	25	#include <linux/platform_data/spi-ep93xx.h>
583ddafe	26
7aef828d	27	#include <mach/gpio-ep93xx.h>
a09e64fb	28	#include <mach/hardware.h>
c8cee359 LM	29	#include <mach/irqs.h>
c8cee359 LM	30	#include <mach/gpio-ep93xx.h>
583ddafe	31
e7736d47	32	#include <asm/mach-types.h>
e7736d47	33	#include <asm/mach/map.h>
583ddafe HS	34	#include <asm/mach/arch.h>
583ddafe HS	35
258249ec	36	#include "soc.h"
e4d4a902	37	#include "ts72xx.h"
e7736d47	38
e41f1e85 LM	39	/*************************************************************************
	40	* IO map
	41	*************************************************************************/
e7736d47 LB	42	static struct map_desc ts72xx_io_desc[] __initdata = {
e7736d47 LB	43	{
29fe651f	44	.virtual = (unsigned long)TS72XX_MODEL_VIRT_BASE,
e7736d47 LB	45	.pfn = __phys_to_pfn(TS72XX_MODEL_PHYS_BASE),
	46	.length = TS72XX_MODEL_SIZE,
	47	.type = MT_DEVICE,
	48	}, {
29fe651f	49	.virtual = (unsigned long)TS72XX_OPTIONS_VIRT_BASE,
e7736d47 LB	50	.pfn = __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE),
	51	.length = TS72XX_OPTIONS_SIZE,
	52	.type = MT_DEVICE,
	53	}, {
29fe651f	54	.virtual = (unsigned long)TS72XX_OPTIONS2_VIRT_BASE,
e7736d47 LB	55	.pfn = __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
	56	.length = TS72XX_OPTIONS2_SIZE,
	57	.type = MT_DEVICE,
c8cee359 LM	58	}, {
	59	.virtual = (unsigned long)TS72XX_CPLDVER_VIRT_BASE,
	60	.pfn = __phys_to_pfn(TS72XX_CPLDVER_PHYS_BASE),
	61	.length = TS72XX_CPLDVER_SIZE,
	62	.type = MT_DEVICE,
e7736d47 LB	63	}
	64	};
	65
030d2dd4 HS	66	static void __init ts72xx_map_io(void)
	67	{
	68	ep93xx_map_io();
	69	iotable_init(ts72xx_io_desc, ARRAY_SIZE(ts72xx_io_desc));
	70	}
	71
	72
	73	/*************************************************************************
	74	* NAND flash
	75	*************************************************************************/
	76	#define TS72XX_NAND_CONTROL_ADDR_LINE 22 /* 0xN0400000 */
	77	#define TS72XX_NAND_BUSY_ADDR_LINE 23 /* 0xN0800000 */
	78
47bd59e5	79	static void ts72xx_nand_hwcontrol(struct nand_chip *chip,
030d2dd4 HS	80	int cmd, unsigned int ctrl)
030d2dd4 HS	81	{
030d2dd4	82	if (ctrl & NAND_CTRL_CHANGE) {
82fc5099	83	void __iomem *addr = chip->legacy.IO_ADDR_R;
030d2dd4 HS	84	unsigned char bits;
	85
	86	addr += (1 << TS72XX_NAND_CONTROL_ADDR_LINE);
	87
	88	bits = __raw_readb(addr) & ~0x07;
	89	bits \|= (ctrl & NAND_NCE) << 2; /* bit 0 -> bit 2 */
	90	bits \|= (ctrl & NAND_CLE); /* bit 1 -> bit 1 */
	91	bits \|= (ctrl & NAND_ALE) >> 2; /* bit 2 -> bit 0 */
	92
	93	__raw_writeb(bits, addr);
e7736d47	94	}
e7736d47	95
030d2dd4	96	if (cmd != NAND_CMD_NONE)
82fc5099	97	__raw_writeb(cmd, chip->legacy.IO_ADDR_W);
030d2dd4 HS	98	}
030d2dd4 HS	99
47bd59e5	100	static int ts72xx_nand_device_ready(struct nand_chip *chip)
030d2dd4	101	{
82fc5099	102	void __iomem *addr = chip->legacy.IO_ADDR_R;
030d2dd4 HS	103
	104	addr += (1 << TS72XX_NAND_BUSY_ADDR_LINE);
	105
	106	return !!(__raw_readb(addr) & 0x20);
	107	}
	108
030d2dd4 HS	109	#define TS72XX_BOOTROM_PART_SIZE (SZ_16K)
	110	#define TS72XX_REDBOOT_PART_SIZE (SZ_2M + SZ_1M)
	111
	112	static struct mtd_partition ts72xx_nand_parts[] = {
e7736d47	113	{
030d2dd4 HS	114	.name = "TS-BOOTROM",
	115	.offset = 0,
	116	.size = TS72XX_BOOTROM_PART_SIZE,
	117	.mask_flags = MTD_WRITEABLE, /* force read-only */
e7736d47	118	}, {
030d2dd4	119	.name = "Linux",
78dd9e35 DB	120	.offset = MTDPART_OFS_RETAIN,
	121	.size = TS72XX_REDBOOT_PART_SIZE,
	122	/* leave so much for last partition */
e7736d47	123	}, {
030d2dd4 HS	124	.name = "RedBoot",
	125	.offset = MTDPART_OFS_APPEND,
	126	.size = MTDPART_SIZ_FULL,
	127	.mask_flags = MTD_WRITEABLE, /* force read-only */
	128	},
e7736d47 LB	129	};
e7736d47 LB	130
030d2dd4 HS	131	static struct platform_nand_data ts72xx_nand_data = {
	132	.chip = {
	133	.nr_chips = 1,
	134	.chip_offset = 0,
	135	.chip_delay = 15,
030d2dd4 HS	136	},
	137	.ctrl = {
	138	.cmd_ctrl = ts72xx_nand_hwcontrol,
	139	.dev_ready = ts72xx_nand_device_ready,
	140	},
	141	};
	142
	143	static struct resource ts72xx_nand_resource[] = {
	144	{
	145	.start = 0, /* filled in later */
	146	.end = 0, /* filled in later */
	147	.flags = IORESOURCE_MEM,
	148	},
	149	};
	150
	151	static struct platform_device ts72xx_nand_flash = {
	152	.name = "gen_nand",
	153	.id = -1,
	154	.dev.platform_data = &ts72xx_nand_data,
	155	.resource = ts72xx_nand_resource,
	156	.num_resources = ARRAY_SIZE(ts72xx_nand_resource),
	157	};
	158
d6d76745 LM	159	void __init ts72xx_register_flash(struct mtd_partition *parts, int n,
d6d76745 LM	160	resource_size_t start)
3174c88a	161	{
16bcf78f HS	162	/*
	163	* TS7200 has NOR flash all other TS72xx board have NAND flash.
	164	*/
030d2dd4	165	if (board_is_ts7200()) {
16bcf78f	166	ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_16M);
030d2dd4	167	} else {
030d2dd4 HS	168	ts72xx_nand_resource[0].start = start;
	169	ts72xx_nand_resource[0].end = start + SZ_16M - 1;
	170
d6d76745 LM	171	ts72xx_nand_data.chip.partitions = parts;
	172	ts72xx_nand_data.chip.nr_partitions = n;
	173
030d2dd4 HS	174	platform_device_register(&ts72xx_nand_flash);
030d2dd4 HS	175	}
3174c88a HS	176	}
3174c88a HS	177
5594e88a HS	178	/*************************************************************************
	179	* RTC M48T86
	180	*************************************************************************/
	181	#define TS72XX_RTC_INDEX_PHYS_BASE (EP93XX_CS1_PHYS_BASE + 0x00800000)
	182	#define TS72XX_RTC_DATA_PHYS_BASE (EP93XX_CS1_PHYS_BASE + 0x01700000)
030d2dd4	183
5594e88a HS	184	static struct resource ts72xx_rtc_resources[] = {
	185	DEFINE_RES_MEM(TS72XX_RTC_INDEX_PHYS_BASE, 0x01),
	186	DEFINE_RES_MEM(TS72XX_RTC_DATA_PHYS_BASE, 0x01),
7ba01f97 LB	187	};
	188
	189	static struct platform_device ts72xx_rtc_device = {
e48f3fa3 HS	190	.name = "rtc-m48t86",
e48f3fa3 HS	191	.id = -1,
5594e88a HS	192	.resource = ts72xx_rtc_resources,
5594e88a HS	193	.num_resources = ARRAY_SIZE(ts72xx_rtc_resources),
7ba01f97 LB	194	};
7ba01f97 LB	195
97c3bca9 HS	196	/*************************************************************************
	197	* Watchdog (in CPLD)
	198	*************************************************************************/
	199	#define TS72XX_WDT_CONTROL_PHYS_BASE (EP93XX_CS2_PHYS_BASE + 0x03800000)
	200	#define TS72XX_WDT_FEED_PHYS_BASE (EP93XX_CS2_PHYS_BASE + 0x03c00000)
	201
12926dc4	202	static struct resource ts72xx_wdt_resources[] = {
97c3bca9 HS	203	DEFINE_RES_MEM(TS72XX_WDT_CONTROL_PHYS_BASE, 0x01),
97c3bca9 HS	204	DEFINE_RES_MEM(TS72XX_WDT_FEED_PHYS_BASE, 0x01),
12926dc4 MW	205	};
	206
	207	static struct platform_device ts72xx_wdt_device = {
	208	.name = "ts72xx-wdt",
	209	.id = -1,
12926dc4	210	.resource = ts72xx_wdt_resources,
97c3bca9	211	.num_resources = ARRAY_SIZE(ts72xx_wdt_resources),
12926dc4 MW	212	};
12926dc4 MW	213
e41f1e85 LM	214	/*************************************************************************
	215	* ETH
	216	*************************************************************************/
b370e082	217	static struct ep93xx_eth_data __initdata ts72xx_eth_data = {
e48f3fa3	218	.phy_id = 1,
730ee9f3 LB	219	};
730ee9f3 LB	220
c8cee359 LM	221	/*************************************************************************
	222	* SPI SD/MMC host
	223	*************************************************************************/
	224	#define BK3_EN_SDCARD_PHYS_BASE 0x12400000
	225	#define BK3_EN_SDCARD_PWR 0x0
	226	#define BK3_DIS_SDCARD_PWR 0x0C
	227	static void bk3_mmc_spi_setpower(struct device *dev, unsigned int vdd)
	228	{
	229	void __iomem *pwr_sd = ioremap(BK3_EN_SDCARD_PHYS_BASE, SZ_4K);
	230
	231	if (!pwr_sd) {
	232	pr_err("Failed to enable SD card power!");
	233	return;
	234	}
	235
	236	pr_debug("%s: SD card pwr %s VDD:0x%x\n", __func__,
	237	!!vdd ? "ON" : "OFF", vdd);
	238
	239	if (!!vdd)
	240	__raw_writeb(BK3_EN_SDCARD_PWR, pwr_sd);
	241	else
	242	__raw_writeb(BK3_DIS_SDCARD_PWR, pwr_sd);
	243
	244	iounmap(pwr_sd);
	245	}
	246
	247	static struct mmc_spi_platform_data bk3_spi_mmc_data = {
	248	.detect_delay = 500,
	249	.powerup_msecs = 100,
	250	.ocr_mask = MMC_VDD_32_33 \| MMC_VDD_33_34,
	251	.caps = MMC_CAP_NONREMOVABLE,
	252	.setpower = bk3_mmc_spi_setpower,
	253	};
	254
	255	/*************************************************************************
	256	* SPI Bus - SD card access
	257	*************************************************************************/
	258	static struct spi_board_info bk3_spi_board_info[] __initdata = {
	259	{
	260	.modalias = "mmc_spi",
	261	.platform_data = &bk3_spi_mmc_data,
	262	.max_speed_hz = 7.4E6,
	263	.bus_num = 0,
	264	.chip_select = 0,
	265	.mode = SPI_MODE_0,
	266	},
	267	};
	268
	269	/*
	270	* This is a stub -> the FGPIO[3] pin is not connected on the schematic
	271	* The all work is performed automatically by !SPI_FRAME (SFRM1) and
	272	* goes through CPLD
	273	*/
	274	static int bk3_spi_chipselects[] __initdata = {
	275	EP93XX_GPIO_LINE_F(3),
	276	};
	277
	278	static struct ep93xx_spi_info bk3_spi_master __initdata = {
	279	.chipselect = bk3_spi_chipselects,
	280	.num_chipselect = ARRAY_SIZE(bk3_spi_chipselects),
	281	.use_dma = 1,
	282	};
	283
e41f1e85 LM	284	/*************************************************************************
	285	* TS72XX support code
	286	*************************************************************************/
f677e0f3 FF	287	#if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
	288
	289	/* Relative to EP93XX_CS1_PHYS_BASE */
	290	#define TS73XX_FPGA_LOADER_BASE 0x03c00000
	291
	292	static struct resource ts73xx_fpga_resources[] = {
	293	{
	294	.start = EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE,
	295	.end = EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE + 1,
	296	.flags = IORESOURCE_MEM,
	297	},
	298	};
	299
	300	static struct platform_device ts73xx_fpga_device = {
	301	.name = "ts73xx-fpga-mgr",
	302	.id = -1,
	303	.resource = ts73xx_fpga_resources,
	304	.num_resources = ARRAY_SIZE(ts73xx_fpga_resources),
	305	};
	306
	307	#endif
	308
7aef828d HS	309	/*************************************************************************
	310	* SPI Bus
	311	*************************************************************************/
	312	static struct spi_board_info ts72xx_spi_devices[] __initdata = {
	313	{
	314	.modalias = "tmp122",
	315	.max_speed_hz = 2 * 1000 * 1000,
	316	.bus_num = 0,
	317	.chip_select = 0,
	318	},
	319	};
	320
	321	static int ts72xx_spi_chipselects[] __initdata = {
	322	EP93XX_GPIO_LINE_F(2), /* DIO_17 */
	323	};
	324
	325	static struct ep93xx_spi_info ts72xx_spi_info __initdata = {
	326	.chipselect = ts72xx_spi_chipselects,
	327	.num_chipselect = ARRAY_SIZE(ts72xx_spi_chipselects),
	328	};
	329
e7736d47 LB	330	static void __init ts72xx_init_machine(void)
	331	{
	332	ep93xx_init_devices();
d6d76745 LM	333	ts72xx_register_flash(ts72xx_nand_parts, ARRAY_SIZE(ts72xx_nand_parts),
	334	is_ts9420_installed() ?
	335	EP93XX_CS7_PHYS_BASE : EP93XX_CS6_PHYS_BASE);
7ba01f97	336	platform_device_register(&ts72xx_rtc_device);
12926dc4	337	platform_device_register(&ts72xx_wdt_device);
730ee9f3	338
a0a08fdc	339	ep93xx_register_eth(&ts72xx_eth_data, 1);
f677e0f3 FF	340	#if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
	341	if (board_is_ts7300())
	342	platform_device_register(&ts73xx_fpga_device);
	343	#endif
7aef828d HS	344	ep93xx_register_spi(&ts72xx_spi_info, ts72xx_spi_devices,
7aef828d HS	345	ARRAY_SIZE(ts72xx_spi_devices));
e7736d47 LB	346	}
	347
	348	MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
	349	/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
e562cf17	350	.atag_offset = 0x100,
e7736d47 LB	351	.map_io = ts72xx_map_io,
e7736d47 LB	352	.init_irq = ep93xx_init_irq,
6bb27d73	353	.init_time = ep93xx_timer_init,
e7736d47	354	.init_machine = ts72xx_init_machine,
c914283f	355	.init_late = ep93xx_init_late,
3275166e	356	.restart = ep93xx_restart,
e7736d47	357	MACHINE_END
c8cee359 LM	358
	359	/*************************************************************************
	360	* EP93xx I2S audio peripheral handling
	361	*************************************************************************/
	362	static struct resource ep93xx_i2s_resource[] = {
	363	DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
	364	DEFINE_RES_IRQ_NAMED(IRQ_EP93XX_SAI, "spilink i2s slave"),
	365	};
	366
	367	static struct platform_device ep93xx_i2s_device = {
	368	.name = "ep93xx-spilink-i2s",
	369	.id = -1,
	370	.num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
	371	.resource = ep93xx_i2s_resource,
	372	};
	373
	374	/*************************************************************************
	375	* BK3 support code
	376	*************************************************************************/
	377	static struct mtd_partition bk3_nand_parts[] = {
	378	{
	379	.name = "System",
	380	.offset = 0x00000000,
	381	.size = 0x01e00000,
	382	}, {
	383	.name = "Data",
	384	.offset = 0x01e00000,
	385	.size = 0x05f20000
	386	}, {
	387	.name = "RedBoot",
	388	.offset = 0x07d20000,
	389	.size = 0x002e0000,
	390	.mask_flags = MTD_WRITEABLE, /* force RO */
	391	},
	392	};
	393
	394	static void __init bk3_init_machine(void)
	395	{
	396	ep93xx_init_devices();
	397
	398	ts72xx_register_flash(bk3_nand_parts, ARRAY_SIZE(bk3_nand_parts),
	399	EP93XX_CS6_PHYS_BASE);
	400
	401	ep93xx_register_eth(&ts72xx_eth_data, 1);
	402
	403	ep93xx_register_spi(&bk3_spi_master, bk3_spi_board_info,
	404	ARRAY_SIZE(bk3_spi_board_info));
	405
	406	/* Configure ep93xx's I2S to use AC97 pins */
	407	ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
	408	platform_device_register(&ep93xx_i2s_device);
	409	}
	410
	411	MACHINE_START(BK3, "Liebherr controller BK3.1")
	412	/* Maintainer: Lukasz Majewski <lukma@denx.de> */
	413	.atag_offset = 0x100,
	414	.map_io = ts72xx_map_io,
	415	.init_irq = ep93xx_init_irq,
	416	.init_time = ep93xx_timer_init,
	417	.init_machine = bk3_init_machine,
	418	.init_late = ep93xx_init_late,
	419	.restart = ep93xx_restart,
	420	MACHINE_END