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1cb17e2d HS |
1 | /* |
2 | * arch/arm/mach-ep93xx/vision_ep9307.c | |
3 | * Vision Engraving Systems EP9307 SoM support. | |
4 | * | |
5 | * Copyright (C) 2008-2011 Vision Engraving Systems | |
6 | * H Hartley Sweeten <hsweeten@visionengravers.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or (at | |
11 | * your option) any later version. | |
12 | */ | |
13 | ||
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/irq.h> | |
20 | #include <linux/gpio.h> | |
21 | #include <linux/fb.h> | |
22 | #include <linux/io.h> | |
23 | #include <linux/mtd/partitions.h> | |
24 | #include <linux/i2c.h> | |
5877457a | 25 | #include <linux/platform_data/pca953x.h> |
1cb17e2d HS |
26 | #include <linux/spi/spi.h> |
27 | #include <linux/spi/flash.h> | |
28 | #include <linux/spi/mmc_spi.h> | |
29 | #include <linux/mmc/host.h> | |
30 | ||
b07b4e29 HS |
31 | #include <sound/cs4271.h> |
32 | ||
1cb17e2d | 33 | #include <mach/hardware.h> |
a3b29245 AB |
34 | #include <linux/platform_data/video-ep93xx.h> |
35 | #include <linux/platform_data/spi-ep93xx.h> | |
e9c6c5df | 36 | #include <mach/gpio-ep93xx.h> |
1cb17e2d HS |
37 | |
38 | #include <asm/mach-types.h> | |
39 | #include <asm/mach/map.h> | |
40 | #include <asm/mach/arch.h> | |
41 | ||
258249ec RM |
42 | #include "soc.h" |
43 | ||
1cb17e2d HS |
44 | /************************************************************************* |
45 | * Static I/O mappings for the FPGA | |
46 | *************************************************************************/ | |
47 | #define VISION_PHYS_BASE EP93XX_CS7_PHYS_BASE | |
48 | #define VISION_VIRT_BASE 0xfebff000 | |
49 | ||
50 | static struct map_desc vision_io_desc[] __initdata = { | |
51 | { | |
52 | .virtual = VISION_VIRT_BASE, | |
53 | .pfn = __phys_to_pfn(VISION_PHYS_BASE), | |
54 | .length = SZ_4K, | |
55 | .type = MT_DEVICE, | |
56 | }, | |
57 | }; | |
58 | ||
59 | static void __init vision_map_io(void) | |
60 | { | |
61 | ep93xx_map_io(); | |
62 | ||
63 | iotable_init(vision_io_desc, ARRAY_SIZE(vision_io_desc)); | |
64 | } | |
65 | ||
66 | /************************************************************************* | |
67 | * Ethernet | |
68 | *************************************************************************/ | |
69 | static struct ep93xx_eth_data vision_eth_data __initdata = { | |
70 | .phy_id = 1, | |
71 | }; | |
72 | ||
73 | /************************************************************************* | |
74 | * Framebuffer | |
75 | *************************************************************************/ | |
76 | #define VISION_LCD_ENABLE EP93XX_GPIO_LINE_EGPIO1 | |
77 | ||
78 | static int vision_lcd_setup(struct platform_device *pdev) | |
79 | { | |
80 | int err; | |
81 | ||
82 | err = gpio_request_one(VISION_LCD_ENABLE, GPIOF_INIT_HIGH, | |
83 | dev_name(&pdev->dev)); | |
84 | if (err) | |
85 | return err; | |
86 | ||
87 | ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_RAS | | |
88 | EP93XX_SYSCON_DEVCFG_RASONP3 | | |
89 | EP93XX_SYSCON_DEVCFG_EXVC); | |
90 | ||
91 | return 0; | |
92 | } | |
93 | ||
94 | static void vision_lcd_teardown(struct platform_device *pdev) | |
95 | { | |
96 | gpio_free(VISION_LCD_ENABLE); | |
97 | } | |
98 | ||
99 | static void vision_lcd_blank(int blank_mode, struct fb_info *info) | |
100 | { | |
101 | if (blank_mode) | |
102 | gpio_set_value(VISION_LCD_ENABLE, 0); | |
103 | else | |
104 | gpio_set_value(VISION_LCD_ENABLE, 1); | |
105 | } | |
106 | ||
107 | static struct ep93xxfb_mach_info ep93xxfb_info __initdata = { | |
1cb17e2d HS |
108 | .flags = EP93XXFB_USE_SDCSN0 | EP93XXFB_PCLK_FALLING, |
109 | .setup = vision_lcd_setup, | |
110 | .teardown = vision_lcd_teardown, | |
111 | .blank = vision_lcd_blank, | |
112 | }; | |
113 | ||
114 | ||
115 | /************************************************************************* | |
116 | * GPIO Expanders | |
117 | *************************************************************************/ | |
118 | #define PCA9539_74_GPIO_BASE (EP93XX_GPIO_LINE_MAX + 1) | |
119 | #define PCA9539_75_GPIO_BASE (PCA9539_74_GPIO_BASE + 16) | |
120 | #define PCA9539_76_GPIO_BASE (PCA9539_75_GPIO_BASE + 16) | |
121 | #define PCA9539_77_GPIO_BASE (PCA9539_76_GPIO_BASE + 16) | |
122 | ||
123 | static struct pca953x_platform_data pca953x_74_gpio_data = { | |
124 | .gpio_base = PCA9539_74_GPIO_BASE, | |
125 | .irq_base = EP93XX_BOARD_IRQ(0), | |
126 | }; | |
127 | ||
128 | static struct pca953x_platform_data pca953x_75_gpio_data = { | |
129 | .gpio_base = PCA9539_75_GPIO_BASE, | |
130 | .irq_base = -1, | |
131 | }; | |
132 | ||
133 | static struct pca953x_platform_data pca953x_76_gpio_data = { | |
134 | .gpio_base = PCA9539_76_GPIO_BASE, | |
135 | .irq_base = -1, | |
136 | }; | |
137 | ||
138 | static struct pca953x_platform_data pca953x_77_gpio_data = { | |
139 | .gpio_base = PCA9539_77_GPIO_BASE, | |
140 | .irq_base = -1, | |
141 | }; | |
142 | ||
143 | /************************************************************************* | |
144 | * I2C Bus | |
145 | *************************************************************************/ | |
1cb17e2d HS |
146 | |
147 | static struct i2c_board_info vision_i2c_info[] __initdata = { | |
148 | { | |
149 | I2C_BOARD_INFO("isl1208", 0x6f), | |
150 | .irq = IRQ_EP93XX_EXT1, | |
151 | }, { | |
152 | I2C_BOARD_INFO("pca9539", 0x74), | |
153 | .platform_data = &pca953x_74_gpio_data, | |
1cb17e2d HS |
154 | }, { |
155 | I2C_BOARD_INFO("pca9539", 0x75), | |
156 | .platform_data = &pca953x_75_gpio_data, | |
157 | }, { | |
158 | I2C_BOARD_INFO("pca9539", 0x76), | |
159 | .platform_data = &pca953x_76_gpio_data, | |
160 | }, { | |
161 | I2C_BOARD_INFO("pca9539", 0x77), | |
162 | .platform_data = &pca953x_77_gpio_data, | |
163 | }, | |
164 | }; | |
165 | ||
b07b4e29 HS |
166 | /************************************************************************* |
167 | * SPI CS4271 Audio Codec | |
168 | *************************************************************************/ | |
169 | static struct cs4271_platform_data vision_cs4271_data = { | |
170 | .gpio_nreset = EP93XX_GPIO_LINE_H(2), | |
171 | }; | |
172 | ||
1cb17e2d HS |
173 | /************************************************************************* |
174 | * SPI Flash | |
175 | *************************************************************************/ | |
1cb17e2d HS |
176 | static struct mtd_partition vision_spi_flash_partitions[] = { |
177 | { | |
178 | .name = "SPI bootstrap", | |
179 | .offset = 0, | |
180 | .size = SZ_4K, | |
181 | }, { | |
182 | .name = "Bootstrap config", | |
183 | .offset = MTDPART_OFS_APPEND, | |
184 | .size = SZ_4K, | |
185 | }, { | |
186 | .name = "System config", | |
187 | .offset = MTDPART_OFS_APPEND, | |
188 | .size = MTDPART_SIZ_FULL, | |
189 | }, | |
190 | }; | |
191 | ||
192 | static struct flash_platform_data vision_spi_flash_data = { | |
193 | .name = "SPI Flash", | |
194 | .parts = vision_spi_flash_partitions, | |
195 | .nr_parts = ARRAY_SIZE(vision_spi_flash_partitions), | |
196 | }; | |
197 | ||
1cb17e2d HS |
198 | /************************************************************************* |
199 | * SPI SD/MMC host | |
200 | *************************************************************************/ | |
1cb17e2d | 201 | static struct mmc_spi_platform_data vision_spi_mmc_data = { |
1cb17e2d HS |
202 | .detect_delay = 100, |
203 | .powerup_msecs = 100, | |
204 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | |
2a4f6b1d | 205 | .flags = MMC_SPI_USE_CD_GPIO | MMC_SPI_USE_RO_GPIO, |
55f0cd3f | 206 | .cd_gpio = EP93XX_GPIO_LINE_EGPIO15, |
2a4f6b1d | 207 | .cd_debounce = 1, |
55f0cd3f | 208 | .ro_gpio = EP93XX_GPIO_LINE_F(0), |
2a4f6b1d | 209 | .caps2 = MMC_CAP2_RO_ACTIVE_HIGH, |
1cb17e2d HS |
210 | }; |
211 | ||
1cb17e2d HS |
212 | /************************************************************************* |
213 | * SPI Bus | |
214 | *************************************************************************/ | |
215 | static struct spi_board_info vision_spi_board_info[] __initdata = { | |
216 | { | |
b07b4e29 HS |
217 | .modalias = "cs4271", |
218 | .platform_data = &vision_cs4271_data, | |
b07b4e29 HS |
219 | .max_speed_hz = 6000000, |
220 | .bus_num = 0, | |
221 | .chip_select = 0, | |
222 | .mode = SPI_MODE_3, | |
223 | }, { | |
1cb17e2d HS |
224 | .modalias = "sst25l", |
225 | .platform_data = &vision_spi_flash_data, | |
1cb17e2d HS |
226 | .max_speed_hz = 20000000, |
227 | .bus_num = 0, | |
b07b4e29 | 228 | .chip_select = 1, |
1cb17e2d HS |
229 | .mode = SPI_MODE_3, |
230 | }, { | |
231 | .modalias = "mmc_spi", | |
232 | .platform_data = &vision_spi_mmc_data, | |
1cb17e2d HS |
233 | .max_speed_hz = 20000000, |
234 | .bus_num = 0, | |
b07b4e29 | 235 | .chip_select = 2, |
1cb17e2d HS |
236 | .mode = SPI_MODE_3, |
237 | }, | |
238 | }; | |
239 | ||
55f0cd3f HS |
240 | static int vision_spi_chipselects[] __initdata = { |
241 | EP93XX_GPIO_LINE_EGPIO6, | |
242 | EP93XX_GPIO_LINE_EGPIO7, | |
243 | EP93XX_GPIO_LINE_G(2), | |
244 | }; | |
245 | ||
1cb17e2d | 246 | static struct ep93xx_spi_info vision_spi_master __initdata = { |
55f0cd3f HS |
247 | .chipselect = vision_spi_chipselects, |
248 | .num_chipselect = ARRAY_SIZE(vision_spi_chipselects), | |
25105231 | 249 | .use_dma = 1, |
1cb17e2d HS |
250 | }; |
251 | ||
b07b4e29 HS |
252 | /************************************************************************* |
253 | * I2S Audio | |
254 | *************************************************************************/ | |
255 | static struct platform_device vision_audio_device = { | |
256 | .name = "edb93xx-audio", | |
257 | .id = -1, | |
258 | }; | |
259 | ||
260 | static void __init vision_register_i2s(void) | |
261 | { | |
262 | ep93xx_register_i2s(); | |
263 | platform_device_register(&vision_audio_device); | |
264 | } | |
265 | ||
1cb17e2d HS |
266 | /************************************************************************* |
267 | * Machine Initialization | |
268 | *************************************************************************/ | |
269 | static void __init vision_init_machine(void) | |
270 | { | |
271 | ep93xx_init_devices(); | |
272 | ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_64M); | |
273 | ep93xx_register_eth(&vision_eth_data, 1); | |
274 | ep93xx_register_fb(&ep93xxfb_info); | |
275 | ep93xx_register_pwm(1, 0); | |
276 | ||
277 | /* | |
278 | * Request the gpio expander's interrupt gpio line now to prevent | |
279 | * the kernel from doing a WARN in gpiolib:gpio_ensure_requested(). | |
280 | */ | |
281 | if (gpio_request_one(EP93XX_GPIO_LINE_F(7), GPIOF_DIR_IN, | |
282 | "pca9539:74")) | |
283 | pr_warn("cannot request interrupt gpio for pca9539:74\n"); | |
284 | ||
e9c6c5df HS |
285 | vision_i2c_info[1].irq = gpio_to_irq(EP93XX_GPIO_LINE_F(7)); |
286 | ||
b2e63555 | 287 | ep93xx_register_i2c(vision_i2c_info, |
1cb17e2d HS |
288 | ARRAY_SIZE(vision_i2c_info)); |
289 | ep93xx_register_spi(&vision_spi_master, vision_spi_board_info, | |
290 | ARRAY_SIZE(vision_spi_board_info)); | |
b07b4e29 | 291 | vision_register_i2s(); |
1cb17e2d HS |
292 | } |
293 | ||
294 | MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307") | |
295 | /* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */ | |
a7fadac1 | 296 | .atag_offset = 0x100, |
1cb17e2d HS |
297 | .map_io = vision_map_io, |
298 | .init_irq = ep93xx_init_irq, | |
6bb27d73 | 299 | .init_time = ep93xx_timer_init, |
1cb17e2d | 300 | .init_machine = vision_init_machine, |
c914283f | 301 | .init_late = ep93xx_init_late, |
3275166e | 302 | .restart = ep93xx_restart, |
1cb17e2d | 303 | MACHINE_END |