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1cb17e2d HS |
1 | /* |
2 | * arch/arm/mach-ep93xx/vision_ep9307.c | |
3 | * Vision Engraving Systems EP9307 SoM support. | |
4 | * | |
5 | * Copyright (C) 2008-2011 Vision Engraving Systems | |
6 | * H Hartley Sweeten <hsweeten@visionengravers.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or (at | |
11 | * your option) any later version. | |
12 | */ | |
13 | ||
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/irq.h> | |
20 | #include <linux/gpio.h> | |
21 | #include <linux/fb.h> | |
22 | #include <linux/io.h> | |
23 | #include <linux/mtd/partitions.h> | |
24 | #include <linux/i2c.h> | |
25 | #include <linux/i2c-gpio.h> | |
5877457a | 26 | #include <linux/platform_data/pca953x.h> |
1cb17e2d HS |
27 | #include <linux/spi/spi.h> |
28 | #include <linux/spi/flash.h> | |
29 | #include <linux/spi/mmc_spi.h> | |
30 | #include <linux/mmc/host.h> | |
31 | ||
32 | #include <mach/hardware.h> | |
a3b29245 AB |
33 | #include <linux/platform_data/video-ep93xx.h> |
34 | #include <linux/platform_data/spi-ep93xx.h> | |
e9c6c5df | 35 | #include <mach/gpio-ep93xx.h> |
1cb17e2d HS |
36 | |
37 | #include <asm/mach-types.h> | |
38 | #include <asm/mach/map.h> | |
39 | #include <asm/mach/arch.h> | |
40 | ||
258249ec RM |
41 | #include "soc.h" |
42 | ||
1cb17e2d HS |
43 | /************************************************************************* |
44 | * Static I/O mappings for the FPGA | |
45 | *************************************************************************/ | |
46 | #define VISION_PHYS_BASE EP93XX_CS7_PHYS_BASE | |
47 | #define VISION_VIRT_BASE 0xfebff000 | |
48 | ||
49 | static struct map_desc vision_io_desc[] __initdata = { | |
50 | { | |
51 | .virtual = VISION_VIRT_BASE, | |
52 | .pfn = __phys_to_pfn(VISION_PHYS_BASE), | |
53 | .length = SZ_4K, | |
54 | .type = MT_DEVICE, | |
55 | }, | |
56 | }; | |
57 | ||
58 | static void __init vision_map_io(void) | |
59 | { | |
60 | ep93xx_map_io(); | |
61 | ||
62 | iotable_init(vision_io_desc, ARRAY_SIZE(vision_io_desc)); | |
63 | } | |
64 | ||
65 | /************************************************************************* | |
66 | * Ethernet | |
67 | *************************************************************************/ | |
68 | static struct ep93xx_eth_data vision_eth_data __initdata = { | |
69 | .phy_id = 1, | |
70 | }; | |
71 | ||
72 | /************************************************************************* | |
73 | * Framebuffer | |
74 | *************************************************************************/ | |
75 | #define VISION_LCD_ENABLE EP93XX_GPIO_LINE_EGPIO1 | |
76 | ||
77 | static int vision_lcd_setup(struct platform_device *pdev) | |
78 | { | |
79 | int err; | |
80 | ||
81 | err = gpio_request_one(VISION_LCD_ENABLE, GPIOF_INIT_HIGH, | |
82 | dev_name(&pdev->dev)); | |
83 | if (err) | |
84 | return err; | |
85 | ||
86 | ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_RAS | | |
87 | EP93XX_SYSCON_DEVCFG_RASONP3 | | |
88 | EP93XX_SYSCON_DEVCFG_EXVC); | |
89 | ||
90 | return 0; | |
91 | } | |
92 | ||
93 | static void vision_lcd_teardown(struct platform_device *pdev) | |
94 | { | |
95 | gpio_free(VISION_LCD_ENABLE); | |
96 | } | |
97 | ||
98 | static void vision_lcd_blank(int blank_mode, struct fb_info *info) | |
99 | { | |
100 | if (blank_mode) | |
101 | gpio_set_value(VISION_LCD_ENABLE, 0); | |
102 | else | |
103 | gpio_set_value(VISION_LCD_ENABLE, 1); | |
104 | } | |
105 | ||
106 | static struct ep93xxfb_mach_info ep93xxfb_info __initdata = { | |
107 | .num_modes = EP93XXFB_USE_MODEDB, | |
108 | .bpp = 16, | |
109 | .flags = EP93XXFB_USE_SDCSN0 | EP93XXFB_PCLK_FALLING, | |
110 | .setup = vision_lcd_setup, | |
111 | .teardown = vision_lcd_teardown, | |
112 | .blank = vision_lcd_blank, | |
113 | }; | |
114 | ||
115 | ||
116 | /************************************************************************* | |
117 | * GPIO Expanders | |
118 | *************************************************************************/ | |
119 | #define PCA9539_74_GPIO_BASE (EP93XX_GPIO_LINE_MAX + 1) | |
120 | #define PCA9539_75_GPIO_BASE (PCA9539_74_GPIO_BASE + 16) | |
121 | #define PCA9539_76_GPIO_BASE (PCA9539_75_GPIO_BASE + 16) | |
122 | #define PCA9539_77_GPIO_BASE (PCA9539_76_GPIO_BASE + 16) | |
123 | ||
124 | static struct pca953x_platform_data pca953x_74_gpio_data = { | |
125 | .gpio_base = PCA9539_74_GPIO_BASE, | |
126 | .irq_base = EP93XX_BOARD_IRQ(0), | |
127 | }; | |
128 | ||
129 | static struct pca953x_platform_data pca953x_75_gpio_data = { | |
130 | .gpio_base = PCA9539_75_GPIO_BASE, | |
131 | .irq_base = -1, | |
132 | }; | |
133 | ||
134 | static struct pca953x_platform_data pca953x_76_gpio_data = { | |
135 | .gpio_base = PCA9539_76_GPIO_BASE, | |
136 | .irq_base = -1, | |
137 | }; | |
138 | ||
139 | static struct pca953x_platform_data pca953x_77_gpio_data = { | |
140 | .gpio_base = PCA9539_77_GPIO_BASE, | |
141 | .irq_base = -1, | |
142 | }; | |
143 | ||
144 | /************************************************************************* | |
145 | * I2C Bus | |
146 | *************************************************************************/ | |
147 | static struct i2c_gpio_platform_data vision_i2c_gpio_data __initdata = { | |
148 | .sda_pin = EP93XX_GPIO_LINE_EEDAT, | |
149 | .scl_pin = EP93XX_GPIO_LINE_EECLK, | |
150 | }; | |
151 | ||
152 | static struct i2c_board_info vision_i2c_info[] __initdata = { | |
153 | { | |
154 | I2C_BOARD_INFO("isl1208", 0x6f), | |
155 | .irq = IRQ_EP93XX_EXT1, | |
156 | }, { | |
157 | I2C_BOARD_INFO("pca9539", 0x74), | |
158 | .platform_data = &pca953x_74_gpio_data, | |
1cb17e2d HS |
159 | }, { |
160 | I2C_BOARD_INFO("pca9539", 0x75), | |
161 | .platform_data = &pca953x_75_gpio_data, | |
162 | }, { | |
163 | I2C_BOARD_INFO("pca9539", 0x76), | |
164 | .platform_data = &pca953x_76_gpio_data, | |
165 | }, { | |
166 | I2C_BOARD_INFO("pca9539", 0x77), | |
167 | .platform_data = &pca953x_77_gpio_data, | |
168 | }, | |
169 | }; | |
170 | ||
171 | /************************************************************************* | |
172 | * SPI Flash | |
173 | *************************************************************************/ | |
174 | #define VISION_SPI_FLASH_CS EP93XX_GPIO_LINE_EGPIO7 | |
175 | ||
176 | static struct mtd_partition vision_spi_flash_partitions[] = { | |
177 | { | |
178 | .name = "SPI bootstrap", | |
179 | .offset = 0, | |
180 | .size = SZ_4K, | |
181 | }, { | |
182 | .name = "Bootstrap config", | |
183 | .offset = MTDPART_OFS_APPEND, | |
184 | .size = SZ_4K, | |
185 | }, { | |
186 | .name = "System config", | |
187 | .offset = MTDPART_OFS_APPEND, | |
188 | .size = MTDPART_SIZ_FULL, | |
189 | }, | |
190 | }; | |
191 | ||
192 | static struct flash_platform_data vision_spi_flash_data = { | |
193 | .name = "SPI Flash", | |
194 | .parts = vision_spi_flash_partitions, | |
195 | .nr_parts = ARRAY_SIZE(vision_spi_flash_partitions), | |
196 | }; | |
197 | ||
198 | static int vision_spi_flash_hw_setup(struct spi_device *spi) | |
199 | { | |
200 | return gpio_request_one(VISION_SPI_FLASH_CS, GPIOF_INIT_HIGH, | |
201 | spi->modalias); | |
202 | } | |
203 | ||
204 | static void vision_spi_flash_hw_cleanup(struct spi_device *spi) | |
205 | { | |
206 | gpio_free(VISION_SPI_FLASH_CS); | |
207 | } | |
208 | ||
209 | static void vision_spi_flash_hw_cs_control(struct spi_device *spi, int value) | |
210 | { | |
211 | gpio_set_value(VISION_SPI_FLASH_CS, value); | |
212 | } | |
213 | ||
214 | static struct ep93xx_spi_chip_ops vision_spi_flash_hw = { | |
215 | .setup = vision_spi_flash_hw_setup, | |
216 | .cleanup = vision_spi_flash_hw_cleanup, | |
217 | .cs_control = vision_spi_flash_hw_cs_control, | |
218 | }; | |
219 | ||
220 | /************************************************************************* | |
221 | * SPI SD/MMC host | |
222 | *************************************************************************/ | |
223 | #define VISION_SPI_MMC_CS EP93XX_GPIO_LINE_G(2) | |
224 | #define VISION_SPI_MMC_WP EP93XX_GPIO_LINE_F(0) | |
225 | #define VISION_SPI_MMC_CD EP93XX_GPIO_LINE_EGPIO15 | |
226 | ||
227 | static struct gpio vision_spi_mmc_gpios[] = { | |
228 | { VISION_SPI_MMC_WP, GPIOF_DIR_IN, "mmc_spi:wp" }, | |
229 | { VISION_SPI_MMC_CD, GPIOF_DIR_IN, "mmc_spi:cd" }, | |
230 | }; | |
231 | ||
232 | static int vision_spi_mmc_init(struct device *pdev, | |
233 | irqreturn_t (*func)(int, void *), void *pdata) | |
234 | { | |
235 | int err; | |
236 | ||
237 | err = gpio_request_array(vision_spi_mmc_gpios, | |
238 | ARRAY_SIZE(vision_spi_mmc_gpios)); | |
239 | if (err) | |
240 | return err; | |
241 | ||
242 | err = gpio_set_debounce(VISION_SPI_MMC_CD, 1); | |
243 | if (err) | |
244 | goto exit_err; | |
245 | ||
246 | err = request_irq(gpio_to_irq(VISION_SPI_MMC_CD), func, | |
247 | IRQ_TYPE_EDGE_BOTH, "mmc_spi:cd", pdata); | |
248 | if (err) | |
249 | goto exit_err; | |
250 | ||
251 | return 0; | |
252 | ||
253 | exit_err: | |
254 | gpio_free_array(vision_spi_mmc_gpios, ARRAY_SIZE(vision_spi_mmc_gpios)); | |
255 | return err; | |
256 | ||
257 | } | |
258 | ||
259 | static void vision_spi_mmc_exit(struct device *pdev, void *pdata) | |
260 | { | |
261 | free_irq(gpio_to_irq(VISION_SPI_MMC_CD), pdata); | |
262 | gpio_free_array(vision_spi_mmc_gpios, ARRAY_SIZE(vision_spi_mmc_gpios)); | |
263 | } | |
264 | ||
265 | static int vision_spi_mmc_get_ro(struct device *pdev) | |
266 | { | |
267 | return !!gpio_get_value(VISION_SPI_MMC_WP); | |
268 | } | |
269 | ||
270 | static int vision_spi_mmc_get_cd(struct device *pdev) | |
271 | { | |
272 | return !gpio_get_value(VISION_SPI_MMC_CD); | |
273 | } | |
274 | ||
275 | static struct mmc_spi_platform_data vision_spi_mmc_data = { | |
276 | .init = vision_spi_mmc_init, | |
277 | .exit = vision_spi_mmc_exit, | |
278 | .get_ro = vision_spi_mmc_get_ro, | |
279 | .get_cd = vision_spi_mmc_get_cd, | |
280 | .detect_delay = 100, | |
281 | .powerup_msecs = 100, | |
282 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | |
283 | }; | |
284 | ||
285 | static int vision_spi_mmc_hw_setup(struct spi_device *spi) | |
286 | { | |
287 | return gpio_request_one(VISION_SPI_MMC_CS, GPIOF_INIT_HIGH, | |
288 | spi->modalias); | |
289 | } | |
290 | ||
291 | static void vision_spi_mmc_hw_cleanup(struct spi_device *spi) | |
292 | { | |
293 | gpio_free(VISION_SPI_MMC_CS); | |
294 | } | |
295 | ||
296 | static void vision_spi_mmc_hw_cs_control(struct spi_device *spi, int value) | |
297 | { | |
298 | gpio_set_value(VISION_SPI_MMC_CS, value); | |
299 | } | |
300 | ||
301 | static struct ep93xx_spi_chip_ops vision_spi_mmc_hw = { | |
302 | .setup = vision_spi_mmc_hw_setup, | |
303 | .cleanup = vision_spi_mmc_hw_cleanup, | |
304 | .cs_control = vision_spi_mmc_hw_cs_control, | |
305 | }; | |
306 | ||
307 | /************************************************************************* | |
308 | * SPI Bus | |
309 | *************************************************************************/ | |
310 | static struct spi_board_info vision_spi_board_info[] __initdata = { | |
311 | { | |
312 | .modalias = "sst25l", | |
313 | .platform_data = &vision_spi_flash_data, | |
314 | .controller_data = &vision_spi_flash_hw, | |
315 | .max_speed_hz = 20000000, | |
316 | .bus_num = 0, | |
317 | .chip_select = 0, | |
318 | .mode = SPI_MODE_3, | |
319 | }, { | |
320 | .modalias = "mmc_spi", | |
321 | .platform_data = &vision_spi_mmc_data, | |
322 | .controller_data = &vision_spi_mmc_hw, | |
323 | .max_speed_hz = 20000000, | |
324 | .bus_num = 0, | |
325 | .chip_select = 1, | |
326 | .mode = SPI_MODE_3, | |
327 | }, | |
328 | }; | |
329 | ||
330 | static struct ep93xx_spi_info vision_spi_master __initdata = { | |
331 | .num_chipselect = ARRAY_SIZE(vision_spi_board_info), | |
332 | }; | |
333 | ||
334 | /************************************************************************* | |
335 | * Machine Initialization | |
336 | *************************************************************************/ | |
337 | static void __init vision_init_machine(void) | |
338 | { | |
339 | ep93xx_init_devices(); | |
340 | ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_64M); | |
341 | ep93xx_register_eth(&vision_eth_data, 1); | |
342 | ep93xx_register_fb(&ep93xxfb_info); | |
343 | ep93xx_register_pwm(1, 0); | |
344 | ||
345 | /* | |
346 | * Request the gpio expander's interrupt gpio line now to prevent | |
347 | * the kernel from doing a WARN in gpiolib:gpio_ensure_requested(). | |
348 | */ | |
349 | if (gpio_request_one(EP93XX_GPIO_LINE_F(7), GPIOF_DIR_IN, | |
350 | "pca9539:74")) | |
351 | pr_warn("cannot request interrupt gpio for pca9539:74\n"); | |
352 | ||
e9c6c5df HS |
353 | vision_i2c_info[1].irq = gpio_to_irq(EP93XX_GPIO_LINE_F(7)); |
354 | ||
1cb17e2d HS |
355 | ep93xx_register_i2c(&vision_i2c_gpio_data, vision_i2c_info, |
356 | ARRAY_SIZE(vision_i2c_info)); | |
357 | ep93xx_register_spi(&vision_spi_master, vision_spi_board_info, | |
358 | ARRAY_SIZE(vision_spi_board_info)); | |
359 | } | |
360 | ||
361 | MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307") | |
362 | /* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */ | |
a7fadac1 | 363 | .atag_offset = 0x100, |
1cb17e2d HS |
364 | .map_io = vision_map_io, |
365 | .init_irq = ep93xx_init_irq, | |
6bb27d73 | 366 | .init_time = ep93xx_timer_init, |
1cb17e2d | 367 | .init_machine = vision_init_machine, |
c914283f | 368 | .init_late = ep93xx_init_late, |
3275166e | 369 | .restart = ep93xx_restart, |
1cb17e2d | 370 | MACHINE_END |