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1cb17e2d HS |
1 | /* |
2 | * arch/arm/mach-ep93xx/vision_ep9307.c | |
3 | * Vision Engraving Systems EP9307 SoM support. | |
4 | * | |
5 | * Copyright (C) 2008-2011 Vision Engraving Systems | |
6 | * H Hartley Sweeten <hsweeten@visionengravers.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or (at | |
11 | * your option) any later version. | |
12 | */ | |
13 | ||
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/irq.h> | |
20 | #include <linux/gpio.h> | |
21 | #include <linux/fb.h> | |
22 | #include <linux/io.h> | |
23 | #include <linux/mtd/partitions.h> | |
24 | #include <linux/i2c.h> | |
25 | #include <linux/i2c-gpio.h> | |
5877457a | 26 | #include <linux/platform_data/pca953x.h> |
1cb17e2d HS |
27 | #include <linux/spi/spi.h> |
28 | #include <linux/spi/flash.h> | |
29 | #include <linux/spi/mmc_spi.h> | |
30 | #include <linux/mmc/host.h> | |
31 | ||
b07b4e29 HS |
32 | #include <sound/cs4271.h> |
33 | ||
1cb17e2d | 34 | #include <mach/hardware.h> |
a3b29245 AB |
35 | #include <linux/platform_data/video-ep93xx.h> |
36 | #include <linux/platform_data/spi-ep93xx.h> | |
e9c6c5df | 37 | #include <mach/gpio-ep93xx.h> |
1cb17e2d HS |
38 | |
39 | #include <asm/mach-types.h> | |
40 | #include <asm/mach/map.h> | |
41 | #include <asm/mach/arch.h> | |
42 | ||
258249ec RM |
43 | #include "soc.h" |
44 | ||
1cb17e2d HS |
45 | /************************************************************************* |
46 | * Static I/O mappings for the FPGA | |
47 | *************************************************************************/ | |
48 | #define VISION_PHYS_BASE EP93XX_CS7_PHYS_BASE | |
49 | #define VISION_VIRT_BASE 0xfebff000 | |
50 | ||
51 | static struct map_desc vision_io_desc[] __initdata = { | |
52 | { | |
53 | .virtual = VISION_VIRT_BASE, | |
54 | .pfn = __phys_to_pfn(VISION_PHYS_BASE), | |
55 | .length = SZ_4K, | |
56 | .type = MT_DEVICE, | |
57 | }, | |
58 | }; | |
59 | ||
60 | static void __init vision_map_io(void) | |
61 | { | |
62 | ep93xx_map_io(); | |
63 | ||
64 | iotable_init(vision_io_desc, ARRAY_SIZE(vision_io_desc)); | |
65 | } | |
66 | ||
67 | /************************************************************************* | |
68 | * Ethernet | |
69 | *************************************************************************/ | |
70 | static struct ep93xx_eth_data vision_eth_data __initdata = { | |
71 | .phy_id = 1, | |
72 | }; | |
73 | ||
74 | /************************************************************************* | |
75 | * Framebuffer | |
76 | *************************************************************************/ | |
77 | #define VISION_LCD_ENABLE EP93XX_GPIO_LINE_EGPIO1 | |
78 | ||
79 | static int vision_lcd_setup(struct platform_device *pdev) | |
80 | { | |
81 | int err; | |
82 | ||
83 | err = gpio_request_one(VISION_LCD_ENABLE, GPIOF_INIT_HIGH, | |
84 | dev_name(&pdev->dev)); | |
85 | if (err) | |
86 | return err; | |
87 | ||
88 | ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_RAS | | |
89 | EP93XX_SYSCON_DEVCFG_RASONP3 | | |
90 | EP93XX_SYSCON_DEVCFG_EXVC); | |
91 | ||
92 | return 0; | |
93 | } | |
94 | ||
95 | static void vision_lcd_teardown(struct platform_device *pdev) | |
96 | { | |
97 | gpio_free(VISION_LCD_ENABLE); | |
98 | } | |
99 | ||
100 | static void vision_lcd_blank(int blank_mode, struct fb_info *info) | |
101 | { | |
102 | if (blank_mode) | |
103 | gpio_set_value(VISION_LCD_ENABLE, 0); | |
104 | else | |
105 | gpio_set_value(VISION_LCD_ENABLE, 1); | |
106 | } | |
107 | ||
108 | static struct ep93xxfb_mach_info ep93xxfb_info __initdata = { | |
1cb17e2d HS |
109 | .flags = EP93XXFB_USE_SDCSN0 | EP93XXFB_PCLK_FALLING, |
110 | .setup = vision_lcd_setup, | |
111 | .teardown = vision_lcd_teardown, | |
112 | .blank = vision_lcd_blank, | |
113 | }; | |
114 | ||
115 | ||
116 | /************************************************************************* | |
117 | * GPIO Expanders | |
118 | *************************************************************************/ | |
119 | #define PCA9539_74_GPIO_BASE (EP93XX_GPIO_LINE_MAX + 1) | |
120 | #define PCA9539_75_GPIO_BASE (PCA9539_74_GPIO_BASE + 16) | |
121 | #define PCA9539_76_GPIO_BASE (PCA9539_75_GPIO_BASE + 16) | |
122 | #define PCA9539_77_GPIO_BASE (PCA9539_76_GPIO_BASE + 16) | |
123 | ||
124 | static struct pca953x_platform_data pca953x_74_gpio_data = { | |
125 | .gpio_base = PCA9539_74_GPIO_BASE, | |
126 | .irq_base = EP93XX_BOARD_IRQ(0), | |
127 | }; | |
128 | ||
129 | static struct pca953x_platform_data pca953x_75_gpio_data = { | |
130 | .gpio_base = PCA9539_75_GPIO_BASE, | |
131 | .irq_base = -1, | |
132 | }; | |
133 | ||
134 | static struct pca953x_platform_data pca953x_76_gpio_data = { | |
135 | .gpio_base = PCA9539_76_GPIO_BASE, | |
136 | .irq_base = -1, | |
137 | }; | |
138 | ||
139 | static struct pca953x_platform_data pca953x_77_gpio_data = { | |
140 | .gpio_base = PCA9539_77_GPIO_BASE, | |
141 | .irq_base = -1, | |
142 | }; | |
143 | ||
144 | /************************************************************************* | |
145 | * I2C Bus | |
146 | *************************************************************************/ | |
147 | static struct i2c_gpio_platform_data vision_i2c_gpio_data __initdata = { | |
148 | .sda_pin = EP93XX_GPIO_LINE_EEDAT, | |
149 | .scl_pin = EP93XX_GPIO_LINE_EECLK, | |
150 | }; | |
151 | ||
152 | static struct i2c_board_info vision_i2c_info[] __initdata = { | |
153 | { | |
154 | I2C_BOARD_INFO("isl1208", 0x6f), | |
155 | .irq = IRQ_EP93XX_EXT1, | |
156 | }, { | |
157 | I2C_BOARD_INFO("pca9539", 0x74), | |
158 | .platform_data = &pca953x_74_gpio_data, | |
1cb17e2d HS |
159 | }, { |
160 | I2C_BOARD_INFO("pca9539", 0x75), | |
161 | .platform_data = &pca953x_75_gpio_data, | |
162 | }, { | |
163 | I2C_BOARD_INFO("pca9539", 0x76), | |
164 | .platform_data = &pca953x_76_gpio_data, | |
165 | }, { | |
166 | I2C_BOARD_INFO("pca9539", 0x77), | |
167 | .platform_data = &pca953x_77_gpio_data, | |
168 | }, | |
169 | }; | |
170 | ||
b07b4e29 HS |
171 | /************************************************************************* |
172 | * SPI CS4271 Audio Codec | |
173 | *************************************************************************/ | |
174 | static struct cs4271_platform_data vision_cs4271_data = { | |
175 | .gpio_nreset = EP93XX_GPIO_LINE_H(2), | |
176 | }; | |
177 | ||
1cb17e2d HS |
178 | /************************************************************************* |
179 | * SPI Flash | |
180 | *************************************************************************/ | |
1cb17e2d HS |
181 | static struct mtd_partition vision_spi_flash_partitions[] = { |
182 | { | |
183 | .name = "SPI bootstrap", | |
184 | .offset = 0, | |
185 | .size = SZ_4K, | |
186 | }, { | |
187 | .name = "Bootstrap config", | |
188 | .offset = MTDPART_OFS_APPEND, | |
189 | .size = SZ_4K, | |
190 | }, { | |
191 | .name = "System config", | |
192 | .offset = MTDPART_OFS_APPEND, | |
193 | .size = MTDPART_SIZ_FULL, | |
194 | }, | |
195 | }; | |
196 | ||
197 | static struct flash_platform_data vision_spi_flash_data = { | |
198 | .name = "SPI Flash", | |
199 | .parts = vision_spi_flash_partitions, | |
200 | .nr_parts = ARRAY_SIZE(vision_spi_flash_partitions), | |
201 | }; | |
202 | ||
1cb17e2d HS |
203 | /************************************************************************* |
204 | * SPI SD/MMC host | |
205 | *************************************************************************/ | |
1cb17e2d | 206 | static struct mmc_spi_platform_data vision_spi_mmc_data = { |
1cb17e2d HS |
207 | .detect_delay = 100, |
208 | .powerup_msecs = 100, | |
209 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | |
2a4f6b1d | 210 | .flags = MMC_SPI_USE_CD_GPIO | MMC_SPI_USE_RO_GPIO, |
55f0cd3f | 211 | .cd_gpio = EP93XX_GPIO_LINE_EGPIO15, |
2a4f6b1d | 212 | .cd_debounce = 1, |
55f0cd3f | 213 | .ro_gpio = EP93XX_GPIO_LINE_F(0), |
2a4f6b1d | 214 | .caps2 = MMC_CAP2_RO_ACTIVE_HIGH, |
1cb17e2d HS |
215 | }; |
216 | ||
1cb17e2d HS |
217 | /************************************************************************* |
218 | * SPI Bus | |
219 | *************************************************************************/ | |
220 | static struct spi_board_info vision_spi_board_info[] __initdata = { | |
221 | { | |
b07b4e29 HS |
222 | .modalias = "cs4271", |
223 | .platform_data = &vision_cs4271_data, | |
b07b4e29 HS |
224 | .max_speed_hz = 6000000, |
225 | .bus_num = 0, | |
226 | .chip_select = 0, | |
227 | .mode = SPI_MODE_3, | |
228 | }, { | |
1cb17e2d HS |
229 | .modalias = "sst25l", |
230 | .platform_data = &vision_spi_flash_data, | |
1cb17e2d HS |
231 | .max_speed_hz = 20000000, |
232 | .bus_num = 0, | |
b07b4e29 | 233 | .chip_select = 1, |
1cb17e2d HS |
234 | .mode = SPI_MODE_3, |
235 | }, { | |
236 | .modalias = "mmc_spi", | |
237 | .platform_data = &vision_spi_mmc_data, | |
1cb17e2d HS |
238 | .max_speed_hz = 20000000, |
239 | .bus_num = 0, | |
b07b4e29 | 240 | .chip_select = 2, |
1cb17e2d HS |
241 | .mode = SPI_MODE_3, |
242 | }, | |
243 | }; | |
244 | ||
55f0cd3f HS |
245 | static int vision_spi_chipselects[] __initdata = { |
246 | EP93XX_GPIO_LINE_EGPIO6, | |
247 | EP93XX_GPIO_LINE_EGPIO7, | |
248 | EP93XX_GPIO_LINE_G(2), | |
249 | }; | |
250 | ||
1cb17e2d | 251 | static struct ep93xx_spi_info vision_spi_master __initdata = { |
55f0cd3f HS |
252 | .chipselect = vision_spi_chipselects, |
253 | .num_chipselect = ARRAY_SIZE(vision_spi_chipselects), | |
25105231 | 254 | .use_dma = 1, |
1cb17e2d HS |
255 | }; |
256 | ||
b07b4e29 HS |
257 | /************************************************************************* |
258 | * I2S Audio | |
259 | *************************************************************************/ | |
260 | static struct platform_device vision_audio_device = { | |
261 | .name = "edb93xx-audio", | |
262 | .id = -1, | |
263 | }; | |
264 | ||
265 | static void __init vision_register_i2s(void) | |
266 | { | |
267 | ep93xx_register_i2s(); | |
268 | platform_device_register(&vision_audio_device); | |
269 | } | |
270 | ||
1cb17e2d HS |
271 | /************************************************************************* |
272 | * Machine Initialization | |
273 | *************************************************************************/ | |
274 | static void __init vision_init_machine(void) | |
275 | { | |
276 | ep93xx_init_devices(); | |
277 | ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_64M); | |
278 | ep93xx_register_eth(&vision_eth_data, 1); | |
279 | ep93xx_register_fb(&ep93xxfb_info); | |
280 | ep93xx_register_pwm(1, 0); | |
281 | ||
282 | /* | |
283 | * Request the gpio expander's interrupt gpio line now to prevent | |
284 | * the kernel from doing a WARN in gpiolib:gpio_ensure_requested(). | |
285 | */ | |
286 | if (gpio_request_one(EP93XX_GPIO_LINE_F(7), GPIOF_DIR_IN, | |
287 | "pca9539:74")) | |
288 | pr_warn("cannot request interrupt gpio for pca9539:74\n"); | |
289 | ||
e9c6c5df HS |
290 | vision_i2c_info[1].irq = gpio_to_irq(EP93XX_GPIO_LINE_F(7)); |
291 | ||
1cb17e2d HS |
292 | ep93xx_register_i2c(&vision_i2c_gpio_data, vision_i2c_info, |
293 | ARRAY_SIZE(vision_i2c_info)); | |
294 | ep93xx_register_spi(&vision_spi_master, vision_spi_board_info, | |
295 | ARRAY_SIZE(vision_spi_board_info)); | |
b07b4e29 | 296 | vision_register_i2s(); |
1cb17e2d HS |
297 | } |
298 | ||
299 | MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307") | |
300 | /* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */ | |
a7fadac1 | 301 | .atag_offset = 0x100, |
1cb17e2d HS |
302 | .map_io = vision_map_io, |
303 | .init_irq = ep93xx_init_irq, | |
6bb27d73 | 304 | .init_time = ep93xx_timer_init, |
1cb17e2d | 305 | .init_machine = vision_init_machine, |
c914283f | 306 | .init_late = ep93xx_init_late, |
3275166e | 307 | .restart = ep93xx_restart, |
1cb17e2d | 308 | MACHINE_END |