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cc511b8d KK |
1 | /* |
2 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
3 | * http://www.samsung.com | |
4 | * | |
5 | * Common Header for EXYNOS machines | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H | |
13 | #define __ARCH_ARM_MACH_EXYNOS_COMMON_H | |
14 | ||
6e6aac75 | 15 | #include <linux/of.h> |
712eddf7 | 16 | #include <linux/platform_data/cpuidle-exynos.h> |
6e6aac75 | 17 | |
940bc58d CC |
18 | #define EXYNOS3250_SOC_ID 0xE3472000 |
19 | #define EXYNOS3_SOC_MASK 0xFFFFF000 | |
20 | ||
7cb2ded1 SK |
21 | #define EXYNOS4210_CPU_ID 0x43210000 |
22 | #define EXYNOS4212_CPU_ID 0x43220000 | |
23 | #define EXYNOS4412_CPU_ID 0xE4412200 | |
24 | #define EXYNOS4_CPU_MASK 0xFFFE0000 | |
25 | ||
26 | #define EXYNOS5250_SOC_ID 0x43520000 | |
723c9c7e | 27 | #define EXYNOS5410_SOC_ID 0xE5410000 |
7cb2ded1 SK |
28 | #define EXYNOS5420_SOC_ID 0xE5420000 |
29 | #define EXYNOS5440_SOC_ID 0xE5440000 | |
86c6f148 | 30 | #define EXYNOS5800_SOC_ID 0xE5422000 |
7cb2ded1 SK |
31 | #define EXYNOS5_SOC_MASK 0xFFFFF000 |
32 | ||
33 | extern unsigned long samsung_cpu_id; | |
34 | ||
35 | #define IS_SAMSUNG_CPU(name, id, mask) \ | |
36 | static inline int is_samsung_##name(void) \ | |
37 | { \ | |
38 | return ((samsung_cpu_id & mask) == (id & mask)); \ | |
39 | } | |
40 | ||
940bc58d | 41 | IS_SAMSUNG_CPU(exynos3250, EXYNOS3250_SOC_ID, EXYNOS3_SOC_MASK) |
7cb2ded1 SK |
42 | IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK) |
43 | IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK) | |
44 | IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK) | |
45 | IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK) | |
723c9c7e | 46 | IS_SAMSUNG_CPU(exynos5410, EXYNOS5410_SOC_ID, EXYNOS5_SOC_MASK) |
7cb2ded1 SK |
47 | IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK) |
48 | IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK) | |
86c6f148 | 49 | IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID, EXYNOS5_SOC_MASK) |
7cb2ded1 | 50 | |
940bc58d CC |
51 | #if defined(CONFIG_SOC_EXYNOS3250) |
52 | # define soc_is_exynos3250() is_samsung_exynos3250() | |
53 | #else | |
54 | # define soc_is_exynos3250() 0 | |
55 | #endif | |
56 | ||
7cb2ded1 SK |
57 | #if defined(CONFIG_CPU_EXYNOS4210) |
58 | # define soc_is_exynos4210() is_samsung_exynos4210() | |
59 | #else | |
60 | # define soc_is_exynos4210() 0 | |
61 | #endif | |
62 | ||
63 | #if defined(CONFIG_SOC_EXYNOS4212) | |
64 | # define soc_is_exynos4212() is_samsung_exynos4212() | |
65 | #else | |
66 | # define soc_is_exynos4212() 0 | |
67 | #endif | |
68 | ||
69 | #if defined(CONFIG_SOC_EXYNOS4412) | |
70 | # define soc_is_exynos4412() is_samsung_exynos4412() | |
71 | #else | |
72 | # define soc_is_exynos4412() 0 | |
73 | #endif | |
74 | ||
75 | #define EXYNOS4210_REV_0 (0x0) | |
76 | #define EXYNOS4210_REV_1_0 (0x10) | |
77 | #define EXYNOS4210_REV_1_1 (0x11) | |
78 | ||
79 | #if defined(CONFIG_SOC_EXYNOS5250) | |
80 | # define soc_is_exynos5250() is_samsung_exynos5250() | |
81 | #else | |
82 | # define soc_is_exynos5250() 0 | |
83 | #endif | |
84 | ||
723c9c7e TD |
85 | #if defined(CONFIG_SOC_EXYNOS5410) |
86 | # define soc_is_exynos5410() is_samsung_exynos5410() | |
87 | #else | |
88 | # define soc_is_exynos5410() 0 | |
89 | #endif | |
90 | ||
7cb2ded1 SK |
91 | #if defined(CONFIG_SOC_EXYNOS5420) |
92 | # define soc_is_exynos5420() is_samsung_exynos5420() | |
93 | #else | |
94 | # define soc_is_exynos5420() 0 | |
95 | #endif | |
96 | ||
97 | #if defined(CONFIG_SOC_EXYNOS5440) | |
98 | # define soc_is_exynos5440() is_samsung_exynos5440() | |
99 | #else | |
100 | # define soc_is_exynos5440() 0 | |
101 | #endif | |
102 | ||
86c6f148 AK |
103 | #if defined(CONFIG_SOC_EXYNOS5800) |
104 | # define soc_is_exynos5800() is_samsung_exynos5800() | |
105 | #else | |
106 | # define soc_is_exynos5800() 0 | |
107 | #endif | |
108 | ||
7cb2ded1 SK |
109 | #define soc_is_exynos4() (soc_is_exynos4210() || soc_is_exynos4212() || \ |
110 | soc_is_exynos4412()) | |
723c9c7e TD |
111 | #define soc_is_exynos5() (soc_is_exynos5250() || soc_is_exynos5410() || \ |
112 | soc_is_exynos5420() || soc_is_exynos5800()) | |
7cb2ded1 | 113 | |
2b9d9c32 TF |
114 | extern u32 cp15_save_diag; |
115 | extern u32 cp15_save_power; | |
116 | ||
b3205dea | 117 | extern void __iomem *sysram_ns_base_addr; |
cd245f59 | 118 | extern void __iomem *sysram_base_addr; |
fce9e5bb | 119 | extern void __iomem *pmu_base_addr; |
1754c42e | 120 | void exynos_sysram_init(void); |
bb13fabc | 121 | |
0b7778a8 BZ |
122 | enum { |
123 | FW_DO_IDLE_SLEEP, | |
124 | FW_DO_IDLE_AFTR, | |
125 | }; | |
126 | ||
bca28f8f TF |
127 | void exynos_firmware_init(void); |
128 | ||
dc1b9448 BZ |
129 | /* CPU BOOT mode flag for Exynos3250 SoC bootloader */ |
130 | #define C2_STATE (1 << 3) | |
054e6aa1 KK |
131 | /* |
132 | * Magic values for bootloader indicating chosen low power mode. | |
133 | * See also Documentation/arm/Samsung/Bootloader-interface.txt | |
134 | */ | |
135 | #define EXYNOS_SLEEP_MAGIC 0x00000bad | |
136 | #define EXYNOS_AFTR_MAGIC 0xfcba0d10 | |
dc1b9448 BZ |
137 | |
138 | void exynos_set_boot_flag(unsigned int cpu, unsigned int mode); | |
139 | void exynos_clear_boot_flag(unsigned int cpu, unsigned int mode); | |
140 | ||
d710aa31 | 141 | extern u32 exynos_get_eint_wake_mask(void); |
d710aa31 | 142 | |
559ba237 TF |
143 | #ifdef CONFIG_PM_SLEEP |
144 | extern void __init exynos_pm_init(void); | |
145 | #else | |
146 | static inline void exynos_pm_init(void) {} | |
147 | #endif | |
148 | ||
d710aa31 | 149 | extern void exynos_cpu_resume(void); |
2b9d9c32 | 150 | extern void exynos_cpu_resume_ns(void); |
d710aa31 | 151 | |
06853ae4 MZ |
152 | extern struct smp_operations exynos_smp_ops; |
153 | ||
d3af6976 LKA |
154 | extern void exynos_cpu_power_down(int cpu); |
155 | extern void exynos_cpu_power_up(int cpu); | |
156 | extern int exynos_cpu_power_state(int cpu); | |
096d21c6 AK |
157 | extern void exynos_cluster_power_down(int cluster); |
158 | extern void exynos_cluster_power_up(int cluster); | |
159 | extern int exynos_cluster_power_state(int cluster); | |
0d713cf1 BZ |
160 | extern void exynos_cpu_save_register(void); |
161 | extern void exynos_cpu_restore_register(void); | |
162 | extern void exynos_pm_central_suspend(void); | |
163 | extern int exynos_pm_central_resume(void); | |
3681bafe | 164 | extern void exynos_enter_aftr(void); |
ccd458c1 | 165 | |
712eddf7 BZ |
166 | extern struct cpuidle_exynos_data cpuidle_coupled_exynos_data; |
167 | ||
6f024978 KK |
168 | extern void exynos_set_delayed_reset_assertion(bool enable); |
169 | ||
7cb2ded1 SK |
170 | extern void s5p_init_cpu(void __iomem *cpuid_addr); |
171 | extern unsigned int samsung_rev(void); | |
af997114 BZ |
172 | extern void exynos_core_restart(u32 core_id); |
173 | extern int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr); | |
174 | extern int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr); | |
7cb2ded1 | 175 | |
2e94ac42 PD |
176 | static inline void pmu_raw_writel(u32 val, u32 offset) |
177 | { | |
178 | __raw_writel(val, pmu_base_addr + offset); | |
179 | } | |
180 | ||
181 | static inline u32 pmu_raw_readl(u32 offset) | |
182 | { | |
183 | return __raw_readl(pmu_base_addr + offset); | |
184 | } | |
185 | ||
cc511b8d | 186 | #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */ |