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cc511b8d KK |
1 | /* |
2 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
3 | * http://www.samsung.com | |
4 | * | |
5 | * Common Header for EXYNOS machines | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H | |
13 | #define __ARCH_ARM_MACH_EXYNOS_COMMON_H | |
14 | ||
6e6aac75 TA |
15 | #include <linux/of.h> |
16 | ||
940bc58d CC |
17 | #define EXYNOS3250_SOC_ID 0xE3472000 |
18 | #define EXYNOS3_SOC_MASK 0xFFFFF000 | |
19 | ||
7cb2ded1 SK |
20 | #define EXYNOS4210_CPU_ID 0x43210000 |
21 | #define EXYNOS4212_CPU_ID 0x43220000 | |
22 | #define EXYNOS4412_CPU_ID 0xE4412200 | |
23 | #define EXYNOS4_CPU_MASK 0xFFFE0000 | |
24 | ||
25 | #define EXYNOS5250_SOC_ID 0x43520000 | |
723c9c7e | 26 | #define EXYNOS5410_SOC_ID 0xE5410000 |
7cb2ded1 SK |
27 | #define EXYNOS5420_SOC_ID 0xE5420000 |
28 | #define EXYNOS5440_SOC_ID 0xE5440000 | |
86c6f148 | 29 | #define EXYNOS5800_SOC_ID 0xE5422000 |
7cb2ded1 SK |
30 | #define EXYNOS5_SOC_MASK 0xFFFFF000 |
31 | ||
32 | extern unsigned long samsung_cpu_id; | |
33 | ||
34 | #define IS_SAMSUNG_CPU(name, id, mask) \ | |
35 | static inline int is_samsung_##name(void) \ | |
36 | { \ | |
37 | return ((samsung_cpu_id & mask) == (id & mask)); \ | |
38 | } | |
39 | ||
940bc58d | 40 | IS_SAMSUNG_CPU(exynos3250, EXYNOS3250_SOC_ID, EXYNOS3_SOC_MASK) |
7cb2ded1 SK |
41 | IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK) |
42 | IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK) | |
43 | IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK) | |
44 | IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK) | |
723c9c7e | 45 | IS_SAMSUNG_CPU(exynos5410, EXYNOS5410_SOC_ID, EXYNOS5_SOC_MASK) |
7cb2ded1 SK |
46 | IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK) |
47 | IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK) | |
86c6f148 | 48 | IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID, EXYNOS5_SOC_MASK) |
7cb2ded1 | 49 | |
940bc58d CC |
50 | #if defined(CONFIG_SOC_EXYNOS3250) |
51 | # define soc_is_exynos3250() is_samsung_exynos3250() | |
52 | #else | |
53 | # define soc_is_exynos3250() 0 | |
54 | #endif | |
55 | ||
7cb2ded1 SK |
56 | #if defined(CONFIG_CPU_EXYNOS4210) |
57 | # define soc_is_exynos4210() is_samsung_exynos4210() | |
58 | #else | |
59 | # define soc_is_exynos4210() 0 | |
60 | #endif | |
61 | ||
62 | #if defined(CONFIG_SOC_EXYNOS4212) | |
63 | # define soc_is_exynos4212() is_samsung_exynos4212() | |
64 | #else | |
65 | # define soc_is_exynos4212() 0 | |
66 | #endif | |
67 | ||
68 | #if defined(CONFIG_SOC_EXYNOS4412) | |
69 | # define soc_is_exynos4412() is_samsung_exynos4412() | |
70 | #else | |
71 | # define soc_is_exynos4412() 0 | |
72 | #endif | |
73 | ||
74 | #define EXYNOS4210_REV_0 (0x0) | |
75 | #define EXYNOS4210_REV_1_0 (0x10) | |
76 | #define EXYNOS4210_REV_1_1 (0x11) | |
77 | ||
78 | #if defined(CONFIG_SOC_EXYNOS5250) | |
79 | # define soc_is_exynos5250() is_samsung_exynos5250() | |
80 | #else | |
81 | # define soc_is_exynos5250() 0 | |
82 | #endif | |
83 | ||
723c9c7e TD |
84 | #if defined(CONFIG_SOC_EXYNOS5410) |
85 | # define soc_is_exynos5410() is_samsung_exynos5410() | |
86 | #else | |
87 | # define soc_is_exynos5410() 0 | |
88 | #endif | |
89 | ||
7cb2ded1 SK |
90 | #if defined(CONFIG_SOC_EXYNOS5420) |
91 | # define soc_is_exynos5420() is_samsung_exynos5420() | |
92 | #else | |
93 | # define soc_is_exynos5420() 0 | |
94 | #endif | |
95 | ||
96 | #if defined(CONFIG_SOC_EXYNOS5440) | |
97 | # define soc_is_exynos5440() is_samsung_exynos5440() | |
98 | #else | |
99 | # define soc_is_exynos5440() 0 | |
100 | #endif | |
101 | ||
86c6f148 AK |
102 | #if defined(CONFIG_SOC_EXYNOS5800) |
103 | # define soc_is_exynos5800() is_samsung_exynos5800() | |
104 | #else | |
105 | # define soc_is_exynos5800() 0 | |
106 | #endif | |
107 | ||
7cb2ded1 SK |
108 | #define soc_is_exynos4() (soc_is_exynos4210() || soc_is_exynos4212() || \ |
109 | soc_is_exynos4412()) | |
723c9c7e TD |
110 | #define soc_is_exynos5() (soc_is_exynos5250() || soc_is_exynos5410() || \ |
111 | soc_is_exynos5420() || soc_is_exynos5800()) | |
7cb2ded1 | 112 | |
2b9d9c32 TF |
113 | extern u32 cp15_save_diag; |
114 | extern u32 cp15_save_power; | |
115 | ||
b3205dea | 116 | extern void __iomem *sysram_ns_base_addr; |
cd245f59 | 117 | extern void __iomem *sysram_base_addr; |
fce9e5bb | 118 | extern void __iomem *pmu_base_addr; |
1754c42e | 119 | void exynos_sysram_init(void); |
bb13fabc | 120 | |
0b7778a8 BZ |
121 | enum { |
122 | FW_DO_IDLE_SLEEP, | |
123 | FW_DO_IDLE_AFTR, | |
124 | }; | |
125 | ||
bca28f8f TF |
126 | void exynos_firmware_init(void); |
127 | ||
d710aa31 | 128 | extern u32 exynos_get_eint_wake_mask(void); |
d710aa31 | 129 | |
559ba237 TF |
130 | #ifdef CONFIG_PM_SLEEP |
131 | extern void __init exynos_pm_init(void); | |
132 | #else | |
133 | static inline void exynos_pm_init(void) {} | |
134 | #endif | |
135 | ||
d710aa31 | 136 | extern void exynos_cpu_resume(void); |
2b9d9c32 | 137 | extern void exynos_cpu_resume_ns(void); |
d710aa31 | 138 | |
06853ae4 MZ |
139 | extern struct smp_operations exynos_smp_ops; |
140 | ||
d3af6976 LKA |
141 | extern void exynos_cpu_power_down(int cpu); |
142 | extern void exynos_cpu_power_up(int cpu); | |
143 | extern int exynos_cpu_power_state(int cpu); | |
096d21c6 AK |
144 | extern void exynos_cluster_power_down(int cluster); |
145 | extern void exynos_cluster_power_up(int cluster); | |
146 | extern int exynos_cluster_power_state(int cluster); | |
0d713cf1 BZ |
147 | extern void exynos_cpu_save_register(void); |
148 | extern void exynos_cpu_restore_register(void); | |
149 | extern void exynos_pm_central_suspend(void); | |
150 | extern int exynos_pm_central_resume(void); | |
3681bafe | 151 | extern void exynos_enter_aftr(void); |
ccd458c1 | 152 | |
7cb2ded1 SK |
153 | extern void s5p_init_cpu(void __iomem *cpuid_addr); |
154 | extern unsigned int samsung_rev(void); | |
155 | ||
2e94ac42 PD |
156 | static inline void pmu_raw_writel(u32 val, u32 offset) |
157 | { | |
158 | __raw_writel(val, pmu_base_addr + offset); | |
159 | } | |
160 | ||
161 | static inline u32 pmu_raw_readl(u32 offset) | |
162 | { | |
163 | return __raw_readl(pmu_base_addr + offset); | |
164 | } | |
165 | ||
cc511b8d | 166 | #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */ |