[mirror_ubuntu-hirsute-kernel.git] / arch / arm / mach-exynos / mach-smdkv310.c

/* linux/arch/arm/mach-exynos4/mach-smdkv310.c
 *
 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

#include <linux/serial_core.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/lcd.h>
#include <linux/mmc/host.h>
#include <linux/platform_device.h>
#include <linux/smsc911x.h>
#include <linux/io.h>
#include <linux/i2c.h>
#include <linux/input.h>
#include <linux/pwm_backlight.h>

#include <asm/mach/arch.h>
#include <asm/mach-types.h>

#include <video/platform_lcd.h>
#include <plat/regs-serial.h>
#include <plat/regs-srom.h>
#include <plat/regs-fb-v4.h>
#include <plat/exynos4.h>
#include <plat/cpu.h>
#include <plat/devs.h>
#include <plat/fb.h>
#include <plat/keypad.h>
#include <plat/sdhci.h>
#include <plat/iic.h>
#include <plat/pd.h>
#include <plat/gpio-cfg.h>
#include <plat/backlight.h>
#include <plat/mfc.h>
#include <plat/ehci.h>
#include <plat/clock.h>

#include <mach/map.h>
#include <mach/ohci.h>

/* Following are default values for UCON, ULCON and UFCON UART registers */
#define SMDKV310_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
				 S3C2410_UCON_RXILEVEL |	\
				 S3C2410_UCON_TXIRQMODE |	\
				 S3C2410_UCON_RXIRQMODE |	\
				 S3C2410_UCON_RXFIFO_TOI |	\
				 S3C2443_UCON_RXERR_IRQEN)

#define SMDKV310_ULCON_DEFAULT	S3C2410_LCON_CS8

#define SMDKV310_UFCON_DEFAULT	(S3C2410_UFCON_FIFOMODE |	\
				 S5PV210_UFCON_TXTRIG4 |	\
				 S5PV210_UFCON_RXTRIG4)

static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
	[0] = {
		.hwport		= 0,
		.flags		= 0,
		.ucon		= SMDKV310_UCON_DEFAULT,
		.ulcon		= SMDKV310_ULCON_DEFAULT,
		.ufcon		= SMDKV310_UFCON_DEFAULT,
	},
	[1] = {
		.hwport		= 1,
		.flags		= 0,
		.ucon		= SMDKV310_UCON_DEFAULT,
		.ulcon		= SMDKV310_ULCON_DEFAULT,
		.ufcon		= SMDKV310_UFCON_DEFAULT,
	},
	[2] = {
		.hwport		= 2,
		.flags		= 0,
		.ucon		= SMDKV310_UCON_DEFAULT,
		.ulcon		= SMDKV310_ULCON_DEFAULT,
		.ufcon		= SMDKV310_UFCON_DEFAULT,
	},
	[3] = {
		.hwport		= 3,
		.flags		= 0,
		.ucon		= SMDKV310_UCON_DEFAULT,
		.ulcon		= SMDKV310_ULCON_DEFAULT,
		.ufcon		= SMDKV310_UFCON_DEFAULT,
	},
};

static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
	.cd_type		= S3C_SDHCI_CD_INTERNAL,
	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,
#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
	.max_width		= 8,
	.host_caps		= MMC_CAP_8_BIT_DATA,
#endif
};

static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
	.cd_type		= S3C_SDHCI_CD_GPIO,
	.ext_cd_gpio		= EXYNOS4_GPK0(2),
	.ext_cd_gpio_invert	= 1,
	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,
};

static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
	.cd_type		= S3C_SDHCI_CD_INTERNAL,
	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,
#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
	.max_width		= 8,
	.host_caps		= MMC_CAP_8_BIT_DATA,
#endif
};

static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
	.cd_type		= S3C_SDHCI_CD_GPIO,
	.ext_cd_gpio		= EXYNOS4_GPK2(2),
	.ext_cd_gpio_invert	= 1,
	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,
};

static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
				   unsigned int power)
{
	if (power) {
#if !defined(CONFIG_BACKLIGHT_PWM)
		gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
		gpio_free(EXYNOS4_GPD0(1));
#endif
		/* fire nRESET on power up */
		gpio_request(EXYNOS4_GPX0(6), "GPX0");

		gpio_direction_output(EXYNOS4_GPX0(6), 1);
		mdelay(100);

		gpio_set_value(EXYNOS4_GPX0(6), 0);
		mdelay(10);

		gpio_set_value(EXYNOS4_GPX0(6), 1);
		mdelay(10);

		gpio_free(EXYNOS4_GPX0(6));
	} else {
#if !defined(CONFIG_BACKLIGHT_PWM)
		gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
		gpio_free(EXYNOS4_GPD0(1));
#endif
	}
}

static struct plat_lcd_data smdkv310_lcd_lte480wv_data = {
	.set_power		= lcd_lte480wv_set_power,
};

static struct platform_device smdkv310_lcd_lte480wv = {
	.name			= "platform-lcd",
	.dev.parent		= &s5p_device_fimd0.dev,
	.dev.platform_data	= &smdkv310_lcd_lte480wv_data,
};

static struct s3c_fb_pd_win smdkv310_fb_win0 = {
	.win_mode = {
		.left_margin	= 13,
		.right_margin	= 8,
		.upper_margin	= 7,
		.lower_margin	= 5,
		.hsync_len	= 3,
		.vsync_len	= 1,
		.xres		= 800,
		.yres		= 480,
	},
	.max_bpp		= 32,
	.default_bpp		= 24,
};

static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
	.win[0]		= &smdkv310_fb_win0,
	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
	.setup_gpio	= exynos4_fimd0_gpio_setup_24bpp,
};

static struct resource smdkv310_smsc911x_resources[] = {
	[0] = {
		.start	= EXYNOS4_PA_SROM_BANK(1),
		.end	= EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_EINT(5),
		.end	= IRQ_EINT(5),
		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
	},
};

static struct smsc911x_platform_config smsc9215_config = {
	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
	.flags		= SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
	.phy_interface	= PHY_INTERFACE_MODE_MII,
	.mac		= {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
};

static struct platform_device smdkv310_smsc911x = {
	.name		= "smsc911x",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(smdkv310_smsc911x_resources),
	.resource	= smdkv310_smsc911x_resources,
	.dev		= {
		.platform_data	= &smsc9215_config,
	},
};

static uint32_t smdkv310_keymap[] __initdata = {
	/* KEY(row, col, keycode) */
	KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
	KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
	KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
	KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
};

static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
	.keymap		= smdkv310_keymap,
	.keymap_size	= ARRAY_SIZE(smdkv310_keymap),
};

static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
	.keymap_data	= &smdkv310_keymap_data,
	.rows		= 2,
	.cols		= 8,
};

static struct i2c_board_info i2c_devs1[] __initdata = {
	{I2C_BOARD_INFO("wm8994", 0x1a),},
};

/* USB EHCI */
static struct s5p_ehci_platdata smdkv310_ehci_pdata;

static void __init smdkv310_ehci_init(void)
{
	struct s5p_ehci_platdata *pdata = &smdkv310_ehci_pdata;

	s5p_ehci_set_platdata(pdata);
}

/* USB OHCI */
static struct exynos4_ohci_platdata smdkv310_ohci_pdata;

static void __init smdkv310_ohci_init(void)
{
	struct exynos4_ohci_platdata *pdata = &smdkv310_ohci_pdata;

	exynos4_ohci_set_platdata(pdata);
}

static struct platform_device *smdkv310_devices[] __initdata = {
	&s3c_device_hsmmc0,
	&s3c_device_hsmmc1,
	&s3c_device_hsmmc2,
	&s3c_device_hsmmc3,
	&s3c_device_i2c1,
	&s5p_device_i2c_hdmiphy,
	&s3c_device_rtc,
	&s3c_device_wdt,
	&s5p_device_ehci,
	&s5p_device_fimc0,
	&s5p_device_fimc1,
	&s5p_device_fimc2,
	&s5p_device_fimc3,
	&exynos4_device_ac97,
	&exynos4_device_i2s0,
	&exynos4_device_ohci,
	&samsung_device_keypad,
	&s5p_device_mfc,
	&s5p_device_mfc_l,
	&s5p_device_mfc_r,
	&exynos4_device_pd[PD_MFC],
	&exynos4_device_pd[PD_G3D],
	&exynos4_device_pd[PD_LCD0],
	&exynos4_device_pd[PD_LCD1],
	&exynos4_device_pd[PD_CAM],
	&exynos4_device_pd[PD_TV],
	&exynos4_device_pd[PD_GPS],
	&exynos4_device_spdif,
	&exynos4_device_sysmmu,
	&samsung_asoc_dma,
	&samsung_asoc_idma,
	&s5p_device_fimd0,
	&smdkv310_lcd_lte480wv,
	&smdkv310_smsc911x,
	&exynos4_device_ahci,
	&s5p_device_hdmi,
	&s5p_device_mixer,
};

static void __init smdkv310_smsc911x_init(void)
{
	u32 cs1;

	/* configure nCS1 width to 16 bits */
	cs1 = __raw_readl(S5P_SROM_BW) &
		~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
	cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
		(1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
		(1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
		S5P_SROM_BW__NCS1__SHIFT;
	__raw_writel(cs1, S5P_SROM_BW);

	/* set timing for nCS1 suitable for ethernet chip */
	__raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
		     (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
		     (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
		     (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
		     (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
		     (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
		     (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
}

/* LCD Backlight data */
static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
	.no = EXYNOS4_GPD0(1),
	.func = S3C_GPIO_SFN(2),
};

static struct platform_pwm_backlight_data smdkv310_bl_data = {
	.pwm_id = 1,
	.pwm_period_ns  = 1000,
};

static void s5p_tv_setup(void)
{
	/* direct HPD to HDMI chip */
	WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"));
	s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
	s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);

	/* setup dependencies between TV devices */
	s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
	s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
}

static void __init smdkv310_map_io(void)
{
	s5p_init_io(NULL, 0, S5P_VA_CHIPID);
	s3c24xx_init_clocks(24000000);
	s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
}

static void __init smdkv310_reserve(void)
{
	s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
}

static void __init smdkv310_machine_init(void)
{
	s3c_i2c1_set_platdata(NULL);
	i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));

	smdkv310_smsc911x_init();

	s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
	s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
	s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
	s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);

	s5p_tv_setup();
	s5p_i2c_hdmiphy_set_platdata(NULL);

	samsung_keypad_set_platdata(&smdkv310_keypad_data);

	samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
	s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);

	smdkv310_ehci_init();
	smdkv310_ohci_init();
	clk_xusbxti.rate = 24000000;

	platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
	s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
}

MACHINE_START(SMDKV310, "SMDKV310")
	/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
	/* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
	.atag_offset	= 0x100,
	.init_irq	= exynos4_init_irq,
	.map_io		= smdkv310_map_io,
	.init_machine	= smdkv310_machine_init,
	.timer		= &exynos4_timer,
	.reserve	= &smdkv310_reserve,
MACHINE_END

MACHINE_START(SMDKC210, "SMDKC210")
	/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
	.atag_offset	= 0x100,
	.init_irq	= exynos4_init_irq,
	.map_io		= smdkv310_map_io,
	.init_machine	= smdkv310_machine_init,
	.timer		= &exynos4_timer,
MACHINE_END
Commit	Line	Data
d11135ca	1	/* linux/arch/arm/mach-exynos4/mach-smdkv310.c
b1d69cc6	2	*
d11135ca KK	3	* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
d11135ca KK	4	* http://www.samsung.com
b1d69cc6 CY	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*/
	10
	11	#include <linux/serial_core.h>
42c0d26d	12	#include <linux/delay.h>
2b11148a	13	#include <linux/gpio.h>
42c0d26d	14	#include <linux/lcd.h>
2b11148a HL	15	#include <linux/mmc/host.h>
2b11148a HL	16	#include <linux/platform_device.h>
cbff3eb3 DM	17	#include <linux/smsc911x.h>
cbff3eb3 DM	18	#include <linux/io.h>
6f5c11c5	19	#include <linux/i2c.h>
be4c33be	20	#include <linux/input.h>
8689de73	21	#include <linux/pwm_backlight.h>
b1d69cc6 CY	22
	23	#include <asm/mach/arch.h>
	24	#include <asm/mach-types.h>
b1d69cc6	25
42c0d26d	26	#include <video/platform_lcd.h>
b1d69cc6	27	#include <plat/regs-serial.h>
8cf460a5	28	#include <plat/regs-srom.h>
42c0d26d	29	#include <plat/regs-fb-v4.h>
d11135ca	30	#include <plat/exynos4.h>
b1d69cc6	31	#include <plat/cpu.h>
cdff6e6f	32	#include <plat/devs.h>
42c0d26d	33	#include <plat/fb.h>
be4c33be	34	#include <plat/keypad.h>
2b11148a	35	#include <plat/sdhci.h>
6f5c11c5	36	#include <plat/iic.h>
d6d8b481	37	#include <plat/pd.h>
8689de73 BG	38	#include <plat/gpio-cfg.h>
8689de73 BG	39	#include <plat/backlight.h>
95727e1f	40	#include <plat/mfc.h>
9830f6a2 JH	41	#include <plat/ehci.h>
9830f6a2 JH	42	#include <plat/clock.h>
b1d69cc6 CY	43
b1d69cc6 CY	44	#include <mach/map.h>
744f20f2	45	#include <mach/ohci.h>
b1d69cc6 CY	46
	47	/* Following are default values for UCON, ULCON and UFCON UART registers */
	48	#define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL \| \
	49	S3C2410_UCON_RXILEVEL \| \
	50	S3C2410_UCON_TXIRQMODE \| \
	51	S3C2410_UCON_RXIRQMODE \| \
	52	S3C2410_UCON_RXFIFO_TOI \| \
	53	S3C2443_UCON_RXERR_IRQEN)
	54
	55	#define SMDKV310_ULCON_DEFAULT S3C2410_LCON_CS8
	56
	57	#define SMDKV310_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE \| \
	58	S5PV210_UFCON_TXTRIG4 \| \
	59	S5PV210_UFCON_RXTRIG4)
	60
	61	static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
	62	[0] = {
	63	.hwport = 0,
	64	.flags = 0,
	65	.ucon = SMDKV310_UCON_DEFAULT,
	66	.ulcon = SMDKV310_ULCON_DEFAULT,
	67	.ufcon = SMDKV310_UFCON_DEFAULT,
	68	},
	69	[1] = {
	70	.hwport = 1,
	71	.flags = 0,
	72	.ucon = SMDKV310_UCON_DEFAULT,
	73	.ulcon = SMDKV310_ULCON_DEFAULT,
	74	.ufcon = SMDKV310_UFCON_DEFAULT,
	75	},
	76	[2] = {
	77	.hwport = 2,
	78	.flags = 0,
	79	.ucon = SMDKV310_UCON_DEFAULT,
	80	.ulcon = SMDKV310_ULCON_DEFAULT,
	81	.ufcon = SMDKV310_UFCON_DEFAULT,
	82	},
	83	[3] = {
	84	.hwport = 3,
	85	.flags = 0,
	86	.ucon = SMDKV310_UCON_DEFAULT,
	87	.ulcon = SMDKV310_ULCON_DEFAULT,
	88	.ufcon = SMDKV310_UFCON_DEFAULT,
	89	},
	90	};
	91
2b11148a	92	static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
a0d8efed	93	.cd_type = S3C_SDHCI_CD_INTERNAL,
28c80aa7	94	.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
d11135ca	95	#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
2b11148a HL	96	.max_width = 8,
	97	.host_caps = MMC_CAP_8_BIT_DATA,
	98	#endif
	99	};
	100
	101	static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
	102	.cd_type = S3C_SDHCI_CD_GPIO,
d11135ca	103	.ext_cd_gpio = EXYNOS4_GPK0(2),
2b11148a	104	.ext_cd_gpio_invert = 1,
28c80aa7	105	.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
2b11148a HL	106	};
	107
	108	static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
a0d8efed	109	.cd_type = S3C_SDHCI_CD_INTERNAL,
28c80aa7	110	.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
d11135ca	111	#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
2b11148a HL	112	.max_width = 8,
	113	.host_caps = MMC_CAP_8_BIT_DATA,
	114	#endif
	115	};
	116
	117	static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
	118	.cd_type = S3C_SDHCI_CD_GPIO,
d11135ca	119	.ext_cd_gpio = EXYNOS4_GPK2(2),
2b11148a	120	.ext_cd_gpio_invert = 1,
28c80aa7	121	.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
2b11148a HL	122	};
2b11148a HL	123
42c0d26d KK	124	static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
	125	unsigned int power)
	126	{
	127	if (power) {
	128	#if !defined(CONFIG_BACKLIGHT_PWM)
	129	gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
	130	gpio_free(EXYNOS4_GPD0(1));
	131	#endif
	132	/* fire nRESET on power up */
	133	gpio_request(EXYNOS4_GPX0(6), "GPX0");
	134
	135	gpio_direction_output(EXYNOS4_GPX0(6), 1);
	136	mdelay(100);
	137
	138	gpio_set_value(EXYNOS4_GPX0(6), 0);
	139	mdelay(10);
	140
	141	gpio_set_value(EXYNOS4_GPX0(6), 1);
	142	mdelay(10);
	143
	144	gpio_free(EXYNOS4_GPX0(6));
	145	} else {
	146	#if !defined(CONFIG_BACKLIGHT_PWM)
	147	gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
	148	gpio_free(EXYNOS4_GPD0(1));
	149	#endif
	150	}
	151	}
	152
	153	static struct plat_lcd_data smdkv310_lcd_lte480wv_data = {
	154	.set_power = lcd_lte480wv_set_power,
	155	};
	156
	157	static struct platform_device smdkv310_lcd_lte480wv = {
	158	.name = "platform-lcd",
	159	.dev.parent = &s5p_device_fimd0.dev,
	160	.dev.platform_data = &smdkv310_lcd_lte480wv_data,
	161	};
	162
	163	static struct s3c_fb_pd_win smdkv310_fb_win0 = {
	164	.win_mode = {
	165	.left_margin = 13,
	166	.right_margin = 8,
	167	.upper_margin = 7,
	168	.lower_margin = 5,
	169	.hsync_len = 3,
	170	.vsync_len = 1,
	171	.xres = 800,
	172	.yres = 480,
	173	},
	174	.max_bpp = 32,
	175	.default_bpp = 24,
	176	};
	177
	178	static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
	179	.win[0] = &smdkv310_fb_win0,
	180	.vidcon0 = VIDCON0_VIDOUT_RGB \| VIDCON0_PNRMODE_RGB,
	181	.vidcon1 = VIDCON1_INV_HSYNC \| VIDCON1_INV_VSYNC,
	182	.setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
	183	};
	184
cbff3eb3 DM	185	static struct resource smdkv310_smsc911x_resources[] = {
cbff3eb3 DM	186	[0] = {
d11135ca KK	187	.start = EXYNOS4_PA_SROM_BANK(1),
d11135ca KK	188	.end = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
cbff3eb3 DM	189	.flags = IORESOURCE_MEM,
	190	},
	191	[1] = {
	192	.start = IRQ_EINT(5),
	193	.end = IRQ_EINT(5),
	194	.flags = IORESOURCE_IRQ \| IRQF_TRIGGER_LOW,
	195	},
	196	};
	197
	198	static struct smsc911x_platform_config smsc9215_config = {
cd0527c2	199	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
cbff3eb3 DM	200	.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
	201	.flags = SMSC911X_USE_16BIT \| SMSC911X_FORCE_INTERNAL_PHY,
	202	.phy_interface = PHY_INTERFACE_MODE_MII,
	203	.mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
	204	};
	205
	206	static struct platform_device smdkv310_smsc911x = {
	207	.name = "smsc911x",
	208	.id = -1,
	209	.num_resources = ARRAY_SIZE(smdkv310_smsc911x_resources),
	210	.resource = smdkv310_smsc911x_resources,
	211	.dev = {
	212	.platform_data = &smsc9215_config,
	213	},
	214	};
	215
be4c33be NKC	216	static uint32_t smdkv310_keymap[] __initdata = {
	217	/* KEY(row, col, keycode) */
	218	KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
	219	KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
	220	KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
	221	KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
	222	};
	223
	224	static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
	225	.keymap = smdkv310_keymap,
	226	.keymap_size = ARRAY_SIZE(smdkv310_keymap),
	227	};
	228
	229	static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
	230	.keymap_data = &smdkv310_keymap_data,
	231	.rows = 2,
	232	.cols = 8,
	233	};
	234
6f5c11c5 JB	235	static struct i2c_board_info i2c_devs1[] __initdata = {
	236	{I2C_BOARD_INFO("wm8994", 0x1a),},
	237	};
	238
9830f6a2 JH	239	/* USB EHCI */
	240	static struct s5p_ehci_platdata smdkv310_ehci_pdata;
	241
	242	static void __init smdkv310_ehci_init(void)
	243	{
	244	struct s5p_ehci_platdata *pdata = &smdkv310_ehci_pdata;
	245
	246	s5p_ehci_set_platdata(pdata);
	247	}
	248
744f20f2 JH	249	/* USB OHCI */
	250	static struct exynos4_ohci_platdata smdkv310_ohci_pdata;
	251
	252	static void __init smdkv310_ohci_init(void)
	253	{
	254	struct exynos4_ohci_platdata *pdata = &smdkv310_ohci_pdata;
	255
	256	exynos4_ohci_set_platdata(pdata);
	257	}
	258
cdff6e6f	259	static struct platform_device *smdkv310_devices[] __initdata = {
2b11148a HL	260	&s3c_device_hsmmc0,
	261	&s3c_device_hsmmc1,
	262	&s3c_device_hsmmc2,
	263	&s3c_device_hsmmc3,
285dee7f	264	&s3c_device_i2c1,
c0735c85	265	&s5p_device_i2c_hdmiphy,
cdff6e6f	266	&s3c_device_rtc,
8d75c912	267	&s3c_device_wdt,
9830f6a2	268	&s5p_device_ehci,
568f0e27 SK	269	&s5p_device_fimc0,
	270	&s5p_device_fimc1,
	271	&s5p_device_fimc2,
	272	&s5p_device_fimc3,
d11135ca KK	273	&exynos4_device_ac97,
d11135ca KK	274	&exynos4_device_i2s0,
744f20f2	275	&exynos4_device_ohci,
be4c33be	276	&samsung_device_keypad,
95727e1f SK	277	&s5p_device_mfc,
	278	&s5p_device_mfc_l,
	279	&s5p_device_mfc_r,
d11135ca KK	280	&exynos4_device_pd[PD_MFC],
	281	&exynos4_device_pd[PD_G3D],
	282	&exynos4_device_pd[PD_LCD0],
	283	&exynos4_device_pd[PD_LCD1],
	284	&exynos4_device_pd[PD_CAM],
	285	&exynos4_device_pd[PD_TV],
	286	&exynos4_device_pd[PD_GPS],
2ba707ac	287	&exynos4_device_spdif,
d11135ca	288	&exynos4_device_sysmmu,
fbcb44de	289	&samsung_asoc_dma,
2839cc1e	290	&samsung_asoc_idma,
42c0d26d KK	291	&s5p_device_fimd0,
42c0d26d KK	292	&smdkv310_lcd_lte480wv,
fbcb44de	293	&smdkv310_smsc911x,
0d855f40	294	&exynos4_device_ahci,
c0735c85 HA	295	&s5p_device_hdmi,
c0735c85 HA	296	&s5p_device_mixer,
cdff6e6f CY	297	};
cdff6e6f CY	298
cbff3eb3 DM	299	static void __init smdkv310_smsc911x_init(void)
	300	{
	301	u32 cs1;
	302
	303	/* configure nCS1 width to 16 bits */
8cf460a5 KK	304	cs1 = __raw_readl(S5P_SROM_BW) &
	305	~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
	306	cs1 \|= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) \|
	307	(1 << S5P_SROM_BW__WAITENABLE__SHIFT) \|
	308	(1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
	309	S5P_SROM_BW__NCS1__SHIFT;
	310	__raw_writel(cs1, S5P_SROM_BW);
cbff3eb3 DM	311
cbff3eb3 DM	312	/* set timing for nCS1 suitable for ethernet chip */
8cf460a5 KK	313	__raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) \|
	314	(0x9 << S5P_SROM_BCX__TACP__SHIFT) \|
	315	(0xc << S5P_SROM_BCX__TCAH__SHIFT) \|
	316	(0x1 << S5P_SROM_BCX__TCOH__SHIFT) \|
	317	(0x6 << S5P_SROM_BCX__TACC__SHIFT) \|
	318	(0x1 << S5P_SROM_BCX__TCOS__SHIFT) \|
	319	(0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
cbff3eb3 DM	320	}
cbff3eb3 DM	321
8689de73 BG	322	/* LCD Backlight data */
	323	static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
	324	.no = EXYNOS4_GPD0(1),
	325	.func = S3C_GPIO_SFN(2),
	326	};
	327
	328	static struct platform_pwm_backlight_data smdkv310_bl_data = {
	329	.pwm_id = 1,
	330	.pwm_period_ns = 1000,
	331	};
	332
c0735c85 HA	333	static void s5p_tv_setup(void)
	334	{
	335	/* direct HPD to HDMI chip */
	336	WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"));
	337	s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
	338	s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
	339
	340	/* setup dependencies between TV devices */
	341	s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
	342	s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
	343	}
	344
b1d69cc6 CY	345	static void __init smdkv310_map_io(void)
	346	{
	347	s5p_init_io(NULL, 0, S5P_VA_CHIPID);
	348	s3c24xx_init_clocks(24000000);
	349	s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
	350	}
	351
95727e1f SK	352	static void __init smdkv310_reserve(void)
	353	{
	354	s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
	355	}
	356
b1d69cc6 CY	357	static void __init smdkv310_machine_init(void)
b1d69cc6 CY	358	{
6f5c11c5 JB	359	s3c_i2c1_set_platdata(NULL);
	360	i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
	361
cbff3eb3 DM	362	smdkv310_smsc911x_init();
cbff3eb3 DM	363
2b11148a HL	364	s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
	365	s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
	366	s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
	367	s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
	368
c0735c85 HA	369	s5p_tv_setup();
	370	s5p_i2c_hdmiphy_set_platdata(NULL);
	371
be4c33be NKC	372	samsung_keypad_set_platdata(&smdkv310_keypad_data);
be4c33be NKC	373
8689de73	374	samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
42c0d26d	375	s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
8689de73	376
9830f6a2	377	smdkv310_ehci_init();
744f20f2	378	smdkv310_ohci_init();
9830f6a2 JH	379	clk_xusbxti.rate = 24000000;
9830f6a2 JH	380
cdff6e6f	381	platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
95727e1f	382	s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
b1d69cc6 CY	383	}
	384
	385	MACHINE_START(SMDKV310, "SMDKV310")
	386	/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
	387	/* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
1abd328e	388	.atag_offset = 0x100,
d11135ca	389	.init_irq = exynos4_init_irq,
b1d69cc6 CY	390	.map_io = smdkv310_map_io,
b1d69cc6 CY	391	.init_machine = smdkv310_machine_init,
d11135ca	392	.timer = &exynos4_timer,
95727e1f	393	.reserve = &smdkv310_reserve,
b1d69cc6	394	MACHINE_END
42c0d26d KK	395
	396	MACHINE_START(SMDKC210, "SMDKC210")
	397	/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
1abd328e	398	.atag_offset = 0x100,
42c0d26d KK	399	.init_irq = exynos4_init_irq,
	400	.map_io = smdkv310_map_io,
	401	.init_machine = smdkv310_machine_init,
	402	.timer = &exynos4_timer,
	403	MACHINE_END