[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-exynos4 / mach-smdkv310.c

/* linux/arch/arm/mach-exynos4/mach-smdkv310.c
 *
 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

#include <linux/serial_core.h>
#include <linux/gpio.h>
#include <linux/mmc/host.h>
#include <linux/platform_device.h>
#include <linux/smsc911x.h>
#include <linux/io.h>
#include <linux/i2c.h>
#include <linux/input.h>

#include <asm/mach/arch.h>
#include <asm/mach-types.h>

#include <plat/regs-serial.h>
#include <plat/regs-srom.h>
#include <plat/exynos4.h>
#include <plat/cpu.h>
#include <plat/devs.h>
#include <plat/keypad.h>
#include <plat/sdhci.h>
#include <plat/iic.h>
#include <plat/pd.h>

#include <mach/map.h>

/* Following are default values for UCON, ULCON and UFCON UART registers */
#define SMDKV310_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
				 S3C2410_UCON_RXILEVEL |	\
				 S3C2410_UCON_TXIRQMODE |	\
				 S3C2410_UCON_RXIRQMODE |	\
				 S3C2410_UCON_RXFIFO_TOI |	\
				 S3C2443_UCON_RXERR_IRQEN)

#define SMDKV310_ULCON_DEFAULT	S3C2410_LCON_CS8

#define SMDKV310_UFCON_DEFAULT	(S3C2410_UFCON_FIFOMODE |	\
				 S5PV210_UFCON_TXTRIG4 |	\
				 S5PV210_UFCON_RXTRIG4)

static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
	[0] = {
		.hwport		= 0,
		.flags		= 0,
		.ucon		= SMDKV310_UCON_DEFAULT,
		.ulcon		= SMDKV310_ULCON_DEFAULT,
		.ufcon		= SMDKV310_UFCON_DEFAULT,
	},
	[1] = {
		.hwport		= 1,
		.flags		= 0,
		.ucon		= SMDKV310_UCON_DEFAULT,
		.ulcon		= SMDKV310_ULCON_DEFAULT,
		.ufcon		= SMDKV310_UFCON_DEFAULT,
	},
	[2] = {
		.hwport		= 2,
		.flags		= 0,
		.ucon		= SMDKV310_UCON_DEFAULT,
		.ulcon		= SMDKV310_ULCON_DEFAULT,
		.ufcon		= SMDKV310_UFCON_DEFAULT,
	},
	[3] = {
		.hwport		= 3,
		.flags		= 0,
		.ucon		= SMDKV310_UCON_DEFAULT,
		.ulcon		= SMDKV310_ULCON_DEFAULT,
		.ufcon		= SMDKV310_UFCON_DEFAULT,
	},
};

static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
	.cd_type		= S3C_SDHCI_CD_GPIO,
	.ext_cd_gpio		= EXYNOS4_GPK0(2),
	.ext_cd_gpio_invert	= 1,
	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,
#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
	.max_width		= 8,
	.host_caps		= MMC_CAP_8_BIT_DATA,
#endif
};

static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
	.cd_type		= S3C_SDHCI_CD_GPIO,
	.ext_cd_gpio		= EXYNOS4_GPK0(2),
	.ext_cd_gpio_invert	= 1,
	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,
};

static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
	.cd_type		= S3C_SDHCI_CD_GPIO,
	.ext_cd_gpio		= EXYNOS4_GPK2(2),
	.ext_cd_gpio_invert	= 1,
	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,
#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
	.max_width		= 8,
	.host_caps		= MMC_CAP_8_BIT_DATA,
#endif
};

static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
	.cd_type		= S3C_SDHCI_CD_GPIO,
	.ext_cd_gpio		= EXYNOS4_GPK2(2),
	.ext_cd_gpio_invert	= 1,
	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,
};

static struct resource smdkv310_smsc911x_resources[] = {
	[0] = {
		.start	= EXYNOS4_PA_SROM_BANK(1),
		.end	= EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_EINT(5),
		.end	= IRQ_EINT(5),
		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
	},
};

static struct smsc911x_platform_config smsc9215_config = {
	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
	.flags		= SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
	.phy_interface	= PHY_INTERFACE_MODE_MII,
	.mac		= {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
};

static struct platform_device smdkv310_smsc911x = {
	.name		= "smsc911x",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(smdkv310_smsc911x_resources),
	.resource	= smdkv310_smsc911x_resources,
	.dev		= {
		.platform_data	= &smsc9215_config,
	},
};

static uint32_t smdkv310_keymap[] __initdata = {
	/* KEY(row, col, keycode) */
	KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
	KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
	KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
	KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
};

static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
	.keymap		= smdkv310_keymap,
	.keymap_size	= ARRAY_SIZE(smdkv310_keymap),
};

static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
	.keymap_data	= &smdkv310_keymap_data,
	.rows		= 2,
	.cols		= 8,
};

static struct i2c_board_info i2c_devs1[] __initdata = {
	{I2C_BOARD_INFO("wm8994", 0x1a),},
};

static struct platform_device *smdkv310_devices[] __initdata = {
	&s3c_device_hsmmc0,
	&s3c_device_hsmmc1,
	&s3c_device_hsmmc2,
	&s3c_device_hsmmc3,
	&s3c_device_i2c1,
	&s3c_device_rtc,
	&s3c_device_wdt,
	&exynos4_device_ac97,
	&exynos4_device_i2s0,
	&samsung_device_keypad,
	&exynos4_device_pd[PD_MFC],
	&exynos4_device_pd[PD_G3D],
	&exynos4_device_pd[PD_LCD0],
	&exynos4_device_pd[PD_LCD1],
	&exynos4_device_pd[PD_CAM],
	&exynos4_device_pd[PD_TV],
	&exynos4_device_pd[PD_GPS],
	&exynos4_device_sysmmu,
	&samsung_asoc_dma,
	&smdkv310_smsc911x,
};

static void __init smdkv310_smsc911x_init(void)
{
	u32 cs1;

	/* configure nCS1 width to 16 bits */
	cs1 = __raw_readl(S5P_SROM_BW) &
		~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
	cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
		(1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
		(1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
		S5P_SROM_BW__NCS1__SHIFT;
	__raw_writel(cs1, S5P_SROM_BW);

	/* set timing for nCS1 suitable for ethernet chip */
	__raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
		     (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
		     (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
		     (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
		     (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
		     (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
		     (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
}

static void __init smdkv310_map_io(void)
{
	s5p_init_io(NULL, 0, S5P_VA_CHIPID);
	s3c24xx_init_clocks(24000000);
	s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
}

static void __init smdkv310_machine_init(void)
{
	s3c_i2c1_set_platdata(NULL);
	i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));

	smdkv310_smsc911x_init();

	s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
	s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
	s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
	s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);

	samsung_keypad_set_platdata(&smdkv310_keypad_data);

	platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
}

MACHINE_START(SMDKV310, "SMDKV310")
	/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
	/* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
	.boot_params	= S5P_PA_SDRAM + 0x100,
	.init_irq	= exynos4_init_irq,
	.map_io		= smdkv310_map_io,
	.init_machine	= smdkv310_machine_init,
	.timer		= &exynos4_timer,
MACHINE_END
Commit	Line	Data
d11135ca	1	/* linux/arch/arm/mach-exynos4/mach-smdkv310.c
b1d69cc6	2	*
d11135ca KK	3	* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
d11135ca KK	4	* http://www.samsung.com
b1d69cc6 CY	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*/
	10
	11	#include <linux/serial_core.h>
2b11148a HL	12	#include <linux/gpio.h>
	13	#include <linux/mmc/host.h>
	14	#include <linux/platform_device.h>
cbff3eb3 DM	15	#include <linux/smsc911x.h>
cbff3eb3 DM	16	#include <linux/io.h>
6f5c11c5	17	#include <linux/i2c.h>
be4c33be	18	#include <linux/input.h>
b1d69cc6 CY	19
	20	#include <asm/mach/arch.h>
	21	#include <asm/mach-types.h>
b1d69cc6 CY	22
b1d69cc6 CY	23	#include <plat/regs-serial.h>
8cf460a5	24	#include <plat/regs-srom.h>
d11135ca	25	#include <plat/exynos4.h>
b1d69cc6	26	#include <plat/cpu.h>
cdff6e6f	27	#include <plat/devs.h>
be4c33be	28	#include <plat/keypad.h>
2b11148a	29	#include <plat/sdhci.h>
6f5c11c5	30	#include <plat/iic.h>
d6d8b481	31	#include <plat/pd.h>
b1d69cc6 CY	32
	33	#include <mach/map.h>
	34
	35	/* Following are default values for UCON, ULCON and UFCON UART registers */
	36	#define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL \| \
	37	S3C2410_UCON_RXILEVEL \| \
	38	S3C2410_UCON_TXIRQMODE \| \
	39	S3C2410_UCON_RXIRQMODE \| \
	40	S3C2410_UCON_RXFIFO_TOI \| \
	41	S3C2443_UCON_RXERR_IRQEN)
	42
	43	#define SMDKV310_ULCON_DEFAULT S3C2410_LCON_CS8
	44
	45	#define SMDKV310_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE \| \
	46	S5PV210_UFCON_TXTRIG4 \| \
	47	S5PV210_UFCON_RXTRIG4)
	48
	49	static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
	50	[0] = {
	51	.hwport = 0,
	52	.flags = 0,
	53	.ucon = SMDKV310_UCON_DEFAULT,
	54	.ulcon = SMDKV310_ULCON_DEFAULT,
	55	.ufcon = SMDKV310_UFCON_DEFAULT,
	56	},
	57	[1] = {
	58	.hwport = 1,
	59	.flags = 0,
	60	.ucon = SMDKV310_UCON_DEFAULT,
	61	.ulcon = SMDKV310_ULCON_DEFAULT,
	62	.ufcon = SMDKV310_UFCON_DEFAULT,
	63	},
	64	[2] = {
	65	.hwport = 2,
	66	.flags = 0,
	67	.ucon = SMDKV310_UCON_DEFAULT,
	68	.ulcon = SMDKV310_ULCON_DEFAULT,
	69	.ufcon = SMDKV310_UFCON_DEFAULT,
	70	},
	71	[3] = {
	72	.hwport = 3,
	73	.flags = 0,
	74	.ucon = SMDKV310_UCON_DEFAULT,
	75	.ulcon = SMDKV310_ULCON_DEFAULT,
	76	.ufcon = SMDKV310_UFCON_DEFAULT,
	77	},
	78	};
	79
2b11148a HL	80	static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
2b11148a HL	81	.cd_type = S3C_SDHCI_CD_GPIO,
d11135ca	82	.ext_cd_gpio = EXYNOS4_GPK0(2),
2b11148a	83	.ext_cd_gpio_invert = 1,
28c80aa7	84	.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
d11135ca	85	#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
2b11148a HL	86	.max_width = 8,
	87	.host_caps = MMC_CAP_8_BIT_DATA,
	88	#endif
	89	};
	90
	91	static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
	92	.cd_type = S3C_SDHCI_CD_GPIO,
d11135ca	93	.ext_cd_gpio = EXYNOS4_GPK0(2),
2b11148a	94	.ext_cd_gpio_invert = 1,
28c80aa7	95	.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
2b11148a HL	96	};
	97
	98	static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
	99	.cd_type = S3C_SDHCI_CD_GPIO,
d11135ca	100	.ext_cd_gpio = EXYNOS4_GPK2(2),
2b11148a	101	.ext_cd_gpio_invert = 1,
28c80aa7	102	.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
d11135ca	103	#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
2b11148a HL	104	.max_width = 8,
	105	.host_caps = MMC_CAP_8_BIT_DATA,
	106	#endif
	107	};
	108
	109	static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
	110	.cd_type = S3C_SDHCI_CD_GPIO,
d11135ca	111	.ext_cd_gpio = EXYNOS4_GPK2(2),
2b11148a	112	.ext_cd_gpio_invert = 1,
28c80aa7	113	.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
2b11148a HL	114	};
2b11148a HL	115
cbff3eb3 DM	116	static struct resource smdkv310_smsc911x_resources[] = {
cbff3eb3 DM	117	[0] = {
d11135ca KK	118	.start = EXYNOS4_PA_SROM_BANK(1),
d11135ca KK	119	.end = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
cbff3eb3 DM	120	.flags = IORESOURCE_MEM,
	121	},
	122	[1] = {
	123	.start = IRQ_EINT(5),
	124	.end = IRQ_EINT(5),
	125	.flags = IORESOURCE_IRQ \| IRQF_TRIGGER_LOW,
	126	},
	127	};
	128
	129	static struct smsc911x_platform_config smsc9215_config = {
cd0527c2	130	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
cbff3eb3 DM	131	.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
	132	.flags = SMSC911X_USE_16BIT \| SMSC911X_FORCE_INTERNAL_PHY,
	133	.phy_interface = PHY_INTERFACE_MODE_MII,
	134	.mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
	135	};
	136
	137	static struct platform_device smdkv310_smsc911x = {
	138	.name = "smsc911x",
	139	.id = -1,
	140	.num_resources = ARRAY_SIZE(smdkv310_smsc911x_resources),
	141	.resource = smdkv310_smsc911x_resources,
	142	.dev = {
	143	.platform_data = &smsc9215_config,
	144	},
	145	};
	146
be4c33be NKC	147	static uint32_t smdkv310_keymap[] __initdata = {
	148	/* KEY(row, col, keycode) */
	149	KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
	150	KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
	151	KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
	152	KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
	153	};
	154
	155	static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
	156	.keymap = smdkv310_keymap,
	157	.keymap_size = ARRAY_SIZE(smdkv310_keymap),
	158	};
	159
	160	static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
	161	.keymap_data = &smdkv310_keymap_data,
	162	.rows = 2,
	163	.cols = 8,
	164	};
	165
6f5c11c5 JB	166	static struct i2c_board_info i2c_devs1[] __initdata = {
	167	{I2C_BOARD_INFO("wm8994", 0x1a),},
	168	};
	169
cdff6e6f	170	static struct platform_device *smdkv310_devices[] __initdata = {
2b11148a HL	171	&s3c_device_hsmmc0,
	172	&s3c_device_hsmmc1,
	173	&s3c_device_hsmmc2,
	174	&s3c_device_hsmmc3,
285dee7f	175	&s3c_device_i2c1,
cdff6e6f	176	&s3c_device_rtc,
8d75c912	177	&s3c_device_wdt,
d11135ca KK	178	&exynos4_device_ac97,
d11135ca KK	179	&exynos4_device_i2s0,
be4c33be	180	&samsung_device_keypad,
d11135ca KK	181	&exynos4_device_pd[PD_MFC],
	182	&exynos4_device_pd[PD_G3D],
	183	&exynos4_device_pd[PD_LCD0],
	184	&exynos4_device_pd[PD_LCD1],
	185	&exynos4_device_pd[PD_CAM],
	186	&exynos4_device_pd[PD_TV],
	187	&exynos4_device_pd[PD_GPS],
	188	&exynos4_device_sysmmu,
fbcb44de JB	189	&samsung_asoc_dma,
fbcb44de JB	190	&smdkv310_smsc911x,
cdff6e6f CY	191	};
cdff6e6f CY	192
cbff3eb3 DM	193	static void __init smdkv310_smsc911x_init(void)
	194	{
	195	u32 cs1;
	196
	197	/* configure nCS1 width to 16 bits */
8cf460a5 KK	198	cs1 = __raw_readl(S5P_SROM_BW) &
	199	~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
	200	cs1 \|= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) \|
	201	(1 << S5P_SROM_BW__WAITENABLE__SHIFT) \|
	202	(1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
	203	S5P_SROM_BW__NCS1__SHIFT;
	204	__raw_writel(cs1, S5P_SROM_BW);
cbff3eb3 DM	205
cbff3eb3 DM	206	/* set timing for nCS1 suitable for ethernet chip */
8cf460a5 KK	207	__raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) \|
	208	(0x9 << S5P_SROM_BCX__TACP__SHIFT) \|
	209	(0xc << S5P_SROM_BCX__TCAH__SHIFT) \|
	210	(0x1 << S5P_SROM_BCX__TCOH__SHIFT) \|
	211	(0x6 << S5P_SROM_BCX__TACC__SHIFT) \|
	212	(0x1 << S5P_SROM_BCX__TCOS__SHIFT) \|
	213	(0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
cbff3eb3 DM	214	}
cbff3eb3 DM	215
b1d69cc6 CY	216	static void __init smdkv310_map_io(void)
	217	{
	218	s5p_init_io(NULL, 0, S5P_VA_CHIPID);
	219	s3c24xx_init_clocks(24000000);
	220	s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
	221	}
	222
	223	static void __init smdkv310_machine_init(void)
	224	{
6f5c11c5 JB	225	s3c_i2c1_set_platdata(NULL);
	226	i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
	227
cbff3eb3 DM	228	smdkv310_smsc911x_init();
cbff3eb3 DM	229
2b11148a HL	230	s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
	231	s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
	232	s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
	233	s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
	234
be4c33be NKC	235	samsung_keypad_set_platdata(&smdkv310_keypad_data);
be4c33be NKC	236
cdff6e6f	237	platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
b1d69cc6 CY	238	}
	239
	240	MACHINE_START(SMDKV310, "SMDKV310")
	241	/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
	242	/* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
b1d69cc6	243	.boot_params = S5P_PA_SDRAM + 0x100,
d11135ca	244	.init_irq = exynos4_init_irq,
b1d69cc6 CY	245	.map_io = smdkv310_map_io,
b1d69cc6 CY	246	.init_machine = smdkv310_machine_init,
d11135ca	247	.timer = &exynos4_timer,
b1d69cc6	248	MACHINE_END