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220e6cf7 RH |
1 | /* |
2 | * Copyright 2010-2011 Calxeda, Inc. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License along with | |
14 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
15 | */ | |
16 | #include <linux/clk.h> | |
17 | #include <linux/clkdev.h> | |
0583fe47 | 18 | #include <linux/clocksource.h> |
1dc737c4 | 19 | #include <linux/dma-mapping.h> |
38431148 | 20 | #include <linux/input.h> |
220e6cf7 | 21 | #include <linux/io.h> |
0529e315 | 22 | #include <linux/irqchip.h> |
f2fc42b6 | 23 | #include <linux/pl320-ipc.h> |
220e6cf7 RH |
24 | #include <linux/of.h> |
25 | #include <linux/of_irq.h> | |
220e6cf7 | 26 | #include <linux/of_address.h> |
38431148 | 27 | #include <linux/reboot.h> |
1dc737c4 | 28 | #include <linux/amba/bus.h> |
60a66e37 | 29 | #include <linux/platform_device.h> |
be120397 | 30 | #include <linux/psci.h> |
220e6cf7 | 31 | |
220e6cf7 RH |
32 | #include <asm/hardware/cache-l2x0.h> |
33 | #include <asm/mach/arch.h> | |
52530343 | 34 | #include <asm/mach/map.h> |
220e6cf7 RH |
35 | |
36 | #include "core.h" | |
37 | #include "sysregs.h" | |
38 | ||
39 | void __iomem *sregs_base; | |
7a2848d3 | 40 | void __iomem *scu_base_addr; |
220e6cf7 RH |
41 | |
42 | static void __init highbank_scu_map_io(void) | |
43 | { | |
44 | unsigned long base; | |
45 | ||
46 | /* Get SCU base */ | |
47 | asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); | |
48 | ||
7a2848d3 | 49 | scu_base_addr = ioremap(base, SZ_4K); |
220e6cf7 RH |
50 | } |
51 | ||
220e6cf7 | 52 | |
0074fb2c | 53 | static void highbank_l2c310_write_sec(unsigned long val, unsigned reg) |
8e56130d | 54 | { |
0074fb2c RK |
55 | if (reg == L2X0_CTRL) |
56 | highbank_smc1(0x102, val); | |
57 | else | |
58 | WARN_ONCE(1, "Highbank L2C310: ignoring write to reg 0x%x\n", | |
59 | reg); | |
8e56130d | 60 | } |
8e56130d | 61 | |
220e6cf7 RH |
62 | static void __init highbank_init_irq(void) |
63 | { | |
0529e315 | 64 | irqchip_init(); |
8e56130d | 65 | |
7a2848d3 RH |
66 | if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9")) |
67 | highbank_scu_map_io(); | |
220e6cf7 RH |
68 | } |
69 | ||
220e6cf7 RH |
70 | static void highbank_power_off(void) |
71 | { | |
c05ee88f | 72 | highbank_set_pwr_shutdown(); |
220e6cf7 RH |
73 | |
74 | while (1) | |
75 | cpu_do_idle(); | |
76 | } | |
77 | ||
1dc737c4 RH |
78 | static int highbank_platform_notifier(struct notifier_block *nb, |
79 | unsigned long event, void *__dev) | |
80 | { | |
81 | struct resource *res; | |
82 | int reg = -1; | |
e64bf95e | 83 | u32 val; |
1dc737c4 RH |
84 | struct device *dev = __dev; |
85 | ||
86 | if (event != BUS_NOTIFY_ADD_DEVICE) | |
87 | return NOTIFY_DONE; | |
88 | ||
89 | if (of_device_is_compatible(dev->of_node, "calxeda,hb-ahci")) | |
90 | reg = 0xc; | |
91 | else if (of_device_is_compatible(dev->of_node, "calxeda,hb-sdhci")) | |
92 | reg = 0x18; | |
93 | else if (of_device_is_compatible(dev->of_node, "arm,pl330")) | |
94 | reg = 0x20; | |
95 | else if (of_device_is_compatible(dev->of_node, "calxeda,hb-xgmac")) { | |
96 | res = platform_get_resource(to_platform_device(dev), | |
97 | IORESOURCE_MEM, 0); | |
98 | if (res) { | |
99 | if (res->start == 0xfff50000) | |
100 | reg = 0; | |
101 | else if (res->start == 0xfff51000) | |
102 | reg = 4; | |
103 | } | |
104 | } | |
105 | ||
106 | if (reg < 0) | |
107 | return NOTIFY_DONE; | |
108 | ||
109 | if (of_property_read_bool(dev->of_node, "dma-coherent")) { | |
e64bf95e RH |
110 | val = readl(sregs_base + reg); |
111 | writel(val | 0xff01, sregs_base + reg); | |
1dc737c4 | 112 | set_dma_ops(dev, &arm_coherent_dma_ops); |
e64bf95e | 113 | } |
1dc737c4 RH |
114 | |
115 | return NOTIFY_OK; | |
116 | } | |
117 | ||
118 | static struct notifier_block highbank_amba_nb = { | |
119 | .notifier_call = highbank_platform_notifier, | |
120 | }; | |
121 | ||
122 | static struct notifier_block highbank_platform_nb = { | |
123 | .notifier_call = highbank_platform_notifier, | |
124 | }; | |
125 | ||
60a66e37 DL |
126 | static struct platform_device highbank_cpuidle_device = { |
127 | .name = "cpuidle-calxeda", | |
128 | }; | |
129 | ||
38431148 RH |
130 | static int hb_keys_notifier(struct notifier_block *nb, unsigned long event, void *data) |
131 | { | |
132 | u32 key = *(u32 *)data; | |
133 | ||
134 | if (event != 0x1000) | |
135 | return 0; | |
136 | ||
137 | if (key == KEY_POWER) | |
138 | orderly_poweroff(false); | |
139 | else if (key == 0xffff) | |
140 | ctrl_alt_del(); | |
141 | ||
142 | return 0; | |
143 | } | |
144 | static struct notifier_block hb_keys_nb = { | |
145 | .notifier_call = hb_keys_notifier, | |
146 | }; | |
147 | ||
220e6cf7 RH |
148 | static void __init highbank_init(void) |
149 | { | |
26cae166 SH |
150 | struct device_node *np; |
151 | ||
152 | /* Map system registers */ | |
153 | np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs"); | |
154 | sregs_base = of_iomap(np, 0); | |
155 | WARN_ON(!sregs_base); | |
156 | ||
220e6cf7 | 157 | pm_power_off = highbank_power_off; |
a283580c | 158 | highbank_pm_init(); |
220e6cf7 | 159 | |
1dc737c4 RH |
160 | bus_register_notifier(&platform_bus_type, &highbank_platform_nb); |
161 | bus_register_notifier(&amba_bustype, &highbank_amba_nb); | |
162 | ||
38431148 RH |
163 | pl320_ipc_register_notifier(&hb_keys_nb); |
164 | ||
a410146c | 165 | if (psci_ops.cpu_suspend) |
60a66e37 | 166 | platform_device_register(&highbank_cpuidle_device); |
220e6cf7 RH |
167 | } |
168 | ||
543c5040 | 169 | static const char *const highbank_match[] __initconst = { |
220e6cf7 | 170 | "calxeda,highbank", |
e095c0d1 | 171 | "calxeda,ecx-2000", |
220e6cf7 RH |
172 | NULL, |
173 | }; | |
174 | ||
175 | DT_MACHINE_START(HIGHBANK, "Highbank") | |
a6a39834 RH |
176 | #if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE) |
177 | .dma_zone_size = (4ULL * SZ_1G), | |
178 | #endif | |
513b9a08 RK |
179 | .l2c_aux_val = 0, |
180 | .l2c_aux_mask = ~0, | |
181 | .l2c_write_sec = highbank_l2c310_write_sec, | |
220e6cf7 | 182 | .init_irq = highbank_init_irq, |
220e6cf7 RH |
183 | .init_machine = highbank_init, |
184 | .dt_compat = highbank_match, | |
00e9967e | 185 | .restart = highbank_restart, |
220e6cf7 | 186 | MACHINE_END |