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ARM: mach-imx: mx25_3ds: add write-protect and card-detect for SD
[mirror_ubuntu-eoan-kernel.git] / arch / arm / mach-imx / mach-imx27_visstrim_m10.c
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1/*
2 * mach-imx27_visstrim_m10.c
3 *
4 * Copyright 2010 Javier Martin <javier.martin@vista-silicon.com>
5 *
6 * Based on mach-pcm038.c, mach-pca100.c, mach-mx27ads.c and others.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
21 * MA 02110-1301, USA.
22 */
23
24#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
25
26#include <linux/platform_device.h>
27#include <linux/mtd/physmap.h>
28#include <linux/i2c.h>
29#include <linux/i2c/pca953x.h>
30#include <linux/gpio_keys.h>
31#include <linux/input.h>
32#include <linux/gpio.h>
4bd597b6 33#include <linux/delay.h>
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34#include <asm/mach-types.h>
35#include <asm/mach/arch.h>
36#include <asm/mach/time.h>
37#include <mach/common.h>
3b161e51 38#include <mach/iomux.h>
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39
40#include "devices-imx27.h"
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41
42#define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
43#define SDHC1_IRQ IRQ_GPIOB(25)
44
6c80ee51 45static const int visstrim_m10_pins[] __initconst = {
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46 /* UART1 (console) */
47 PE12_PF_UART1_TXD,
48 PE13_PF_UART1_RXD,
49 PE14_PF_UART1_CTS,
50 PE15_PF_UART1_RTS,
51 /* FEC */
52 PD0_AIN_FEC_TXD0,
53 PD1_AIN_FEC_TXD1,
54 PD2_AIN_FEC_TXD2,
55 PD3_AIN_FEC_TXD3,
56 PD4_AOUT_FEC_RX_ER,
57 PD5_AOUT_FEC_RXD1,
58 PD6_AOUT_FEC_RXD2,
59 PD7_AOUT_FEC_RXD3,
60 PD8_AF_FEC_MDIO,
61 PD9_AIN_FEC_MDC,
62 PD10_AOUT_FEC_CRS,
63 PD11_AOUT_FEC_TX_CLK,
64 PD12_AOUT_FEC_RXD0,
65 PD13_AOUT_FEC_RX_DV,
66 PD14_AOUT_FEC_RX_CLK,
67 PD15_AOUT_FEC_COL,
68 PD16_AIN_FEC_TX_ER,
69 PF23_AIN_FEC_TX_EN,
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70 /* SSI1 */
71 PC20_PF_SSI1_FS,
72 PC21_PF_SSI1_RXD,
73 PC22_PF_SSI1_TXD,
74 PC23_PF_SSI1_CLK,
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75 /* SDHC1 */
76 PE18_PF_SD1_D0,
77 PE19_PF_SD1_D1,
78 PE20_PF_SD1_D2,
79 PE21_PF_SD1_D3,
80 PE22_PF_SD1_CMD,
81 PE23_PF_SD1_CLK,
82 /* Both I2Cs */
83 PD17_PF_I2C_DATA,
84 PD18_PF_I2C_CLK,
85 PC5_PF_I2C2_SDA,
86 PC6_PF_I2C2_SCL,
87 /* USB OTG */
88 OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
89 PC9_PF_USBOTG_DATA0,
90 PC11_PF_USBOTG_DATA1,
91 PC10_PF_USBOTG_DATA2,
92 PC13_PF_USBOTG_DATA3,
93 PC12_PF_USBOTG_DATA4,
94 PC7_PF_USBOTG_DATA5,
95 PC8_PF_USBOTG_DATA6,
96 PE25_PF_USBOTG_DATA7,
97 PE24_PF_USBOTG_CLK,
98 PE2_PF_USBOTG_DIR,
99 PE0_PF_USBOTG_NXT,
100 PE1_PF_USBOTG_STP,
101 PB23_PF_USB_PWR,
102 PB24_PF_USB_OC,
103};
104
105/* GPIOs used as events for applications */
106static struct gpio_keys_button visstrim_gpio_keys[] = {
107 {
108 .type = EV_KEY,
109 .code = KEY_RESTART,
110 .gpio = (GPIO_PORTC + 15),
111 .desc = "Default config",
112 .active_low = 0,
113 .wakeup = 1,
114 },
115 {
116 .type = EV_KEY,
117 .code = KEY_RECORD,
118 .gpio = (GPIO_PORTF + 14),
119 .desc = "Record",
120 .active_low = 0,
121 .wakeup = 1,
122 },
123 {
124 .type = EV_KEY,
125 .code = KEY_STOP,
126 .gpio = (GPIO_PORTF + 13),
127 .desc = "Stop",
128 .active_low = 0,
129 .wakeup = 1,
130 }
131};
132
133static struct gpio_keys_platform_data visstrim_gpio_keys_platform_data = {
134 .buttons = visstrim_gpio_keys,
135 .nbuttons = ARRAY_SIZE(visstrim_gpio_keys),
136};
137
138static struct platform_device visstrim_gpio_keys_device = {
139 .name = "gpio-keys",
140 .id = -1,
141 .dev = {
142 .platform_data = &visstrim_gpio_keys_platform_data,
143 },
144};
145
146/* Visstrim_SM10 has a microSD slot connected to sdhc1 */
147static int visstrim_m10_sdhc1_init(struct device *dev,
148 irq_handler_t detect_irq, void *data)
149{
150 int ret;
151
152 ret = request_irq(SDHC1_IRQ, detect_irq, IRQF_TRIGGER_FALLING,
153 "mmc-detect", data);
154 return ret;
155}
156
157static void visstrim_m10_sdhc1_exit(struct device *dev, void *data)
158{
159 free_irq(SDHC1_IRQ, data);
160}
161
9d3d945a 162static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = {
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163 .init = visstrim_m10_sdhc1_init,
164 .exit = visstrim_m10_sdhc1_exit,
165};
166
167/* Visstrim_SM10 NOR flash */
168static struct physmap_flash_data visstrim_m10_flash_data = {
169 .width = 2,
170};
171
172static struct resource visstrim_m10_flash_resource = {
173 .start = 0xc0000000,
174 .end = 0xc0000000 + SZ_64M - 1,
175 .flags = IORESOURCE_MEM,
176};
177
178static struct platform_device visstrim_m10_nor_mtd_device = {
179 .name = "physmap-flash",
180 .id = 0,
181 .dev = {
182 .platform_data = &visstrim_m10_flash_data,
183 },
184 .num_resources = 1,
185 .resource = &visstrim_m10_flash_resource,
186};
187
188static struct platform_device *platform_devices[] __initdata = {
189 &visstrim_gpio_keys_device,
190 &visstrim_m10_nor_mtd_device,
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191};
192
193/* Visstrim_M10 uses UART0 as console */
194static const struct imxuart_platform_data uart_pdata __initconst = {
195 .flags = IMXUART_HAVE_RTSCTS,
196};
197
198/* I2C */
199static const struct imxi2c_platform_data visstrim_m10_i2c_data __initconst = {
200 .bitrate = 100000,
201};
202
203static struct pca953x_platform_data visstrim_m10_pca9555_pdata = {
204 .gpio_base = 240, /* After MX27 internal GPIOs */
205 .invert = 0,
206};
207
208static struct i2c_board_info visstrim_m10_i2c_devices[] = {
209 {
210 I2C_BOARD_INFO("pca9555", 0x20),
211 .platform_data = &visstrim_m10_pca9555_pdata,
212 },
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213 {
214 I2C_BOARD_INFO("tlv320aic32x4", 0x18),
215 }
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216};
217
218/* USB OTG */
219static int otg_phy_init(struct platform_device *pdev)
220{
221 gpio_set_value(OTG_PHY_CS_GPIO, 0);
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222
223 mdelay(10);
224
225 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
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226}
227
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228static const struct mxc_usbh_platform_data
229visstrim_m10_usbotg_pdata __initconst = {
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230 .init = otg_phy_init,
231 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
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232};
233
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234/* SSI */
235static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = {
236 .flags = IMX_SSI_DMA | IMX_SSI_SYN,
237};
238
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239static void __init visstrim_m10_board_init(void)
240{
241 int ret;
242
243 ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins,
244 ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10");
245 if (ret)
246 pr_err("Failed to setup pins (%d)\n", ret);
247
a5e2051b 248 imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata);
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249 imx27_add_imx_uart0(&uart_pdata);
250
251 i2c_register_board_info(0, visstrim_m10_i2c_devices,
252 ARRAY_SIZE(visstrim_m10_i2c_devices));
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253 imx27_add_imx_i2c(0, &visstrim_m10_i2c_data);
254 imx27_add_imx_i2c(1, &visstrim_m10_i2c_data);
9d3d945a 255 imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata);
2eb42d5c 256 imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata);
6bd96f3c 257 imx27_add_fec(NULL);
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258 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
259}
260
261static void __init visstrim_m10_timer_init(void)
262{
263 mx27_clocks_init((unsigned long)25000000);
264}
265
266static struct sys_timer visstrim_m10_timer = {
267 .init = visstrim_m10_timer_init,
268};
269
270MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
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271 .boot_params = MX27_PHYS_OFFSET + 0x100,
272 .map_io = mx27_map_io,
273 .init_early = imx27_init_early,
274 .init_irq = mx27_init_irq,
275 .timer = &visstrim_m10_timer,
276 .init_machine = visstrim_m10_board_init,
3b161e51 277MACHINE_END