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13eed989 SG |
1 | /* |
2 | * Copyright 2011 Freescale Semiconductor, Inc. | |
3 | * Copyright 2011 Linaro Ltd. | |
4 | * | |
5 | * The code contained herein is licensed under the GNU General Public | |
6 | * License. You may obtain a copy of the GNU General Public License | |
7 | * Version 2 or later at the following locations: | |
8 | * | |
9 | * http://www.opensource.org/licenses/gpl-license.html | |
10 | * http://www.gnu.org/copyleft/gpl.html | |
11 | */ | |
12 | ||
a258561d RZ |
13 | #include <linux/clk.h> |
14 | #include <linux/clkdev.h> | |
0575fb75 | 15 | #include <linux/delay.h> |
b9d18dc3 | 16 | #include <linux/export.h> |
13eed989 | 17 | #include <linux/init.h> |
0575fb75 | 18 | #include <linux/io.h> |
13eed989 | 19 | #include <linux/irq.h> |
13eed989 | 20 | #include <linux/of.h> |
0575fb75 | 21 | #include <linux/of_address.h> |
13eed989 SG |
22 | #include <linux/of_irq.h> |
23 | #include <linux/of_platform.h> | |
477fce49 | 24 | #include <linux/phy.h> |
baa64151 | 25 | #include <linux/regmap.h> |
477fce49 | 26 | #include <linux/micrel_phy.h> |
baa64151 | 27 | #include <linux/mfd/syscon.h> |
58458e03 | 28 | #include <asm/smp_twd.h> |
13eed989 SG |
29 | #include <asm/hardware/cache-l2x0.h> |
30 | #include <asm/hardware/gic.h> | |
31 | #include <asm/mach/arch.h> | |
3e549a69 | 32 | #include <asm/mach/map.h> |
13eed989 | 33 | #include <asm/mach/time.h> |
9f97da78 | 34 | #include <asm/system_misc.h> |
13eed989 | 35 | |
e3372474 | 36 | #include "common.h" |
e29248c9 | 37 | #include "cpuidle.h" |
50f2de61 | 38 | #include "hardware.h" |
b9d18dc3 | 39 | |
b29b3e6f SG |
40 | #define IMX6Q_ANALOG_DIGPROG 0x260 |
41 | ||
42 | static int imx6q_revision(void) | |
43 | { | |
44 | struct device_node *np; | |
45 | void __iomem *base; | |
46 | static u32 rev; | |
47 | ||
48 | if (!rev) { | |
49 | np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop"); | |
50 | if (!np) | |
51 | return IMX_CHIP_REVISION_UNKNOWN; | |
52 | base = of_iomap(np, 0); | |
53 | if (!base) { | |
54 | of_node_put(np); | |
55 | return IMX_CHIP_REVISION_UNKNOWN; | |
56 | } | |
57 | rev = readl_relaxed(base + IMX6Q_ANALOG_DIGPROG); | |
58 | iounmap(base); | |
59 | of_node_put(np); | |
60 | } | |
61 | ||
62 | switch (rev & 0xff) { | |
63 | case 0: | |
64 | return IMX_CHIP_REVISION_1_0; | |
65 | case 1: | |
66 | return IMX_CHIP_REVISION_1_1; | |
67 | case 2: | |
68 | return IMX_CHIP_REVISION_1_2; | |
69 | default: | |
70 | return IMX_CHIP_REVISION_UNKNOWN; | |
71 | } | |
72 | } | |
73 | ||
0575fb75 SG |
74 | void imx6q_restart(char mode, const char *cmd) |
75 | { | |
76 | struct device_node *np; | |
77 | void __iomem *wdog_base; | |
78 | ||
79 | np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt"); | |
80 | wdog_base = of_iomap(np, 0); | |
81 | if (!wdog_base) | |
82 | goto soft; | |
83 | ||
84 | imx_src_prepare_restart(); | |
85 | ||
86 | /* enable wdog */ | |
87 | writew_relaxed(1 << 2, wdog_base); | |
88 | /* write twice to ensure the request will not get ignored */ | |
89 | writew_relaxed(1 << 2, wdog_base); | |
90 | ||
91 | /* wait for reset to assert ... */ | |
92 | mdelay(500); | |
93 | ||
94 | pr_err("Watchdog reset failed to assert reset\n"); | |
95 | ||
96 | /* delay to allow the serial port to show the message */ | |
97 | mdelay(50); | |
98 | ||
99 | soft: | |
100 | /* we'll take a jump through zero as a poor second */ | |
101 | soft_restart(0); | |
102 | } | |
103 | ||
477fce49 RZ |
104 | /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */ |
105 | static int ksz9021rn_phy_fixup(struct phy_device *phydev) | |
106 | { | |
9f9ba0fd | 107 | if (IS_BUILTIN(CONFIG_PHYLIB)) { |
ef441806 SG |
108 | /* min rx data delay */ |
109 | phy_write(phydev, 0x0b, 0x8105); | |
110 | phy_write(phydev, 0x0c, 0x0000); | |
477fce49 | 111 | |
ef441806 SG |
112 | /* max rx/tx clock delay, min rx/tx control delay */ |
113 | phy_write(phydev, 0x0b, 0x8104); | |
114 | phy_write(phydev, 0x0c, 0xf0f0); | |
115 | phy_write(phydev, 0x0b, 0x104); | |
116 | } | |
477fce49 RZ |
117 | |
118 | return 0; | |
119 | } | |
120 | ||
a258561d RZ |
121 | static void __init imx6q_sabrelite_cko1_setup(void) |
122 | { | |
123 | struct clk *cko1_sel, *ahb, *cko1; | |
124 | unsigned long rate; | |
125 | ||
126 | cko1_sel = clk_get_sys(NULL, "cko1_sel"); | |
127 | ahb = clk_get_sys(NULL, "ahb"); | |
128 | cko1 = clk_get_sys(NULL, "cko1"); | |
129 | if (IS_ERR(cko1_sel) || IS_ERR(ahb) || IS_ERR(cko1)) { | |
130 | pr_err("cko1 setup failed!\n"); | |
131 | goto put_clk; | |
132 | } | |
133 | clk_set_parent(cko1_sel, ahb); | |
134 | rate = clk_round_rate(cko1, 16000000); | |
135 | clk_set_rate(cko1, rate); | |
a258561d RZ |
136 | put_clk: |
137 | if (!IS_ERR(cko1_sel)) | |
138 | clk_put(cko1_sel); | |
139 | if (!IS_ERR(ahb)) | |
140 | clk_put(ahb); | |
141 | if (!IS_ERR(cko1)) | |
142 | clk_put(cko1); | |
143 | } | |
144 | ||
071dea50 RZ |
145 | static void __init imx6q_sabrelite_init(void) |
146 | { | |
9f9ba0fd | 147 | if (IS_BUILTIN(CONFIG_PHYLIB)) |
ef441806 | 148 | phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, |
071dea50 | 149 | ksz9021rn_phy_fixup); |
a258561d | 150 | imx6q_sabrelite_cko1_setup(); |
071dea50 RZ |
151 | } |
152 | ||
d6e0d9fc FL |
153 | static void __init imx6q_1588_init(void) |
154 | { | |
155 | struct regmap *gpr; | |
156 | ||
157 | gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr"); | |
158 | if (!IS_ERR(gpr)) | |
159 | regmap_update_bits(gpr, 0x4, 1 << 21, 1 << 21); | |
160 | else | |
161 | pr_err("failed to find fsl,imx6q-iomux-gpr regmap\n"); | |
162 | ||
163 | } | |
396bf1c2 RZ |
164 | static void __init imx6q_usb_init(void) |
165 | { | |
baa64151 | 166 | struct regmap *anatop; |
396bf1c2 RZ |
167 | |
168 | #define HW_ANADIG_USB1_CHRG_DETECT 0x000001b0 | |
169 | #define HW_ANADIG_USB2_CHRG_DETECT 0x00000210 | |
170 | ||
171 | #define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x00100000 | |
172 | #define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x00080000 | |
173 | ||
baa64151 DA |
174 | anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop"); |
175 | if (!IS_ERR(anatop)) { | |
176 | /* | |
177 | * The external charger detector needs to be disabled, | |
178 | * or the signal at DP will be poor | |
179 | */ | |
180 | regmap_write(anatop, HW_ANADIG_USB1_CHRG_DETECT, | |
181 | BM_ANADIG_USB_CHRG_DETECT_EN_B | |
182 | | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B); | |
183 | regmap_write(anatop, HW_ANADIG_USB2_CHRG_DETECT, | |
184 | BM_ANADIG_USB_CHRG_DETECT_EN_B | | |
185 | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B); | |
186 | } else { | |
187 | pr_warn("failed to find fsl,imx6q-anatop regmap\n"); | |
188 | } | |
396bf1c2 RZ |
189 | } |
190 | ||
13eed989 SG |
191 | static void __init imx6q_init_machine(void) |
192 | { | |
477fce49 | 193 | if (of_machine_is_compatible("fsl,imx6q-sabrelite")) |
071dea50 | 194 | imx6q_sabrelite_init(); |
477fce49 | 195 | |
13eed989 SG |
196 | of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); |
197 | ||
198 | imx6q_pm_init(); | |
396bf1c2 | 199 | imx6q_usb_init(); |
d6e0d9fc | 200 | imx6q_1588_init(); |
13eed989 SG |
201 | } |
202 | ||
b9d18dc3 RL |
203 | static void __init imx6q_init_late(void) |
204 | { | |
12bb3440 | 205 | imx6q_cpuidle_init(); |
b9d18dc3 RL |
206 | } |
207 | ||
13eed989 SG |
208 | static void __init imx6q_map_io(void) |
209 | { | |
3e549a69 | 210 | debug_ll_io_init(); |
13eed989 SG |
211 | imx_scu_map_io(); |
212 | } | |
213 | ||
13eed989 SG |
214 | static const struct of_device_id imx6q_irq_match[] __initconst = { |
215 | { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, | |
13eed989 SG |
216 | { /* sentinel */ } |
217 | }; | |
218 | ||
219 | static void __init imx6q_init_irq(void) | |
220 | { | |
221 | l2x0_of_init(0, ~0UL); | |
222 | imx_src_init(); | |
223 | imx_gpc_init(); | |
224 | of_irq_init(imx6q_irq_match); | |
225 | } | |
226 | ||
227 | static void __init imx6q_timer_init(void) | |
228 | { | |
229 | mx6q_clocks_init(); | |
58458e03 | 230 | twd_local_timer_of_register(); |
b29b3e6f | 231 | imx_print_silicon_rev("i.MX6Q", imx6q_revision()); |
13eed989 SG |
232 | } |
233 | ||
234 | static struct sys_timer imx6q_timer = { | |
235 | .init = imx6q_timer_init, | |
236 | }; | |
237 | ||
238 | static const char *imx6q_dt_compat[] __initdata = { | |
3f8976d9 | 239 | "fsl,imx6q", |
13eed989 SG |
240 | NULL, |
241 | }; | |
242 | ||
243 | DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)") | |
e4f2d979 | 244 | .smp = smp_ops(imx_smp_ops), |
13eed989 SG |
245 | .map_io = imx6q_map_io, |
246 | .init_irq = imx6q_init_irq, | |
247 | .handle_irq = imx6q_handle_irq, | |
248 | .timer = &imx6q_timer, | |
249 | .init_machine = imx6q_init_machine, | |
b9d18dc3 | 250 | .init_late = imx6q_init_late, |
13eed989 | 251 | .dt_compat = imx6q_dt_compat, |
0575fb75 | 252 | .restart = imx6q_restart, |
13eed989 | 253 | MACHINE_END |