[mirror_ubuntu-eoan-kernel.git] / arch / arm / mach-imx / mach-kzm_arm11_01.c

/*
 * KZM-ARM11-01 support
 *  Copyright (C) 2009  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 * based on code for MX31ADS,
 *  Copyright (C) 2000 Deep Blue Solutions Ltd
 *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
 *  Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/smsc911x.h>
#include <linux/types.h>

#include <asm/irq.h>
#include <asm/mach-types.h>
#include <asm/memory.h>
#include <asm/setup.h>
#include <asm/mach/arch.h>
#include <asm/mach/irq.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>

#include <mach/clock.h>
#include <mach/common.h>
#include <mach/iomux-mx3.h>

#include "devices-imx31.h"

#define KZM_ARM11_IO_ADDRESS(x) (IOMEM(					\
	IMX_IO_P2V_MODULE(x, MX31_CS4) ?:				\
	IMX_IO_P2V_MODULE(x, MX31_CS5)) ?:				\
	MX31_IO_ADDRESS(x))

/*
 *  KZM-ARM11-01 Board Control Registers on FPGA
 */
#define KZM_ARM11_CTL1		(MX31_CS4_BASE_ADDR + 0x1000)
#define KZM_ARM11_CTL2		(MX31_CS4_BASE_ADDR + 0x1001)
#define KZM_ARM11_RSW1		(MX31_CS4_BASE_ADDR + 0x1002)
#define KZM_ARM11_BACK_LIGHT	(MX31_CS4_BASE_ADDR + 0x1004)
#define KZM_ARM11_FPGA_REV	(MX31_CS4_BASE_ADDR + 0x1008)
#define KZM_ARM11_7SEG_LED	(MX31_CS4_BASE_ADDR + 0x1010)
#define KZM_ARM11_LEDS		(MX31_CS4_BASE_ADDR + 0x1020)
#define KZM_ARM11_DIPSW2	(MX31_CS4_BASE_ADDR + 0x1003)

/*
 * External UART for touch panel on FPGA
 */
#define KZM_ARM11_16550		(MX31_CS4_BASE_ADDR + 0x1050)

#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
/*
 * KZM-ARM11-01 has an external UART on FPGA
 */
static struct plat_serial8250_port serial_platform_data[] = {
	{
		.membase	= KZM_ARM11_IO_ADDRESS(KZM_ARM11_16550),
		.mapbase	= KZM_ARM11_16550,
		.irq		= IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
		.irqflags	= IRQ_TYPE_EDGE_RISING,
		.uartclk	= 14745600,
		.regshift	= 0,
		.iotype		= UPIO_MEM,
		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
				  UPF_BUGGY_UART,
	},
	{},
};

static struct resource serial8250_resources[] = {
	{
		.start	= KZM_ARM11_16550,
		.end	= KZM_ARM11_16550 + 0x10,
		.flags	= IORESOURCE_MEM,
	},
	{
		.start	= IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
		.end	= IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device serial_device = {
	.name		= "serial8250",
	.id		= PLAT8250_DEV_PLATFORM,
	.dev		= {
				.platform_data = serial_platform_data,
			  },
	.num_resources	= ARRAY_SIZE(serial8250_resources),
	.resource	= serial8250_resources,
};

static int __init kzm_init_ext_uart(void)
{
	u8 tmp;

	/*
	 * GPIO 1-1: external UART interrupt line
	 */
	mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO));
	gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1), "ext-uart-int");
	gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));

	/*
	 * Unmask UART interrupt
	 */
	tmp = __raw_readb(KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
	tmp |= 0x2;
	__raw_writeb(tmp, KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));

	return platform_device_register(&serial_device);
}
#else
static inline int kzm_init_ext_uart(void)
{
	return 0;
}
#endif

/*
 * SMSC LAN9118
 */
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
static struct smsc911x_platform_config kzm_smsc9118_config = {
	.phy_interface	= PHY_INTERFACE_MODE_MII,
	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
	.flags		= SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
};

static struct resource kzm_smsc9118_resources[] = {
	{
		.start	= MX31_CS5_BASE_ADDR,
		.end	= MX31_CS5_BASE_ADDR + SZ_128K - 1,
		.flags	= IORESOURCE_MEM,
	},
	{
		.start	= IOMUX_TO_IRQ(MX31_PIN_GPIO1_2),
		.end	= IOMUX_TO_IRQ(MX31_PIN_GPIO1_2),
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
	},
};

static struct platform_device kzm_smsc9118_device = {
	.name		= "smsc911x",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(kzm_smsc9118_resources),
	.resource	= kzm_smsc9118_resources,
	.dev		= {
				.platform_data = &kzm_smsc9118_config,
			  },
};

static int __init kzm_init_smsc9118(void)
{
	/*
	 * GPIO 1-2: SMSC9118 interrupt line
	 */
	mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_2, IOMUX_CONFIG_GPIO));
	gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2), "smsc9118-int");
	gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));

	return platform_device_register(&kzm_smsc9118_device);
}
#else
static inline int kzm_init_smsc9118(void)
{
	return 0;
}
#endif

#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

static void __init kzm_init_imx_uart(void)
{
	imx31_add_imx_uart0(&uart_pdata);
	imx31_add_imx_uart1(&uart_pdata);
}
#else
static inline void kzm_init_imx_uart(void)
{
}
#endif

static int kzm_pins[] __initdata = {
	MX31_PIN_CTS1__CTS1,
	MX31_PIN_RTS1__RTS1,
	MX31_PIN_TXD1__TXD1,
	MX31_PIN_RXD1__RXD1,
	MX31_PIN_DCD_DCE1__DCD_DCE1,
	MX31_PIN_RI_DCE1__RI_DCE1,
	MX31_PIN_DSR_DCE1__DSR_DCE1,
	MX31_PIN_DTR_DCE1__DTR_DCE1,
	MX31_PIN_CTS2__CTS2,
	MX31_PIN_RTS2__RTS2,
	MX31_PIN_TXD2__TXD2,
	MX31_PIN_RXD2__RXD2,
	MX31_PIN_DCD_DTE1__DCD_DTE2,
	MX31_PIN_RI_DTE1__RI_DTE2,
	MX31_PIN_DSR_DTE1__DSR_DTE2,
	MX31_PIN_DTR_DTE1__DTR_DTE2,
};

/*
 * Board specific initialization.
 */
static void __init kzm_board_init(void)
{
	imx31_soc_init();

	mxc_iomux_setup_multiple_pins(kzm_pins,
				      ARRAY_SIZE(kzm_pins), "kzm");
	kzm_init_ext_uart();
	kzm_init_smsc9118();
	kzm_init_imx_uart();

	pr_info("Clock input source is 26MHz\n");
}

/*
 * This structure defines static mappings for the kzm-arm11-01 board.
 */
static struct map_desc kzm_io_desc[] __initdata = {
	{
		.virtual	= MX31_CS4_BASE_ADDR_VIRT,
		.pfn		= __phys_to_pfn(MX31_CS4_BASE_ADDR),
		.length		= MX31_CS4_SIZE,
		.type		= MT_DEVICE
	},
	{
		.virtual	= MX31_CS5_BASE_ADDR_VIRT,
		.pfn		= __phys_to_pfn(MX31_CS5_BASE_ADDR),
		.length		= MX31_CS5_SIZE,
		.type		= MT_DEVICE
	},
};

/*
 * Set up static virtual mappings.
 */
static void __init kzm_map_io(void)
{
	mx31_map_io();
	iotable_init(kzm_io_desc, ARRAY_SIZE(kzm_io_desc));
}

static void __init kzm_timer_init(void)
{
	mx31_clocks_init(26000000);
}

static struct sys_timer kzm_timer = {
	.init = kzm_timer_init,
};

MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
	.boot_params = MX3x_PHYS_OFFSET + 0x100,
	.map_io = kzm_map_io,
	.init_early = imx31_init_early,
	.init_irq = mx31_init_irq,
	.timer = &kzm_timer,
	.init_machine = kzm_board_init,
MACHINE_END
Commit	Line	Data
415c7d26 YY	1	/*
	2	* KZM-ARM11-01 support
	3	* Copyright (C) 2009 Yoichi Yuasa <yuasa@linux-mips.org>
	4	*
	5	* based on code for MX31ADS,
	6	* Copyright (C) 2000 Deep Blue Solutions Ltd
	7	* Copyright (C) 2002 Shane Nay (shane@minirl.com)
	8	* Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; either version 2 of the License, or
	13	* (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
415c7d26 YY	19	*/
	20
	21	#include <linux/gpio.h>
	22	#include <linux/init.h>
	23	#include <linux/platform_device.h>
	24	#include <linux/serial_8250.h>
	25	#include <linux/smsc911x.h>
	26	#include <linux/types.h>
	27
	28	#include <asm/irq.h>
	29	#include <asm/mach-types.h>
f4117ac9	30	#include <asm/memory.h>
415c7d26 YY	31	#include <asm/setup.h>
	32	#include <asm/mach/arch.h>
	33	#include <asm/mach/irq.h>
	34	#include <asm/mach/map.h>
	35	#include <asm/mach/time.h>
	36
415c7d26 YY	37	#include <mach/clock.h>
415c7d26 YY	38	#include <mach/common.h>
415c7d26	39	#include <mach/iomux-mx3.h>
415c7d26	40
16cf5c41	41	#include "devices-imx31.h"
415c7d26	42
f5d7a13b UKK	43	#define KZM_ARM11_IO_ADDRESS(x) (IOMEM( \
	44	IMX_IO_P2V_MODULE(x, MX31_CS4) ?: \
	45	IMX_IO_P2V_MODULE(x, MX31_CS5)) ?: \
59e26081 UKK	46	MX31_IO_ADDRESS(x))
59e26081 UKK	47
7b562d0f UKK	48	/*
	49	* KZM-ARM11-01 Board Control Registers on FPGA
	50	*/
	51	#define KZM_ARM11_CTL1 (MX31_CS4_BASE_ADDR + 0x1000)
	52	#define KZM_ARM11_CTL2 (MX31_CS4_BASE_ADDR + 0x1001)
	53	#define KZM_ARM11_RSW1 (MX31_CS4_BASE_ADDR + 0x1002)
	54	#define KZM_ARM11_BACK_LIGHT (MX31_CS4_BASE_ADDR + 0x1004)
	55	#define KZM_ARM11_FPGA_REV (MX31_CS4_BASE_ADDR + 0x1008)
	56	#define KZM_ARM11_7SEG_LED (MX31_CS4_BASE_ADDR + 0x1010)
	57	#define KZM_ARM11_LEDS (MX31_CS4_BASE_ADDR + 0x1020)
	58	#define KZM_ARM11_DIPSW2 (MX31_CS4_BASE_ADDR + 0x1003)
	59
	60	/*
	61	* External UART for touch panel on FPGA
	62	*/
	63	#define KZM_ARM11_16550 (MX31_CS4_BASE_ADDR + 0x1050)
	64
415c7d26 YY	65	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
	66	/*
	67	* KZM-ARM11-01 has an external UART on FPGA
	68	*/
	69	static struct plat_serial8250_port serial_platform_data[] = {
	70	{
59e26081	71	.membase = KZM_ARM11_IO_ADDRESS(KZM_ARM11_16550),
415c7d26 YY	72	.mapbase = KZM_ARM11_16550,
	73	.irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
	74	.irqflags = IRQ_TYPE_EDGE_RISING,
	75	.uartclk = 14745600,
	76	.regshift = 0,
	77	.iotype = UPIO_MEM,
	78	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \|
	79	UPF_BUGGY_UART,
	80	},
	81	{},
	82	};
	83
	84	static struct resource serial8250_resources[] = {
	85	{
	86	.start = KZM_ARM11_16550,
	87	.end = KZM_ARM11_16550 + 0x10,
	88	.flags = IORESOURCE_MEM,
	89	},
	90	{
	91	.start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
	92	.end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
	93	.flags = IORESOURCE_IRQ,
	94	},
	95	};
	96
	97	static struct platform_device serial_device = {
	98	.name = "serial8250",
	99	.id = PLAT8250_DEV_PLATFORM,
	100	.dev = {
	101	.platform_data = serial_platform_data,
	102	},
	103	.num_resources = ARRAY_SIZE(serial8250_resources),
	104	.resource = serial8250_resources,
	105	};
	106
	107	static int __init kzm_init_ext_uart(void)
	108	{
	109	u8 tmp;
	110
	111	/*
	112	* GPIO 1-1: external UART interrupt line
	113	*/
	114	mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO));
	115	gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1), "ext-uart-int");
	116	gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
	117
	118	/*
	119	* Unmask UART interrupt
	120	*/
59e26081	121	tmp = __raw_readb(KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
415c7d26	122	tmp \|= 0x2;
59e26081	123	__raw_writeb(tmp, KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
415c7d26 YY	124
	125	return platform_device_register(&serial_device);
	126	}
	127	#else
	128	static inline int kzm_init_ext_uart(void)
	129	{
	130	return 0;
	131	}
	132	#endif
	133
	134	/*
	135	* SMSC LAN9118
	136	*/
	137	#if defined(CONFIG_SMSC911X) \|\| defined(CONFIG_SMSC911X_MODULE)
	138	static struct smsc911x_platform_config kzm_smsc9118_config = {
	139	.phy_interface = PHY_INTERFACE_MODE_MII,
	140	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
	141	.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
	142	.flags = SMSC911X_USE_32BIT \| SMSC911X_SAVE_MAC_ADDRESS,
	143	};
	144
	145	static struct resource kzm_smsc9118_resources[] = {
	146	{
f568dd7f UKK	147	.start = MX31_CS5_BASE_ADDR,
f568dd7f UKK	148	.end = MX31_CS5_BASE_ADDR + SZ_128K - 1,
415c7d26 YY	149	.flags = IORESOURCE_MEM,
	150	},
	151	{
	152	.start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_2),
	153	.end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_2),
	154	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHEDGE,
	155	},
	156	};
	157
	158	static struct platform_device kzm_smsc9118_device = {
	159	.name = "smsc911x",
	160	.id = -1,
	161	.num_resources = ARRAY_SIZE(kzm_smsc9118_resources),
	162	.resource = kzm_smsc9118_resources,
	163	.dev = {
	164	.platform_data = &kzm_smsc9118_config,
	165	},
	166	};
	167
	168	static int __init kzm_init_smsc9118(void)
	169	{
	170	/*
	171	* GPIO 1-2: SMSC9118 interrupt line
	172	*/
	173	mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_2, IOMUX_CONFIG_GPIO));
	174	gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2), "smsc9118-int");
	175	gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));
	176
	177	return platform_device_register(&kzm_smsc9118_device);
	178	}
	179	#else
	180	static inline int kzm_init_smsc9118(void)
	181	{
	182	return 0;
	183	}
	184	#endif
	185
	186	#if defined(CONFIG_SERIAL_IMX) \|\| defined(CONFIG_SERIAL_IMX_MODULE)
16cf5c41	187	static const struct imxuart_platform_data uart_pdata __initconst = {
415c7d26 YY	188	.flags = IMXUART_HAVE_RTSCTS,
	189	};
	190
	191	static void __init kzm_init_imx_uart(void)
	192	{
16cf5c41 UKK	193	imx31_add_imx_uart0(&uart_pdata);
16cf5c41 UKK	194	imx31_add_imx_uart1(&uart_pdata);
415c7d26 YY	195	}
	196	#else
	197	static inline void kzm_init_imx_uart(void)
	198	{
	199	}
	200	#endif
	201
	202	static int kzm_pins[] __initdata = {
	203	MX31_PIN_CTS1__CTS1,
	204	MX31_PIN_RTS1__RTS1,
	205	MX31_PIN_TXD1__TXD1,
	206	MX31_PIN_RXD1__RXD1,
	207	MX31_PIN_DCD_DCE1__DCD_DCE1,
	208	MX31_PIN_RI_DCE1__RI_DCE1,
	209	MX31_PIN_DSR_DCE1__DSR_DCE1,
	210	MX31_PIN_DTR_DCE1__DTR_DCE1,
	211	MX31_PIN_CTS2__CTS2,
	212	MX31_PIN_RTS2__RTS2,
	213	MX31_PIN_TXD2__TXD2,
	214	MX31_PIN_RXD2__RXD2,
	215	MX31_PIN_DCD_DTE1__DCD_DTE2,
	216	MX31_PIN_RI_DTE1__RI_DTE2,
	217	MX31_PIN_DSR_DTE1__DSR_DTE2,
	218	MX31_PIN_DTR_DTE1__DTR_DTE2,
	219	};
	220
	221	/*
	222	* Board specific initialization.
	223	*/
	224	static void __init kzm_board_init(void)
	225	{
b78d8e59 SG	226	imx31_soc_init();
b78d8e59 SG	227
415c7d26 YY	228	mxc_iomux_setup_multiple_pins(kzm_pins,
	229	ARRAY_SIZE(kzm_pins), "kzm");
	230	kzm_init_ext_uart();
	231	kzm_init_smsc9118();
	232	kzm_init_imx_uart();
	233
	234	pr_info("Clock input source is 26MHz\n");
	235	}
	236
	237	/*
	238	* This structure defines static mappings for the kzm-arm11-01 board.
	239	*/
	240	static struct map_desc kzm_io_desc[] __initdata = {
	241	{
f568dd7f UKK	242	.virtual = MX31_CS4_BASE_ADDR_VIRT,
	243	.pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
	244	.length = MX31_CS4_SIZE,
415c7d26 YY	245	.type = MT_DEVICE
	246	},
	247	{
f568dd7f UKK	248	.virtual = MX31_CS5_BASE_ADDR_VIRT,
	249	.pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR),
	250	.length = MX31_CS5_SIZE,
415c7d26 YY	251	.type = MT_DEVICE
	252	},
	253	};
	254
	255	/*
	256	* Set up static virtual mappings.
	257	*/
	258	static void __init kzm_map_io(void)
	259	{
	260	mx31_map_io();
	261	iotable_init(kzm_io_desc, ARRAY_SIZE(kzm_io_desc));
	262	}
	263
	264	static void __init kzm_timer_init(void)
	265	{
	266	mx31_clocks_init(26000000);
	267	}
	268
	269	static struct sys_timer kzm_timer = {
e134fb2b	270	.init = kzm_timer_init,
415c7d26 YY	271	};
415c7d26 YY	272
415c7d26	273	MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
97976e22 UKK	274	.boot_params = MX3x_PHYS_OFFSET + 0x100,
	275	.map_io = kzm_map_io,
	276	.init_early = imx31_init_early,
	277	.init_irq = mx31_init_irq,
	278	.timer = &kzm_timer,
	279	.init_machine = kzm_board_init,
415c7d26	280	MACHINE_END