]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/blame - arch/arm/mach-imx/mach-pcm038.c
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[mirror_ubuntu-eoan-kernel.git] / arch / arm / mach-imx / mach-pcm038.c
CommitLineData
7e5e9f54
JB
1/*
2 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
3 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17 * MA 02110-1301, USA.
18 */
19
a4e9a65a 20#include <linux/i2c.h>
25f73ed5 21#include <linux/platform_data/at24.h>
bff0b53b
SH
22#include <linux/io.h>
23#include <linux/mtd/plat-ram.h>
24#include <linux/mtd/physmap.h>
25#include <linux/platform_device.h>
61533841
SH
26#include <linux/regulator/machine.h>
27#include <linux/mfd/mc13783.h>
28#include <linux/spi/spi.h>
29#include <linux/irq.h>
438196c3 30#include <linux/gpio.h>
a4e9a65a 31
7e5e9f54 32#include <asm/mach-types.h>
bff0b53b
SH
33#include <asm/mach/arch.h>
34#include <asm/mach/time.h>
35
3ed0bcb4 36#include "board-pcm038.h"
e3372474 37#include "common.h"
0e7a29a8 38#include "devices-imx27.h"
641dfe8b 39#include "ehci.h"
50f2de61 40#include "hardware.h"
267dd34c 41#include "iomux-mx27.h"
39ef6340 42#include "ulpi.h"
7e90534a 43
6c80ee51 44static const int pcm038_pins[] __initconst = {
f231ea44
SH
45 /* UART1 */
46 PE12_PF_UART1_TXD,
47 PE13_PF_UART1_RXD,
48 PE14_PF_UART1_CTS,
49 PE15_PF_UART1_RTS,
50 /* UART2 */
51 PE3_PF_UART2_CTS,
52 PE4_PF_UART2_RTS,
53 PE6_PF_UART2_TXD,
54 PE7_PF_UART2_RXD,
55 /* UART3 */
56 PE8_PF_UART3_TXD,
57 PE9_PF_UART3_RXD,
58 PE10_PF_UART3_CTS,
59 PE11_PF_UART3_RTS,
60 /* FEC */
61 PD0_AIN_FEC_TXD0,
62 PD1_AIN_FEC_TXD1,
63 PD2_AIN_FEC_TXD2,
64 PD3_AIN_FEC_TXD3,
65 PD4_AOUT_FEC_RX_ER,
66 PD5_AOUT_FEC_RXD1,
67 PD6_AOUT_FEC_RXD2,
68 PD7_AOUT_FEC_RXD3,
69 PD8_AF_FEC_MDIO,
70 PD9_AIN_FEC_MDC,
71 PD10_AOUT_FEC_CRS,
72 PD11_AOUT_FEC_TX_CLK,
73 PD12_AOUT_FEC_RXD0,
74 PD13_AOUT_FEC_RX_DV,
75 PD14_AOUT_FEC_RX_CLK,
76 PD15_AOUT_FEC_COL,
77 PD16_AIN_FEC_TX_ER,
78 PF23_AIN_FEC_TX_EN,
79 /* I2C2 */
80 PC5_PF_I2C2_SDA,
81 PC6_PF_I2C2_SCL,
82 /* SPI1 */
83 PD25_PF_CSPI1_RDY,
f231ea44
SH
84 PD29_PF_CSPI1_SCLK,
85 PD30_PF_CSPI1_MISO,
86 PD31_PF_CSPI1_MOSI,
87 /* SSI1 */
88 PC20_PF_SSI1_FS,
89 PC21_PF_SSI1_RXD,
90 PC22_PF_SSI1_TXD,
91 PC23_PF_SSI1_CLK,
92 /* SSI4 */
93 PC16_PF_SSI4_FS,
94 PC17_PF_SSI4_RXD,
95 PC18_PF_SSI4_TXD,
96 PC19_PF_SSI4_CLK,
773f206b
SH
97 /* USB host */
98 PA0_PF_USBH2_CLK,
99 PA1_PF_USBH2_DIR,
100 PA2_PF_USBH2_DATA7,
101 PA3_PF_USBH2_NXT,
102 PA4_PF_USBH2_STP,
103 PD19_AF_USBH2_DATA4,
104 PD20_AF_USBH2_DATA3,
105 PD21_AF_USBH2_DATA6,
106 PD22_AF_USBH2_DATA0,
107 PD23_AF_USBH2_DATA2,
108 PD24_AF_USBH2_DATA1,
109 PD26_AF_USBH2_DATA5,
f231ea44
SH
110};
111
3620c0dc
SH
112/*
113 * Phytec's PCM038 comes with 2MiB battery buffered SRAM,
114 * 16 bit width
115 */
116
117static struct platdata_mtd_ram pcm038_sram_data = {
118 .bankwidth = 2,
119};
120
121static struct resource pcm038_sram_resource = {
3f35d1f5
UKK
122 .start = MX27_CS1_BASE_ADDR,
123 .end = MX27_CS1_BASE_ADDR + 512 * 1024 - 1,
3620c0dc
SH
124 .flags = IORESOURCE_MEM,
125};
126
127static struct platform_device pcm038_sram_mtd_device = {
128 .name = "mtd-ram",
129 .id = 0,
130 .dev = {
131 .platform_data = &pcm038_sram_data,
132 },
133 .num_resources = 1,
134 .resource = &pcm038_sram_resource,
135};
136
7e5e9f54
JB
137/*
138 * Phytec's phyCORE-i.MX27 comes with 32MiB flash,
139 * 16 bit width
140 */
141static struct physmap_flash_data pcm038_flash_data = {
142 .width = 2,
143};
144
145static struct resource pcm038_flash_resource = {
146 .start = 0xc0000000,
147 .end = 0xc1ffffff,
148 .flags = IORESOURCE_MEM,
149};
150
151static struct platform_device pcm038_nor_mtd_device = {
152 .name = "physmap-flash",
153 .id = 0,
154 .dev = {
155 .platform_data = &pcm038_flash_data,
156 },
157 .num_resources = 1,
158 .resource = &pcm038_flash_resource,
159};
160
d5dac4a6
UKK
161static const struct imxuart_platform_data uart_pdata __initconst = {
162 .flags = IMXUART_HAVE_RTSCTS,
7e5e9f54
JB
163};
164
0e7a29a8
UKK
165static const struct mxc_nand_platform_data
166pcm038_nand_board_info __initconst = {
01f71a37
SH
167 .width = 1,
168 .hw_ecc = 1,
169};
170
7e5e9f54
JB
171static struct platform_device *platform_devices[] __initdata = {
172 &pcm038_nor_mtd_device,
3620c0dc 173 &pcm038_sram_mtd_device,
7e5e9f54
JB
174};
175
3620c0dc
SH
176/* On pcm038 there's a sram attached to CS1, we enable the chipselect here and
177 * setup other stuffs to access the sram. */
178static void __init pcm038_init_sram(void)
179{
25971426
SG
180 __raw_writel(0x0000d843, MX27_IO_ADDRESS(MX27_WEIM_CSCRxU(1)));
181 __raw_writel(0x22252521, MX27_IO_ADDRESS(MX27_WEIM_CSCRxL(1)));
182 __raw_writel(0x22220a00, MX27_IO_ADDRESS(MX27_WEIM_CSCRxA(1)));
3620c0dc
SH
183}
184
c6987159 185static const struct imxi2c_platform_data pcm038_i2c1_data __initconst = {
a4e9a65a 186 .bitrate = 100000,
a4e9a65a
SH
187};
188
189static struct at24_platform_data board_eeprom = {
190 .byte_len = 4096,
191 .page_size = 32,
192 .flags = AT24_FLAG_ADDR16,
193};
194
195static struct i2c_board_info pcm038_i2c_devices[] = {
cf87a6e2 196 {
a4e9a65a
SH
197 I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
198 .platform_data = &board_eeprom,
cf87a6e2
SH
199 }, {
200 I2C_BOARD_INFO("pcf8563", 0x51),
201 }, {
a4e9a65a 202 I2C_BOARD_INFO("lm75", 0x4a),
a4e9a65a
SH
203 }
204};
a4e9a65a 205
61533841
SH
206static int pcm038_spi_cs[] = {GPIO_PORTD + 28};
207
7536cf99 208static const struct spi_imx_master pcm038_spi0_data __initconst = {
61533841
SH
209 .chipselect = pcm038_spi_cs,
210 .num_chipselect = ARRAY_SIZE(pcm038_spi_cs),
211};
212
213static struct regulator_consumer_supply sdhc1_consumers[] = {
214 {
7f917a8d 215 .dev_name = "imx21-mmc.1",
61533841
SH
216 .supply = "sdhc_vcc",
217 },
218};
219
220static struct regulator_init_data sdhc1_data = {
221 .constraints = {
222 .min_uV = 3000000,
223 .max_uV = 3400000,
224 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
225 REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
226 .valid_modes_mask = REGULATOR_MODE_NORMAL |
227 REGULATOR_MODE_FAST,
228 .always_on = 0,
229 .boot_on = 0,
230 },
231 .num_consumer_supplies = ARRAY_SIZE(sdhc1_consumers),
232 .consumer_supplies = sdhc1_consumers,
233};
234
235static struct regulator_consumer_supply cam_consumers[] = {
236 {
dcc5abf0 237 .dev_name = NULL,
61533841
SH
238 .supply = "imx_cam_vcc",
239 },
240};
241
242static struct regulator_init_data cam_data = {
243 .constraints = {
244 .min_uV = 3000000,
245 .max_uV = 3400000,
246 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
247 REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
248 .valid_modes_mask = REGULATOR_MODE_NORMAL |
249 REGULATOR_MODE_FAST,
250 .always_on = 0,
251 .boot_on = 0,
252 },
253 .num_consumer_supplies = ARRAY_SIZE(cam_consumers),
254 .consumer_supplies = cam_consumers,
255};
256
5836372e 257static struct mc13xxx_regulator_init_data pcm038_regulators[] = {
61533841 258 {
57c78e35 259 .id = MC13783_REG_VCAM,
61533841
SH
260 .init_data = &cam_data,
261 }, {
57c78e35 262 .id = MC13783_REG_VMMC1,
61533841
SH
263 .init_data = &sdhc1_data,
264 },
265};
266
5836372e 267static struct mc13xxx_platform_data pcm038_pmic = {
4ec1b54c
AS
268 .regulators = {
269 .regulators = pcm038_regulators,
270 .num_regulators = ARRAY_SIZE(pcm038_regulators),
271 },
46621ebb 272 .flags = MC13XXX_USE_ADC | MC13XXX_USE_TOUCHSCREEN,
61533841
SH
273};
274
275static struct spi_board_info pcm038_spi_board_info[] __initdata = {
276 {
277 .modalias = "mc13783",
438196c3 278 /* irq number is run-time assigned */
61533841
SH
279 .max_speed_hz = 300000,
280 .bus_num = 0,
281 .chip_select = 0,
282 .platform_data = &pcm038_pmic,
283 .mode = SPI_CS_HIGH,
284 }
285};
286
4bd597b6
SH
287static int pcm038_usbh2_init(struct platform_device *pdev)
288{
289 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
290 MXC_EHCI_INTERFACE_DIFF_UNI);
291}
292
2eb42d5c 293static const struct mxc_usbh_platform_data usbh2_pdata __initconst = {
4bd597b6 294 .init = pcm038_usbh2_init,
773f206b 295 .portsc = MXC_EHCI_MODE_ULPI,
773f206b
SH
296};
297
7e5e9f54
JB
298static void __init pcm038_init(void)
299{
b78d8e59
SG
300 imx27_soc_init();
301
f231ea44
SH
302 mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins),
303 "PCM038");
304
3620c0dc 305 pcm038_init_sram();
7e5e9f54 306
d5dac4a6
UKK
307 imx27_add_imx_uart0(&uart_pdata);
308 imx27_add_imx_uart1(&uart_pdata);
309 imx27_add_imx_uart2(&uart_pdata);
01f71a37 310
ccfe30a7 311 mxc_gpio_mode(PE16_AF_OWIRE);
0e7a29a8 312 imx27_add_mxc_nand(&pcm038_nand_board_info);
7e5e9f54 313
a4e9a65a
SH
314 /* only the i2c master 1 is used on this CPU card */
315 i2c_register_board_info(1, pcm038_i2c_devices,
316 ARRAY_SIZE(pcm038_i2c_devices));
317
77a406da 318 imx27_add_imx_i2c(1, &pcm038_i2c1_data);
a4e9a65a 319
0160651a
LF
320 /* PE18 for user-LED D40 */
321 mxc_gpio_mode(GPIO_PORTE | 18 | GPIO_GPIO | GPIO_OUT);
322
61533841
SH
323 mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT);
324
325 /* MC13783 IRQ */
326 mxc_gpio_mode(GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN);
327
7536cf99 328 imx27_add_spi_imx0(&pcm038_spi0_data);
438196c3 329 pcm038_spi_board_info[0].irq = gpio_to_irq(IMX_GPIO_NR(2, 23));
61533841
SH
330 spi_register_board_info(pcm038_spi_board_info,
331 ARRAY_SIZE(pcm038_spi_board_info));
332
2eb42d5c 333 imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
773f206b 334
6bd96f3c 335 imx27_add_fec(NULL);
7e5e9f54 336 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
bec31a85
BT
337 imx27_add_imx2_wdt();
338 imx27_add_mxc_w1();
ff6552e4
JB
339
340#ifdef CONFIG_MACH_PCM970_BASEBOARD
341 pcm970_baseboard_init();
342#endif
7e5e9f54
JB
343}
344
345static void __init pcm038_timer_init(void)
346{
30c730f8 347 mx27_clocks_init(26000000);
7e5e9f54
JB
348}
349
7e5e9f54 350MACHINE_START(PCM038, "phyCORE-i.MX27")
dc8f1907 351 .atag_offset = 0x100,
3dac2196
UKK
352 .map_io = mx27_map_io,
353 .init_early = imx27_init_early,
354 .init_irq = mx27_init_irq,
6bb27d73 355 .init_time = pcm038_timer_init,
3dac2196 356 .init_machine = pcm038_init,
65ea7884 357 .restart = mxc_restart,
7e5e9f54 358MACHINE_END