[mirror_ubuntu-eoan-kernel.git] / arch / arm / mach-imx / mach-pcm038.c

/*
 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */

#include <linux/i2c.h>
#include <linux/i2c/at24.h>
#include <linux/io.h>
#include <linux/mtd/plat-ram.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/regulator/machine.h>
#include <linux/mfd/mc13783.h>
#include <linux/spi/spi.h>
#include <linux/irq.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>

#include <mach/board-pcm038.h>
#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/iomux-mx27.h>
#include <mach/mxc_nand.h>
#include <mach/mxc_ehci.h>
#include <mach/ulpi.h>

#include "devices-imx27.h"
#include "devices.h"

static int pcm038_pins[] = {
	/* UART1 */
	PE12_PF_UART1_TXD,
	PE13_PF_UART1_RXD,
	PE14_PF_UART1_CTS,
	PE15_PF_UART1_RTS,
	/* UART2 */
	PE3_PF_UART2_CTS,
	PE4_PF_UART2_RTS,
	PE6_PF_UART2_TXD,
	PE7_PF_UART2_RXD,
	/* UART3 */
	PE8_PF_UART3_TXD,
	PE9_PF_UART3_RXD,
	PE10_PF_UART3_CTS,
	PE11_PF_UART3_RTS,
	/* FEC */
	PD0_AIN_FEC_TXD0,
	PD1_AIN_FEC_TXD1,
	PD2_AIN_FEC_TXD2,
	PD3_AIN_FEC_TXD3,
	PD4_AOUT_FEC_RX_ER,
	PD5_AOUT_FEC_RXD1,
	PD6_AOUT_FEC_RXD2,
	PD7_AOUT_FEC_RXD3,
	PD8_AF_FEC_MDIO,
	PD9_AIN_FEC_MDC,
	PD10_AOUT_FEC_CRS,
	PD11_AOUT_FEC_TX_CLK,
	PD12_AOUT_FEC_RXD0,
	PD13_AOUT_FEC_RX_DV,
	PD14_AOUT_FEC_RX_CLK,
	PD15_AOUT_FEC_COL,
	PD16_AIN_FEC_TX_ER,
	PF23_AIN_FEC_TX_EN,
	/* I2C2 */
	PC5_PF_I2C2_SDA,
	PC6_PF_I2C2_SCL,
	/* SPI1 */
	PD25_PF_CSPI1_RDY,
	PD29_PF_CSPI1_SCLK,
	PD30_PF_CSPI1_MISO,
	PD31_PF_CSPI1_MOSI,
	/* SSI1 */
	PC20_PF_SSI1_FS,
	PC21_PF_SSI1_RXD,
	PC22_PF_SSI1_TXD,
	PC23_PF_SSI1_CLK,
	/* SSI4 */
	PC16_PF_SSI4_FS,
	PC17_PF_SSI4_RXD,
	PC18_PF_SSI4_TXD,
	PC19_PF_SSI4_CLK,
	/* USB host */
	PA0_PF_USBH2_CLK,
	PA1_PF_USBH2_DIR,
	PA2_PF_USBH2_DATA7,
	PA3_PF_USBH2_NXT,
	PA4_PF_USBH2_STP,
	PD19_AF_USBH2_DATA4,
	PD20_AF_USBH2_DATA3,
	PD21_AF_USBH2_DATA6,
	PD22_AF_USBH2_DATA0,
	PD23_AF_USBH2_DATA2,
	PD24_AF_USBH2_DATA1,
	PD26_AF_USBH2_DATA5,
};

/*
 * Phytec's PCM038 comes with 2MiB battery buffered SRAM,
 * 16 bit width
 */

static struct platdata_mtd_ram pcm038_sram_data = {
	.bankwidth = 2,
};

static struct resource pcm038_sram_resource = {
	.start = MX27_CS1_BASE_ADDR,
	.end   = MX27_CS1_BASE_ADDR + 512 * 1024 - 1,
	.flags = IORESOURCE_MEM,
};

static struct platform_device pcm038_sram_mtd_device = {
	.name = "mtd-ram",
	.id = 0,
	.dev = {
		.platform_data = &pcm038_sram_data,
	},
	.num_resources = 1,
	.resource = &pcm038_sram_resource,
};

/*
 * Phytec's phyCORE-i.MX27 comes with 32MiB flash,
 * 16 bit width
 */
static struct physmap_flash_data pcm038_flash_data = {
	.width = 2,
};

static struct resource pcm038_flash_resource = {
	.start = 0xc0000000,
	.end   = 0xc1ffffff,
	.flags = IORESOURCE_MEM,
};

static struct platform_device pcm038_nor_mtd_device = {
	.name = "physmap-flash",
	.id = 0,
	.dev = {
		.platform_data = &pcm038_flash_data,
	},
	.num_resources = 1,
	.resource = &pcm038_flash_resource,
};

static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

static const struct mxc_nand_platform_data
pcm038_nand_board_info __initconst = {
	.width = 1,
	.hw_ecc = 1,
};

static struct platform_device *platform_devices[] __initdata = {
	&pcm038_nor_mtd_device,
	&mxc_w1_master_device,
	&mxc_fec_device,
	&pcm038_sram_mtd_device,
	&mxc_wdt,
};

/* On pcm038 there's a sram attached to CS1, we enable the chipselect here and
 * setup other stuffs to access the sram. */
static void __init pcm038_init_sram(void)
{
	mx27_setup_weimcs(1, 0x0000d843, 0x22252521, 0x22220a00);
}

static const struct imxi2c_platform_data pcm038_i2c1_data __initconst = {
	.bitrate = 100000,
};

static struct at24_platform_data board_eeprom = {
	.byte_len = 4096,
	.page_size = 32,
	.flags = AT24_FLAG_ADDR16,
};

static struct i2c_board_info pcm038_i2c_devices[] = {
	{
		I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
		.platform_data = &board_eeprom,
	}, {
		I2C_BOARD_INFO("pcf8563", 0x51),
	}, {
		I2C_BOARD_INFO("lm75", 0x4a),
	}
};

static int pcm038_spi_cs[] = {GPIO_PORTD + 28};

static const struct spi_imx_master pcm038_spi0_data __initconst = {
	.chipselect = pcm038_spi_cs,
	.num_chipselect = ARRAY_SIZE(pcm038_spi_cs),
};

static struct regulator_consumer_supply sdhc1_consumers[] = {
	{
		.dev	= &mxc_sdhc_device1.dev,
		.supply	= "sdhc_vcc",
	},
};

static struct regulator_init_data sdhc1_data = {
	.constraints = {
		.min_uV = 3000000,
		.max_uV = 3400000,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
			REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
		.valid_modes_mask = REGULATOR_MODE_NORMAL |
			REGULATOR_MODE_FAST,
		.always_on = 0,
		.boot_on = 0,
	},
	.num_consumer_supplies = ARRAY_SIZE(sdhc1_consumers),
	.consumer_supplies = sdhc1_consumers,
};

static struct regulator_consumer_supply cam_consumers[] = {
	{
		.dev	= NULL,
		.supply	= "imx_cam_vcc",
	},
};

static struct regulator_init_data cam_data = {
	.constraints = {
		.min_uV = 3000000,
		.max_uV = 3400000,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
			REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
		.valid_modes_mask = REGULATOR_MODE_NORMAL |
			REGULATOR_MODE_FAST,
		.always_on = 0,
		.boot_on = 0,
	},
	.num_consumer_supplies = ARRAY_SIZE(cam_consumers),
	.consumer_supplies = cam_consumers,
};

struct mc13783_regulator_init_data pcm038_regulators[] = {
	{
		.id = MC13783_REGU_VCAM,
		.init_data = &cam_data,
	}, {
		.id = MC13783_REGU_VMMC1,
		.init_data = &sdhc1_data,
	},
};

static struct mc13783_platform_data pcm038_pmic = {
	.regulators = pcm038_regulators,
	.num_regulators = ARRAY_SIZE(pcm038_regulators),
	.flags = MC13783_USE_ADC | MC13783_USE_REGULATOR |
		 MC13783_USE_TOUCHSCREEN,
};

static struct spi_board_info pcm038_spi_board_info[] __initdata = {
	{
		.modalias = "mc13783",
		.irq = IRQ_GPIOB(23),
		.max_speed_hz = 300000,
		.bus_num = 0,
		.chip_select = 0,
		.platform_data = &pcm038_pmic,
		.mode = SPI_CS_HIGH,
	}
};

static struct mxc_usbh_platform_data usbh2_pdata = {
	.portsc	= MXC_EHCI_MODE_ULPI,
	.flags	= MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI,
};

static void __init pcm038_init(void)
{
	mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins),
			"PCM038");

	pcm038_init_sram();

	imx27_add_imx_uart0(&uart_pdata);
	imx27_add_imx_uart1(&uart_pdata);
	imx27_add_imx_uart2(&uart_pdata);

	mxc_gpio_mode(PE16_AF_OWIRE);
	imx27_add_mxc_nand(&pcm038_nand_board_info);

	/* only the i2c master 1 is used on this CPU card */
	i2c_register_board_info(1, pcm038_i2c_devices,
				ARRAY_SIZE(pcm038_i2c_devices));

	imx27_add_i2c_imx1(&pcm038_i2c1_data);

	/* PE18 for user-LED D40 */
	mxc_gpio_mode(GPIO_PORTE | 18 | GPIO_GPIO | GPIO_OUT);

	mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT);

	/* MC13783 IRQ */
	mxc_gpio_mode(GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN);

	imx27_add_spi_imx0(&pcm038_spi0_data);
	spi_register_board_info(pcm038_spi_board_info,
				ARRAY_SIZE(pcm038_spi_board_info));

	mxc_register_device(&mxc_usbh2, &usbh2_pdata);

	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));

#ifdef CONFIG_MACH_PCM970_BASEBOARD
	pcm970_baseboard_init();
#endif
}

static void __init pcm038_timer_init(void)
{
	mx27_clocks_init(26000000);
}

static struct sys_timer pcm038_timer = {
	.init = pcm038_timer_init,
};

MACHINE_START(PCM038, "phyCORE-i.MX27")
	.phys_io        = MX27_AIPI_BASE_ADDR,
	.io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
	.boot_params    = MX27_PHYS_OFFSET + 0x100,
	.map_io         = mx27_map_io,
	.init_irq       = mx27_init_irq,
	.init_machine   = pcm038_init,
	.timer          = &pcm038_timer,
MACHINE_END
Commit	Line	Data
7e5e9f54 JB	1	/*
	2	* Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
	3	* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
	4	*
	5	* This program is free software; you can redistribute it and/or
	6	* modify it under the terms of the GNU General Public License
	7	* as published by the Free Software Foundation; either version 2
	8	* of the License, or (at your option) any later version.
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	17	* MA 02110-1301, USA.
	18	*/
	19
a4e9a65a SH	20	#include <linux/i2c.h>
a4e9a65a SH	21	#include <linux/i2c/at24.h>
bff0b53b SH	22	#include <linux/io.h>
	23	#include <linux/mtd/plat-ram.h>
	24	#include <linux/mtd/physmap.h>
	25	#include <linux/platform_device.h>
61533841 SH	26	#include <linux/regulator/machine.h>
	27	#include <linux/mfd/mc13783.h>
	28	#include <linux/spi/spi.h>
	29	#include <linux/irq.h>
a4e9a65a	30
7e5e9f54	31	#include <asm/mach-types.h>
bff0b53b SH	32	#include <asm/mach/arch.h>
	33	#include <asm/mach/time.h>
	34
	35	#include <mach/board-pcm038.h>
a09e64fb RK	36	#include <mach/common.h>
a09e64fb RK	37	#include <mach/hardware.h>
e835d88e	38	#include <mach/iomux-mx27.h>
01f71a37	39	#include <mach/mxc_nand.h>
773f206b SH	40	#include <mach/mxc_ehci.h>
773f206b SH	41	#include <mach/ulpi.h>
7e5e9f54	42
0e7a29a8	43	#include "devices-imx27.h"
7e90534a SH	44	#include "devices.h"
7e90534a SH	45
f231ea44 SH	46	static int pcm038_pins[] = {
	47	/* UART1 */
	48	PE12_PF_UART1_TXD,
	49	PE13_PF_UART1_RXD,
	50	PE14_PF_UART1_CTS,
	51	PE15_PF_UART1_RTS,
	52	/* UART2 */
	53	PE3_PF_UART2_CTS,
	54	PE4_PF_UART2_RTS,
	55	PE6_PF_UART2_TXD,
	56	PE7_PF_UART2_RXD,
	57	/* UART3 */
	58	PE8_PF_UART3_TXD,
	59	PE9_PF_UART3_RXD,
	60	PE10_PF_UART3_CTS,
	61	PE11_PF_UART3_RTS,
	62	/* FEC */
	63	PD0_AIN_FEC_TXD0,
	64	PD1_AIN_FEC_TXD1,
	65	PD2_AIN_FEC_TXD2,
	66	PD3_AIN_FEC_TXD3,
	67	PD4_AOUT_FEC_RX_ER,
	68	PD5_AOUT_FEC_RXD1,
	69	PD6_AOUT_FEC_RXD2,
	70	PD7_AOUT_FEC_RXD3,
	71	PD8_AF_FEC_MDIO,
	72	PD9_AIN_FEC_MDC,
	73	PD10_AOUT_FEC_CRS,
	74	PD11_AOUT_FEC_TX_CLK,
	75	PD12_AOUT_FEC_RXD0,
	76	PD13_AOUT_FEC_RX_DV,
	77	PD14_AOUT_FEC_RX_CLK,
	78	PD15_AOUT_FEC_COL,
	79	PD16_AIN_FEC_TX_ER,
	80	PF23_AIN_FEC_TX_EN,
	81	/* I2C2 */
	82	PC5_PF_I2C2_SDA,
	83	PC6_PF_I2C2_SCL,
	84	/* SPI1 */
	85	PD25_PF_CSPI1_RDY,
f231ea44 SH	86	PD29_PF_CSPI1_SCLK,
	87	PD30_PF_CSPI1_MISO,
	88	PD31_PF_CSPI1_MOSI,
	89	/* SSI1 */
	90	PC20_PF_SSI1_FS,
	91	PC21_PF_SSI1_RXD,
	92	PC22_PF_SSI1_TXD,
	93	PC23_PF_SSI1_CLK,
	94	/* SSI4 */
	95	PC16_PF_SSI4_FS,
	96	PC17_PF_SSI4_RXD,
	97	PC18_PF_SSI4_TXD,
	98	PC19_PF_SSI4_CLK,
773f206b SH	99	/* USB host */
	100	PA0_PF_USBH2_CLK,
	101	PA1_PF_USBH2_DIR,
	102	PA2_PF_USBH2_DATA7,
	103	PA3_PF_USBH2_NXT,
	104	PA4_PF_USBH2_STP,
	105	PD19_AF_USBH2_DATA4,
	106	PD20_AF_USBH2_DATA3,
	107	PD21_AF_USBH2_DATA6,
	108	PD22_AF_USBH2_DATA0,
	109	PD23_AF_USBH2_DATA2,
	110	PD24_AF_USBH2_DATA1,
	111	PD26_AF_USBH2_DATA5,
f231ea44 SH	112	};
f231ea44 SH	113
3620c0dc SH	114	/*
	115	* Phytec's PCM038 comes with 2MiB battery buffered SRAM,
	116	* 16 bit width
	117	*/
	118
	119	static struct platdata_mtd_ram pcm038_sram_data = {
	120	.bankwidth = 2,
	121	};
	122
	123	static struct resource pcm038_sram_resource = {
3f35d1f5 UKK	124	.start = MX27_CS1_BASE_ADDR,
3f35d1f5 UKK	125	.end = MX27_CS1_BASE_ADDR + 512 * 1024 - 1,
3620c0dc SH	126	.flags = IORESOURCE_MEM,
	127	};
	128
	129	static struct platform_device pcm038_sram_mtd_device = {
	130	.name = "mtd-ram",
	131	.id = 0,
	132	.dev = {
	133	.platform_data = &pcm038_sram_data,
	134	},
	135	.num_resources = 1,
	136	.resource = &pcm038_sram_resource,
	137	};
	138
7e5e9f54 JB	139	/*
	140	* Phytec's phyCORE-i.MX27 comes with 32MiB flash,
	141	* 16 bit width
	142	*/
	143	static struct physmap_flash_data pcm038_flash_data = {
	144	.width = 2,
	145	};
	146
	147	static struct resource pcm038_flash_resource = {
	148	.start = 0xc0000000,
	149	.end = 0xc1ffffff,
	150	.flags = IORESOURCE_MEM,
	151	};
	152
	153	static struct platform_device pcm038_nor_mtd_device = {
	154	.name = "physmap-flash",
	155	.id = 0,
	156	.dev = {
	157	.platform_data = &pcm038_flash_data,
	158	},
	159	.num_resources = 1,
	160	.resource = &pcm038_flash_resource,
	161	};
	162
d5dac4a6 UKK	163	static const struct imxuart_platform_data uart_pdata __initconst = {
d5dac4a6 UKK	164	.flags = IMXUART_HAVE_RTSCTS,
7e5e9f54 JB	165	};
7e5e9f54 JB	166
0e7a29a8 UKK	167	static const struct mxc_nand_platform_data
0e7a29a8 UKK	168	pcm038_nand_board_info __initconst = {
01f71a37 SH	169	.width = 1,
	170	.hw_ecc = 1,
	171	};
	172
7e5e9f54 JB	173	static struct platform_device *platform_devices[] __initdata = {
7e5e9f54 JB	174	&pcm038_nor_mtd_device,
d40a0992	175	&mxc_w1_master_device,
879fea1b	176	&mxc_fec_device,
3620c0dc	177	&pcm038_sram_mtd_device,
f13899da	178	&mxc_wdt,
7e5e9f54 JB	179	};
7e5e9f54 JB	180
3620c0dc SH	181	/* On pcm038 there's a sram attached to CS1, we enable the chipselect here and
	182	* setup other stuffs to access the sram. */
	183	static void __init pcm038_init_sram(void)
	184	{
a8dfb646	185	mx27_setup_weimcs(1, 0x0000d843, 0x22252521, 0x22220a00);
3620c0dc SH	186	}
3620c0dc SH	187
c6987159	188	static const struct imxi2c_platform_data pcm038_i2c1_data __initconst = {
a4e9a65a	189	.bitrate = 100000,
a4e9a65a SH	190	};
	191
	192	static struct at24_platform_data board_eeprom = {
	193	.byte_len = 4096,
	194	.page_size = 32,
	195	.flags = AT24_FLAG_ADDR16,
	196	};
	197
	198	static struct i2c_board_info pcm038_i2c_devices[] = {
cf87a6e2	199	{
a4e9a65a SH	200	I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
a4e9a65a SH	201	.platform_data = &board_eeprom,
cf87a6e2 SH	202	}, {
	203	I2C_BOARD_INFO("pcf8563", 0x51),
	204	}, {
a4e9a65a	205	I2C_BOARD_INFO("lm75", 0x4a),
a4e9a65a SH	206	}
a4e9a65a SH	207	};
a4e9a65a	208
61533841 SH	209	static int pcm038_spi_cs[] = {GPIO_PORTD + 28};
61533841 SH	210
7536cf99	211	static const struct spi_imx_master pcm038_spi0_data __initconst = {
61533841 SH	212	.chipselect = pcm038_spi_cs,
	213	.num_chipselect = ARRAY_SIZE(pcm038_spi_cs),
	214	};
	215
	216	static struct regulator_consumer_supply sdhc1_consumers[] = {
	217	{
	218	.dev = &mxc_sdhc_device1.dev,
	219	.supply = "sdhc_vcc",
	220	},
	221	};
	222
	223	static struct regulator_init_data sdhc1_data = {
	224	.constraints = {
	225	.min_uV = 3000000,
	226	.max_uV = 3400000,
	227	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE \|
	228	REGULATOR_CHANGE_MODE \| REGULATOR_CHANGE_STATUS,
	229	.valid_modes_mask = REGULATOR_MODE_NORMAL \|
	230	REGULATOR_MODE_FAST,
	231	.always_on = 0,
	232	.boot_on = 0,
	233	},
	234	.num_consumer_supplies = ARRAY_SIZE(sdhc1_consumers),
	235	.consumer_supplies = sdhc1_consumers,
	236	};
	237
	238	static struct regulator_consumer_supply cam_consumers[] = {
	239	{
	240	.dev = NULL,
	241	.supply = "imx_cam_vcc",
	242	},
	243	};
	244
	245	static struct regulator_init_data cam_data = {
	246	.constraints = {
	247	.min_uV = 3000000,
	248	.max_uV = 3400000,
	249	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE \|
	250	REGULATOR_CHANGE_MODE \| REGULATOR_CHANGE_STATUS,
	251	.valid_modes_mask = REGULATOR_MODE_NORMAL \|
	252	REGULATOR_MODE_FAST,
	253	.always_on = 0,
	254	.boot_on = 0,
	255	},
	256	.num_consumer_supplies = ARRAY_SIZE(cam_consumers),
	257	.consumer_supplies = cam_consumers,
	258	};
	259
	260	struct mc13783_regulator_init_data pcm038_regulators[] = {
	261	{
	262	.id = MC13783_REGU_VCAM,
	263	.init_data = &cam_data,
	264	}, {
	265	.id = MC13783_REGU_VMMC1,
	266	.init_data = &sdhc1_data,
	267	},
	268	};
	269
	270	static struct mc13783_platform_data pcm038_pmic = {
	271	.regulators = pcm038_regulators,
	272	.num_regulators = ARRAY_SIZE(pcm038_regulators),
	273	.flags = MC13783_USE_ADC \| MC13783_USE_REGULATOR \|
	274	MC13783_USE_TOUCHSCREEN,
	275	};
276
277	static struct spi_board_info pcm038_spi_board_info[] __initdata = {
278	{
279	.modalias = "mc13783",
280	.irq = IRQ_GPIOB(23),
281	.max_speed_hz = 300000,
282	.bus_num = 0,
283	.chip_select = 0,
284	.platform_data = &pcm038_pmic,
285	.mode = SPI_CS_HIGH,
286	}
287	};
288
773f206b SH	289	static struct mxc_usbh_platform_data usbh2_pdata = {
	290	.portsc = MXC_EHCI_MODE_ULPI,
	291	.flags = MXC_EHCI_POWER_PINS_ENABLED \| MXC_EHCI_INTERFACE_DIFF_UNI,
	292	};
	293
7e5e9f54 JB	294	static void __init pcm038_init(void)
7e5e9f54 JB	295	{
f231ea44 SH	296	mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins),
	297	"PCM038");
	298
3620c0dc	299	pcm038_init_sram();
7e5e9f54	300
d5dac4a6 UKK	301	imx27_add_imx_uart0(&uart_pdata);
	302	imx27_add_imx_uart1(&uart_pdata);
	303	imx27_add_imx_uart2(&uart_pdata);
01f71a37	304
ccfe30a7	305	mxc_gpio_mode(PE16_AF_OWIRE);
0e7a29a8	306	imx27_add_mxc_nand(&pcm038_nand_board_info);
7e5e9f54	307
a4e9a65a SH	308	/* only the i2c master 1 is used on this CPU card */
	309	i2c_register_board_info(1, pcm038_i2c_devices,
	310	ARRAY_SIZE(pcm038_i2c_devices));
	311
c6987159	312	imx27_add_i2c_imx1(&pcm038_i2c1_data);
a4e9a65a	313
0160651a LF	314	/* PE18 for user-LED D40 */
	315	mxc_gpio_mode(GPIO_PORTE \| 18 \| GPIO_GPIO \| GPIO_OUT);
	316
61533841 SH	317	mxc_gpio_mode(GPIO_PORTD \| 28 \| GPIO_GPIO \| GPIO_OUT);
	318
	319	/* MC13783 IRQ */
	320	mxc_gpio_mode(GPIO_PORTB \| 23 \| GPIO_GPIO \| GPIO_IN);
	321
7536cf99	322	imx27_add_spi_imx0(&pcm038_spi0_data);
61533841 SH	323	spi_register_board_info(pcm038_spi_board_info,
	324	ARRAY_SIZE(pcm038_spi_board_info));
	325
773f206b SH	326	mxc_register_device(&mxc_usbh2, &usbh2_pdata);
773f206b SH	327
7e5e9f54	328	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
ff6552e4 JB	329
	330	#ifdef CONFIG_MACH_PCM970_BASEBOARD
	331	pcm970_baseboard_init();
	332	#endif
7e5e9f54 JB	333	}
	334
	335	static void __init pcm038_timer_init(void)
	336	{
30c730f8	337	mx27_clocks_init(26000000);
7e5e9f54 JB	338	}
7e5e9f54 JB	339
058b7a6f	340	static struct sys_timer pcm038_timer = {
7e5e9f54 JB	341	.init = pcm038_timer_init,
	342	};
	343
	344	MACHINE_START(PCM038, "phyCORE-i.MX27")
3f35d1f5 UKK	345	.phys_io = MX27_AIPI_BASE_ADDR,
3f35d1f5 UKK	346	.io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
34101237	347	.boot_params = MX27_PHYS_OFFSET + 0x100,
cd4a05f9	348	.map_io = mx27_map_io,
c5aa0ad0	349	.init_irq = mx27_init_irq,
7e5e9f54 JB	350	.init_machine = pcm038_init,
	351	.timer = &pcm038_timer,
	352	MACHINE_END