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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-integrator/core.c | |
3 | * | |
4 | * Copyright (C) 2000-2003 Deep Blue Solutions Ltd | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2, as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | #include <linux/types.h> | |
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/device.h> | |
14 | #include <linux/spinlock.h> | |
15 | #include <linux/interrupt.h> | |
a03d4d27 | 16 | #include <linux/irq.h> |
8d717a52 | 17 | #include <linux/memblock.h> |
1da177e4 | 18 | #include <linux/sched.h> |
20cf33ea | 19 | #include <linux/smp.h> |
fbb18a27 | 20 | #include <linux/termios.h> |
a62c80e5 | 21 | #include <linux/amba/bus.h> |
fbb18a27 | 22 | #include <linux/amba/serial.h> |
fced80c7 | 23 | #include <linux/io.h> |
1da177e4 | 24 | |
a09e64fb | 25 | #include <mach/hardware.h> |
a285edcf | 26 | #include <mach/platform.h> |
a09e64fb | 27 | #include <mach/cm.h> |
695436e3 LW |
28 | #include <mach/irqs.h> |
29 | ||
1da177e4 | 30 | #include <asm/leds.h> |
ee35887e | 31 | #include <asm/mach-types.h> |
1da177e4 | 32 | #include <asm/mach/time.h> |
98c672cf | 33 | #include <asm/pgtable.h> |
1da177e4 | 34 | |
fbb18a27 RK |
35 | static struct amba_pl010_data integrator_uart_data; |
36 | ||
2f64ccd9 RK |
37 | #define INTEGRATOR_RTC_IRQ { IRQ_RTCINT } |
38 | #define INTEGRATOR_UART0_IRQ { IRQ_UARTINT0 } | |
39 | #define INTEGRATOR_UART1_IRQ { IRQ_UARTINT1 } | |
40 | #define KMI0_IRQ { IRQ_KMIINT0 } | |
41 | #define KMI1_IRQ { IRQ_KMIINT1 } | |
1da177e4 | 42 | |
d59fdcfc | 43 | static AMBA_APB_DEVICE(rtc, "rtc", 0, |
2f64ccd9 | 44 | INTEGRATOR_RTC_BASE, INTEGRATOR_RTC_IRQ, NULL); |
1da177e4 | 45 | |
d59fdcfc | 46 | static AMBA_APB_DEVICE(uart0, "uart0", 0, |
2f64ccd9 | 47 | INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, &integrator_uart_data); |
1da177e4 | 48 | |
d59fdcfc | 49 | static AMBA_APB_DEVICE(uart1, "uart1", 0, |
2f64ccd9 | 50 | INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, &integrator_uart_data); |
1da177e4 | 51 | |
d59fdcfc LW |
52 | static AMBA_APB_DEVICE(kmi0, "kmi0", 0, KMI0_BASE, KMI0_IRQ, NULL); |
53 | static AMBA_APB_DEVICE(kmi1, "kmi1", 0, KMI1_BASE, KMI1_IRQ, NULL); | |
1da177e4 LT |
54 | |
55 | static struct amba_device *amba_devs[] __initdata = { | |
56 | &rtc_device, | |
57 | &uart0_device, | |
58 | &uart1_device, | |
59 | &kmi0_device, | |
60 | &kmi1_device, | |
61 | }; | |
62 | ||
63 | static int __init integrator_init(void) | |
64 | { | |
65 | int i; | |
66 | ||
ee35887e LW |
67 | /* |
68 | * The Integrator/AP lacks necessary AMBA PrimeCell IDs, so we need to | |
69 | * hard-code them. The Integator/CP and forward have proper cell IDs. | |
70 | * Else we leave them undefined to the bus driver can autoprobe them. | |
71 | */ | |
72 | if (machine_is_integrator()) { | |
73 | rtc_device.periphid = 0x00041030; | |
74 | uart0_device.periphid = 0x00041010; | |
75 | uart1_device.periphid = 0x00041010; | |
76 | kmi0_device.periphid = 0x00041050; | |
77 | kmi1_device.periphid = 0x00041050; | |
78 | } | |
79 | ||
1da177e4 LT |
80 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { |
81 | struct amba_device *d = amba_devs[i]; | |
82 | amba_device_register(d, &iomem_resource); | |
83 | } | |
84 | ||
85 | return 0; | |
86 | } | |
87 | ||
88 | arch_initcall(integrator_init); | |
89 | ||
fbb18a27 RK |
90 | /* |
91 | * On the Integrator platform, the port RTS and DTR are provided by | |
92 | * bits in the following SC_CTRLS register bits: | |
93 | * RTS DTR | |
94 | * UART0 7 6 | |
95 | * UART1 5 4 | |
96 | */ | |
b830b9b5 RK |
97 | #define SC_CTRLC IO_ADDRESS(INTEGRATOR_SC_CTRLC) |
98 | #define SC_CTRLS IO_ADDRESS(INTEGRATOR_SC_CTRLS) | |
fbb18a27 RK |
99 | |
100 | static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl) | |
101 | { | |
102 | unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask; | |
103 | ||
104 | if (dev == &uart0_device) { | |
105 | rts_mask = 1 << 4; | |
106 | dtr_mask = 1 << 5; | |
107 | } else { | |
108 | rts_mask = 1 << 6; | |
109 | dtr_mask = 1 << 7; | |
110 | } | |
111 | ||
112 | if (mctrl & TIOCM_RTS) | |
113 | ctrlc |= rts_mask; | |
114 | else | |
115 | ctrls |= rts_mask; | |
116 | ||
117 | if (mctrl & TIOCM_DTR) | |
118 | ctrlc |= dtr_mask; | |
119 | else | |
120 | ctrls |= dtr_mask; | |
121 | ||
122 | __raw_writel(ctrls, SC_CTRLS); | |
123 | __raw_writel(ctrlc, SC_CTRLC); | |
124 | } | |
125 | ||
126 | static struct amba_pl010_data integrator_uart_data = { | |
127 | .set_mctrl = integrator_uart_set_mctrl, | |
128 | }; | |
129 | ||
b830b9b5 | 130 | #define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_CTRL) |
1da177e4 | 131 | |
bd31b859 | 132 | static DEFINE_RAW_SPINLOCK(cm_lock); |
1da177e4 LT |
133 | |
134 | /** | |
135 | * cm_control - update the CM_CTRL register. | |
136 | * @mask: bits to change | |
137 | * @set: bits to set | |
138 | */ | |
139 | void cm_control(u32 mask, u32 set) | |
140 | { | |
141 | unsigned long flags; | |
142 | u32 val; | |
143 | ||
bd31b859 | 144 | raw_spin_lock_irqsave(&cm_lock, flags); |
1da177e4 LT |
145 | val = readl(CM_CTRL) & ~mask; |
146 | writel(val | set, CM_CTRL); | |
bd31b859 | 147 | raw_spin_unlock_irqrestore(&cm_lock, flags); |
1da177e4 LT |
148 | } |
149 | ||
150 | EXPORT_SYMBOL(cm_control); | |
98c672cf RK |
151 | |
152 | /* | |
153 | * We need to stop things allocating the low memory; ideally we need a | |
154 | * better implementation of GFP_DMA which does not assume that DMA-able | |
155 | * memory starts at zero. | |
156 | */ | |
157 | void __init integrator_reserve(void) | |
158 | { | |
8d717a52 | 159 | memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET); |
98c672cf | 160 | } |
6338b66f RK |
161 | |
162 | /* | |
163 | * To reset, we hit the on-board reset register in the system FPGA | |
164 | */ | |
165 | void integrator_restart(char mode, const char *cmd) | |
166 | { | |
167 | cm_control(CM_CTRL_RESET, CM_CTRL_RESET); | |
168 | } |