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1da177e4 | 1 | /* |
3f7e5815 | 2 | * linux/arch/arm/mach-iop32x/irq.c |
1da177e4 | 3 | * |
3f7e5815 | 4 | * Generic IOP32X IRQ handling functionality |
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5 | * |
6 | * Author: Rory Bolt <rorybolt@pacbell.net> | |
7 | * Copyright (C) 2002 Rory Bolt | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | * Added IOP3XX chipset and IQ80321 board masking code. | |
14 | * | |
15 | */ | |
16 | #include <linux/init.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/list.h> | |
19 | ||
20 | #include <asm/mach/irq.h> | |
21 | #include <asm/irq.h> | |
22 | #include <asm/hardware.h> | |
23 | ||
24 | #include <asm/mach-types.h> | |
25 | ||
26 | static u32 iop321_mask /* = 0 */; | |
27 | ||
28 | static inline void intctl_write(u32 val) | |
29 | { | |
38ce73eb | 30 | iop3xx_cp6_enable(); |
1da177e4 | 31 | asm volatile("mcr p6,0,%0,c0,c0,0"::"r" (val)); |
38ce73eb | 32 | iop3xx_cp6_disable(); |
1da177e4 LT |
33 | } |
34 | ||
35 | static inline void intstr_write(u32 val) | |
36 | { | |
38ce73eb | 37 | iop3xx_cp6_enable(); |
1da177e4 | 38 | asm volatile("mcr p6,0,%0,c4,c0,0"::"r" (val)); |
38ce73eb | 39 | iop3xx_cp6_disable(); |
1da177e4 LT |
40 | } |
41 | ||
42 | static void | |
43 | iop321_irq_mask (unsigned int irq) | |
44 | { | |
45 | ||
610300e8 | 46 | iop321_mask &= ~(1 << irq); |
1da177e4 LT |
47 | |
48 | intctl_write(iop321_mask); | |
49 | } | |
50 | ||
51 | static void | |
52 | iop321_irq_unmask (unsigned int irq) | |
53 | { | |
610300e8 | 54 | iop321_mask |= (1 << irq); |
1da177e4 LT |
55 | |
56 | intctl_write(iop321_mask); | |
57 | } | |
58 | ||
38c677cb DB |
59 | struct irq_chip ext_chip = { |
60 | .name = "IOP", | |
1da177e4 LT |
61 | .ack = iop321_irq_mask, |
62 | .mask = iop321_irq_mask, | |
63 | .unmask = iop321_irq_unmask, | |
64 | }; | |
65 | ||
66 | void __init iop321_init_irq(void) | |
67 | { | |
38ce73eb | 68 | unsigned int i; |
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69 | |
70 | intctl_write(0); // disable all interrupts | |
71 | intstr_write(0); // treat all as IRQ | |
72 | if(machine_is_iq80321() || | |
73 | machine_is_iq31244()) // all interrupts are inputs to chip | |
7e9740b1 | 74 | *IOP3XX_PCIIRSR = 0x0f; |
1da177e4 | 75 | |
610300e8 | 76 | for(i = 0; i < NR_IRQS; i++) |
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77 | { |
78 | set_irq_chip(i, &ext_chip); | |
79 | set_irq_handler(i, do_level_IRQ); | |
80 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); | |
81 | ||
82 | } | |
83 | } | |
84 |