projects / mirror_ubuntu-focal-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
| 7e36e2f5 RW |
2 | /* |
| 3 | * arch/arch/mach-ixp4xx/fsg-pci.c | |
| 4 | * | |
| 5 | * FSG board-level PCI initialization | |
| 6 | * | |
| 7 | * Author: Rod Whitby <rod@whitby.id.au> | |
| 8 | * Maintainer: http://www.nslu2-linux.org/ | |
| 9 | * | |
| 10 | * based on ixdp425-pci.c: | |
| 11 | * Copyright (C) 2002 Intel Corporation. | |
| 12 | * Copyright (C) 2003-2004 MontaVista Software, Inc. | |
| 7e36e2f5 RW |
13 | */ |
| 14 | ||
| 15 | #include <linux/pci.h> | |
| 16 | #include <linux/init.h> | |
| 17 | #include <linux/irq.h> | |
| 7e36e2f5 RW |
18 | #include <asm/mach/pci.h> |
| 19 | #include <asm/mach-types.h> | |
| 20 | ||
| dc8ef8cd LW |
21 | #include "irqs.h" |
| 22 | ||
| 8d3fdf31 KH |
23 | #define MAX_DEV 3 |
| 24 | #define IRQ_LINES 3 | |
| 914e7bc2 KH |
25 | |
| 26 | /* PCI controller GPIO to IRQ pin mappings */ | |
| 8d3fdf31 KH |
27 | #define INTA 6 |
| 28 | #define INTB 7 | |
| 29 | #define INTC 5 | |
| 914e7bc2 | 30 | |
| 7e36e2f5 RW |
31 | void __init fsg_pci_preinit(void) |
| 32 | { | |
| 6845664a TG |
33 | irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); |
| 34 | irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); | |
| 35 | irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); | |
| 7e36e2f5 RW |
36 | ixp4xx_pci_preinit(); |
| 37 | } | |
| 38 | ||
| d5341942 | 39 | static int __init fsg_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
| 7e36e2f5 | 40 | { |
| 8d3fdf31 KH |
41 | static int pci_irq_table[IRQ_LINES] = { |
| 42 | IXP4XX_GPIO_IRQ(INTC), | |
| 43 | IXP4XX_GPIO_IRQ(INTB), | |
| 44 | IXP4XX_GPIO_IRQ(INTA), | |
| 7e36e2f5 RW |
45 | }; |
| 46 | ||
| 47 | int irq = -1; | |
| 8d3fdf31 | 48 | slot -= 11; |
| 7e36e2f5 | 49 | |
| 8d3fdf31 KH |
50 | if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES) |
| 51 | irq = pci_irq_table[slot - 1]; | |
| 7e36e2f5 RW |
52 | printk(KERN_INFO "%s: Mapped slot %d pin %d to IRQ %d\n", |
| 53 | __func__, slot, pin, irq); | |
| 54 | ||
| 55 | return irq; | |
| 56 | } | |
| 57 | ||
| 58 | struct hw_pci fsg_pci __initdata = { | |
| 59 | .nr_controllers = 1, | |
| c23bfc38 | 60 | .ops = &ixp4xx_ops, |
| 7e36e2f5 | 61 | .preinit = fsg_pci_preinit, |
| 7e36e2f5 | 62 | .setup = ixp4xx_setup, |
| 7e36e2f5 RW |
63 | .map_irq = fsg_map_irq, |
| 64 | }; | |
| 65 | ||
| 66 | int __init fsg_pci_init(void) | |
| 67 | { | |
| 68 | if (machine_is_fsg()) | |
| 69 | pci_common_init(&fsg_pci); | |
| 70 | return 0; | |
| 71 | } | |
| 72 | ||
| 73 | subsys_initcall(fsg_pci_init); |