]>
Commit | Line | Data |
---|---|---|
d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
1da177e4 | 2 | /* |
f30c2269 | 3 | * arch/arm/mach-ixp4xx/ixdpg425-pci.c |
1da177e4 LT |
4 | * |
5 | * PCI setup routines for Intel IXDPG425 Platform | |
6 | * | |
7 | * Copyright (C) 2004 MontaVista Softwrae, Inc. | |
8 | * | |
9 | * Maintainer: Deepak Saxena <dsaxena@plexity.net> | |
1da177e4 LT |
10 | */ |
11 | ||
12 | #include <linux/kernel.h> | |
13 | #include <linux/pci.h> | |
14 | #include <linux/init.h> | |
698dfe2b | 15 | #include <linux/irq.h> |
1da177e4 LT |
16 | |
17 | #include <asm/mach-types.h> | |
a09e64fb | 18 | #include <mach/hardware.h> |
1da177e4 LT |
19 | |
20 | #include <asm/mach/pci.h> | |
21 | ||
dc8ef8cd LW |
22 | #include "irqs.h" |
23 | ||
1da177e4 LT |
24 | void __init ixdpg425_pci_preinit(void) |
25 | { | |
6845664a TG |
26 | irq_set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW); |
27 | irq_set_irq_type(IRQ_IXP4XX_GPIO7, IRQ_TYPE_LEVEL_LOW); | |
1da177e4 | 28 | |
1da177e4 LT |
29 | ixp4xx_pci_preinit(); |
30 | } | |
31 | ||
d5341942 | 32 | static int __init ixdpg425_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
1da177e4 LT |
33 | { |
34 | if (slot == 12 || slot == 13) | |
35 | return IRQ_IXP4XX_GPIO7; | |
36 | else if (slot == 14) | |
37 | return IRQ_IXP4XX_GPIO6; | |
38 | else return -1; | |
39 | } | |
40 | ||
41 | struct hw_pci ixdpg425_pci __initdata = { | |
42 | .nr_controllers = 1, | |
c23bfc38 | 43 | .ops = &ixp4xx_ops, |
1da177e4 | 44 | .preinit = ixdpg425_pci_preinit, |
1da177e4 | 45 | .setup = ixp4xx_setup, |
1da177e4 LT |
46 | .map_irq = ixdpg425_map_irq, |
47 | }; | |
48 | ||
49 | int __init ixdpg425_pci_init(void) | |
50 | { | |
51 | if (machine_is_ixdpg425()) | |
52 | pci_common_init(&ixdpg425_pci); | |
53 | return 0; | |
54 | } | |
55 | ||
56 | subsys_initcall(ixdpg425_pci_init); |