[mirror_ubuntu-hirsute-kernel.git] / arch / arm / mach-ixp4xx / nslu2-pci.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * arch/arm/mach-ixp4xx/nslu2-pci.c
 *
 * NSLU2 board-level PCI initialization
 *
 * based on ixdp425-pci.c:
 *	Copyright (C) 2002 Intel Corporation.
 *	Copyright (C) 2003-2004 MontaVista Software, Inc.
 *
 * Maintainer: http://www.nslu2-linux.org/
 */

#include <linux/pci.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>

#include "irqs.h"

#define MAX_DEV		3
#define IRQ_LINES	3

/* PCI controller GPIO to IRQ pin mappings */
#define INTA		11
#define INTB		10
#define INTC		9
#define INTD		8

void __init nslu2_pci_preinit(void)
{
	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
	ixp4xx_pci_preinit();
}

static int __init nslu2_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
	static int pci_irq_table[IRQ_LINES] = {
		IXP4XX_GPIO_IRQ(INTA),
		IXP4XX_GPIO_IRQ(INTB),
		IXP4XX_GPIO_IRQ(INTC),
	};

	if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
		return pci_irq_table[(slot + pin - 2) % IRQ_LINES];

	return -1;
}

struct hw_pci __initdata nslu2_pci = {
	.nr_controllers = 1,
	.ops		= &ixp4xx_ops,
	.preinit	= nslu2_pci_preinit,
	.setup		= ixp4xx_setup,
	.map_irq	= nslu2_map_irq,
};

int __init nslu2_pci_init(void) /* monkey see, monkey do */
{
	if (machine_is_nslu2())
		pci_common_init(&nslu2_pci);

	return 0;
}

subsys_initcall(nslu2_pci_init);
Commit	Line	Data
d2912cb1	1	// SPDX-License-Identifier: GPL-2.0-only
a7918f39 AZ	2	/*
	3	* arch/arm/mach-ixp4xx/nslu2-pci.c
	4	*
	5	* NSLU2 board-level PCI initialization
	6	*
	7	* based on ixdp425-pci.c:
	8	* Copyright (C) 2002 Intel Corporation.
	9	* Copyright (C) 2003-2004 MontaVista Software, Inc.
	10	*
	11	* Maintainer: http://www.nslu2-linux.org/
a7918f39 AZ	12	*/
a7918f39 AZ	13
a7918f39 AZ	14	#include <linux/pci.h>
a7918f39 AZ	15	#include <linux/init.h>
f64c2c01	16	#include <linux/irq.h>
a7918f39 AZ	17	#include <asm/mach/pci.h>
	18	#include <asm/mach-types.h>
	19
dc8ef8cd LW	20	#include "irqs.h"
dc8ef8cd LW	21
8d3fdf31 KH	22	#define MAX_DEV 3
8d3fdf31 KH	23	#define IRQ_LINES 3
c1117c63 KH	24
c1117c63 KH	25	/* PCI controller GPIO to IRQ pin mappings */
8d3fdf31 KH	26	#define INTA 11
	27	#define INTB 10
	28	#define INTC 9
	29	#define INTD 8
c1117c63	30
a7918f39 AZ	31	void __init nslu2_pci_preinit(void)
a7918f39 AZ	32	{
6845664a TG	33	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
	34	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
	35	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
a7918f39 AZ	36	ixp4xx_pci_preinit();
	37	}
	38
d5341942	39	static int __init nslu2_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
a7918f39	40	{
8d3fdf31 KH	41	static int pci_irq_table[IRQ_LINES] = {
	42	IXP4XX_GPIO_IRQ(INTA),
	43	IXP4XX_GPIO_IRQ(INTB),
	44	IXP4XX_GPIO_IRQ(INTC),
a7918f39 AZ	45	};
a7918f39 AZ	46
8d3fdf31 KH	47	if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
8d3fdf31 KH	48	return pci_irq_table[(slot + pin - 2) % IRQ_LINES];
a7918f39	49
8d3fdf31	50	return -1;
a7918f39 AZ	51	}
	52
	53	struct hw_pci __initdata nslu2_pci = {
	54	.nr_controllers = 1,
c23bfc38	55	.ops = &ixp4xx_ops,
a7918f39	56	.preinit = nslu2_pci_preinit,
a7918f39	57	.setup = ixp4xx_setup,
a7918f39 AZ	58	.map_irq = nslu2_map_irq,
	59	};
	60
	61	int __init nslu2_pci_init(void) /* monkey see, monkey do */
	62	{
	63	if (machine_is_nslu2())
	64	pci_common_init(&nslu2_pci);
	65
	66	return 0;
	67	}
	68
	69	subsys_initcall(nslu2_pci_init);